1
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
FEATURES
• Fast 20Mbps Differential Transmission Rates
• Internal Transceiver Termination Resistors
for V.11 & V.35
• Interface Modes:
— RS-232 (V.28) — EIA-530 (V.10 & V.11)
— X.21 (V.11) — EIA-530A (V.10 & V.11)
— RS-449/V.36 — V.35 (V.35 & V.28)
(V.10 & V.11)
• Protocols are Software Selectable with 3-Bit Word
• Eight (8) Drivers and Eight (8) Receivers
•Termination Network Disable Option
• Internal Line or Digital Loopback for Diagnostic Testing
• Certied conformance to NET1/NET2 and TBR-1
TBR-2 by TUV Rheinland (TBR2/30451940.001/04)
• Easy Flow-Through Pinout
• +3.3V Only Operation
• Individual Driver and Receiver Enable/Disable Controls
•Operates in either DTE or DCE Mode
SP3508
Rugged 3.3V, 20Mbps, 8 Channel Multiprotocol Transceiver
with Programmable DCE/DTE and Termination Resistors
DESCRIPTION
The SP3508 is a monolithic device that supports eight (8) popular serial interface standards
for Wide Area Network (WAN) connectivity. The SP3508 is fabricated using a low power
BiCMOS process technology, and incorporates a regulated charge pump allowing +3.3V only
operation. Exar's patented charge pump provides a regulated output of +5.5V, which will
provide enough voltage for compliant operation in all modes. Eight (8) drivers and eight (8)
receivers can be congured via software for any of the above interface modes at any time.
The SP3508 requires no additional external components for compliant operation for all of the
eight (8) modes of operation other than six capacitors used for the internal charge pump. All
necessary termination is integrated within the SP3508 and is switchable when V.35 drivers
and V.35 receivers, or when V.11 receivers are used. The SP3508 provides the controls and
transceiver availability for operating as either a DTE or DCE.
Additional features with the SP3508 include internal loopback that can be initiated in any of
the operating modes by use of the LOOPBACK pin. While in loopback mode, receiver outputs
are internally connected to driver inputs creating an internal signal path bypassing the serial
communications controller for diagnostic testing. The SP3508 also includes a latch enable
pin with the driver and receiver address decoder. The internal V.11 or V.35 termination can
be switched off using a control pin (TERM_OFF) for monitoring applications. All eight (8)
drivers and receivers in the SP3508 include separate enable pins for added convenience.
The SP3508 is ideal for WAN serial ports in networking equipment such as routers, access
concentrators, network muxes, DSU/CSU's, networking test equipment, and other access
devices.
APPLICATIONS
• Router
• Frame Relay
• CSU
• DSU
• PBX
• Secure Communication Terminals
Now Available in Lead Free Packaging
Refer to page 9 for pinout
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Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
ELECTRICAL SPECIFICATIONS
TA = 0 to 70°C and VCC = 3.3V ± 5% unless otherwise noted. The ♦ denotes the specications which apply over the full operating tempera-
ture range (-40°C to +85°C), unless otherwise specied.
VCC .................................................................................................+7V
Input Voltages:
Logic ................................................ -0.3V to (VCC+0.5V)
Drivers .............................................. -0.3V to (VCC+0.5V)
Receivers .............................................................±15.5V
Output Voltages:
Logic ................................................ -0.3V to (VCC+0.5V)
Drivers .....................................................................±12V
Receivers ......................................... -0.3V to (VCC+0.5V)
Storage Temperature ..................................................-65°C to +150°C
Power Dissipation ...................................................................1520mW
(derate 19.0mW/°C above +70°C)
Junction Temperature TJ ......................................................... +141°C
Due to the relatively large package size of the 100-pin quad
at-pack, storage in a low humidity environment is preferred.
Large high density plastic packages are moisture sensitive and
should be stored in Dry Vapor Barrier Bags. Prior to usage,
the parts should remain bagged and stored below 40°C and
60%RH. If the parts are removed from the bag, they should be
Package Derating:
øJA ...................................................................36.9 °C/W
øJC .....................................................................6.5 °C/W
These are stress ratings only and functional operation of the
device at these ratings or any other above those indicated in
the operation sections of the specications below is not implied.
Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
ABSOLUTE MAXIMUM RATINGS
used within 48 hours or stored in an environment at or below
20%RH. If the above conditions cannot be followed, the parts
should be baked for four hours at 125°C in order to remove
moisture prior to soldering. Exar ships the 100-pin LQFP in Dry
Vapor Barrier Bags with a humidity indicator card and desiccant
pack. The humidity indicator should be below 30%RH.
STORAGE CONSIDERATIONS
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
LOGIC INPUTS
VIL 0.8 ♦V
VIH 2.0 ♦V
LOGIC OUTPUTS
VOL 0.4 ♦V IOUT = -3.2mA
VOH VCC
- 0.6
VCC
- 0.3
♦V IOUT = 1.0mA
V.28 DRIVER DC Parameters (OUTPUTS)
Open Circuit Voltage +/-10 ♦V Per Figure 1
Loaded Voltage +/-5.0 ♦V Per Figure 2
Short-Circuit Current +/-100 ♦mA Per Figure 4
Power-Off Impedance 300 ♦ΩPer Figure 5
V.28 DRIVER AC Parameters (Outputs) VCC = 3.3V for AC parameters
Transition Time 1.5 ♦µs Per Figure 6, +3V to -3V
Instantaneous Slew Rate 30 V/ µs Per Figure 3
Propagation Delay: tPHL 0.5 1.0 3.0 ♦µs
Propagation Delay: tPLH 0.5 1.0 3.0 ♦µs
Max. Transmission Rate 120 230 ♦kbps
3
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
ELECTRICAL SPECIFICATIONS
TA = 0 to 70°C and VCC = 3.3V ± 5% unless otherwise noted. The ♦ denotes the specications which apply over the full operating tempera-
ture range (-40°C to +85°C), unless otherwise specied.
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
V.28 RECEIVER DC Parameters (Inputs)
Input Impedance 3 7 ♦kΩ Per Figure 7
Open-Circuit Bias +2.0 ♦V Per Figure 8
HIGH Threshold 1.7 3.0 ♦V
LOW Threshold 0.8 1.2 ♦V
V.28 RECEIVER AC Parameters VCC = 3.3V for AC parameters
Propagation Delay: tPHL 100 500 ns
Propagation Delay: tPLH 100 500 ns
Max. Transmission Rate 120 230 kbps
V.10 DRIVER DC Parameters (Outputs)
Open Circuit Voltage +/-4.0 +/-6.0 ♦V Per Figure 9
Test-Terminated Voltage 0.9VCC V Per Figure 10
Short-Circuit Current +/-150 mA Per Figure 11
Power-Off Current +/-100 ♦µA Per Figure 12
V.10 DRIVER AC Parameters (Outputs) VCC = 3.3V for AC parameters
Transition Time 200 ♦ns Per Figure 13, 10% to 90%
Propagation Delay: tPHL 100 500 ♦ns
Propagation Delay: tPLH 100 500 ♦ns
Max. Transmission Rate 120 ♦kbps
V.10 RECEIVER DC Parameters (Inputs)
Input Current -3.25 +3.25 mA Per Figures 14 and 15
Input Impedance 4 ♦kΩ
Sensitivity +/-0.3 ♦V
V.10 RECEIVER AC Parameters VCC = 3.3V for AC parameters
Propagation Delay: tPHL 120 250 ♦ns
Propagation Delay: tPLH 120 250 ♦ns
Max. Transmission Rate 120 ♦kbps
4
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
ELECTRICAL SPECIFICATIONS
TA = 0 to 70°C and VCC = 3.3V ± 5% unless otherwise noted. The ♦ denotes the specications which apply over the full operating tempera-
ture range (-40°C to +85°C), unless otherwise specied.
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
V.11 DRIVER DC Parameters (Outputs)
Open Circuit Voltage (VOC) +/-6.0 ♦V Per Figure 16
Test Terminated Voltage +/-2.0 ♦V Per Figure 17
0.5(VOC)♦V
Balance +/-0.4 V Per Figure 17
Offset +3.0 ♦V Per Figure 17
Short-Circuit Current +/-150 ♦mA Per Figure 18
Power-Off Current +/-100 ♦µA Per Figure 19
V.11 DRIVER AC Parameters (Outputs) VCC = 3.3V for AC parameters
Transition Time 10 ♦ns Per Figures 21 and 35, 10% to
90% using CL = 50pF
Propagation Delay: tPHL 30 85 ♦ns Per Figures 32 and 35
Propagation Delay: tPLH 30 85 ♦ns Per Figures 32 and 35
Differential Skew 5 10 ♦ns Per Figures 32 and 35
Max. Transmission Rate 20 ♦Mbps
V.11 RECEIVER DC Parameters (Inputs)
Common Mode Range -7 +7 ♦V
Sensitivity +/-0.2 ♦V
Input Current -3.25 +3.25 mA Per Figures 20 and 22; Power on
or off
Current with 100Ω
Termination
+/-60 mA Per Figures 23 and 24
Input Impedance 4 ♦kΩ
V.11 RECEIVER AC Parameters VCC = 3.3V for AC parameters us-
ing CL = 50pF
Propagation Delay: tPHL 30 85 ns Per Figures 32 and 37
Propagation Delay: tPLH 30 85 ns Per Figures 32 and 37
Skew 5 10 ns Per Figure 32
Max. Transmission Rate 20 Mbps
5
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
ELECTRICAL SPECIFICATIONS
TA = 0 to 70°C and VCC = 3.3V ± 5% unless otherwise noted. The ♦ denotes the specications which apply over the full operating tempera-
ture range (-40°C to +85°C), unless otherwise specied.
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
V.35 DRIVER DC Parameters (Outputs)
Open Circuit Voltage +/-1.20 V Per Figure 16
Test Terminated Voltage +/-0.44 +/-0.66 V Per Figure 25
Offset +/-0.6 ♦V Per Figure 25
Output Overshoot -0.2VST +0.2VST ♦V Per Figure 25; VST = Steady State
value
Source Impedance 50 150 ♦ Ω Per Figure 26; ZS = V2/V1 x 50
Short-Circuit Impedance 135 165 Ω Per Figure 27
V.35 DRIVER AC Parameters (Outputs) VCC = 3.3V for AC parameters
Transition Time 20 ♦ns
Propagation Delay: tPHL 30 85 ♦ns Per Figures 32 and 35; CL = 20pF
Propagation Delay: tPLH 30 85 ♦ns Per Figures 32 and 35; CL = 20pF
Differential Skew 5 ♦ns Per Figures 32 and 35; CL = 20pF
Max. Transmission Rate 20 ♦Mbps
V.35 RECEIVER DC Parameters (Inputs)
Sensitivity +/-50 +/-200 ♦mV
Source Impedance 90 110 ΩPer Figure 29; ZS = V2/V1 x 50Ω
Short-Circuit Impedance 135 165 ΩPer Figure 30
V.35 RECEIVER AC Parameters VCC = 3.3V for AC parameters
Propagation Delay: tPHL 30 85 ns Per Figures 32 and 37; CL = 20pF
Propagation Delay: tPLH 30 85 ns Per Figures 32 and 37; CL = 20pF
Skew 5 10 ns Per Figure 32; CL = 20pF
Max. Transmission Rate 20 Mbps
TRANSCEIVER LEAKAGE CURRENTS
Driver Output 3-State Cur-
rent
200 µA Per Figure 31; Drivers Disabled
Receiver Output 3-State
Current
1 10 µA DX = 111
6
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
ELECTRICAL SPECIFICATIONS
TA = 0 to 70°C and VCC = 3.3V ± 5% unless otherwise noted. The ♦ denotes the specications which apply over the full operating tempera-
ture range (-40°C to +85°C), unless otherwise specied.
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
POWER REQUIREMENTS
VCC 3.15 3.3 3.45 V
ICC (No Mode Selected) 1 ♦µA All ICC values are with VCC = +3.3V
(V.28 / RS-232) 95 ♦mA fIN = 230kbps; Drivers active and
loaded
(V.11 / RS-422) 230 ♦mA fIN = 20Mbps; Drivers active and
loaded
(EIA-530 & RS-449) 270 ♦ mA fIN = 20Mbps; Drivers active and
loaded
(V.35) 170 ♦mA V.35 @ fIN = 20Mbps, V.28 @ fIN =
230kbps
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Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
OTHER AC CHARACTERISTICS
PARAMETER MIN. TYP. MAX. Units CONDITIONS
DRIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE
RS-232/V.28
tPZL; Tri-state to Output LOW 0.70 5.0 µs CL = 100pF, Fig. 33 & 39; S1 closed
tPZH; Tri-state to Output HIGH 0.40 2.0 µs CL = 100pF, Fig. 33 & 39; S2 closed
tPLZ; Output LOW to Tri-state 0.20 2.0 µs CL = 100pF, Fig. 33 & 39; S1 closed
tPHZ; Output HIGH to Tri-state 0.40 2.0 µs CL = 100pF, Fig. 33 & 39; S2 closed
RS-423/V.10
tPZL; Tri-state to Output LOW 0.15 2.0 µs CL = 100pF, Fig. 33 & 39; S1 closed
tPZH; Tri-state to Output HIGH 0.20 2.0 µs CL = 100pF, Fig. 33 & 39; S2 closed
tPLZ; Output LOW to Tri-state 0.20 2.0 µs CL = 100pF, Fig. 33 & 39; S1 closed
tPHZ; Output HIGH to Tri-state 0.15 2.0 µs CL = 100pF, Fig. 33 & 39; S2 closed
RS-422/V.11
tPZL; Tri-state to Output LOW 2.80 10.0 µs CL = 100pF, Fig. 33 & 36; S1 closed
tPZH; Tri-state to Output HIGH 0.10 2.0 µs CL = 100pF, Fig. 33 & 36; S2 closed
tPLZ; Output LOW to Tri-state 0.10 2.0 µs CL = 15pF, Fig. 33 & 36; S1 closed
tPHZ; Output HIGH to Tri-state 0.10 2.0 µs CL = 15pF, Fig. 33 & 36; S2 closed
V.35
tPZL; Tri-state to Output LOW 2.60 10.0 µs CL = 100pF, Fig. 33 & 36; S1 closed
tPZH; Tri-state to Output HIGH 0.10 2.0 µs CL = 100pF, Fig. 33 & 36; S2 closed
tPLZ; Output LOW to Tri-state 0.10 2.0 µs CL = 15pF, Fig. 33 & 36; S1 closed
tPHZ; Output HIGH to Tri-state 0.15 2.0 µs CL = 15pF, Fig. 33 & 36; S2 closed
RECEIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE
RS-232/V.28
tPZL; Tri-state to Output LOW 0.12 2.0 µs CL = 100pF, Fig. 34 & 37; S1 closed
tPZH; Tri-state to Output HIGH 0.10 2.0 µs CL = 100pF, Fig. 34 & 37; S2 closed
tPLZ; Output LOW to Tri-state 0.10 2.0 µs CL = 100pF, Fig. 34 & 37; S1 closed
tPHZ; Output HIGH to Tri-state 0.10 2.0 µs CL = 100pF, Fig. 34 & 37; S2 closed
RS-423/V.10
tPZL; Tri-state to Output LOW 0.10 2.0 µs CL = 100pF, Fig. 34 & 37; S1 closed
tPZH; Tri-state to Output HIGH 0.10 2.0 µs CL = 100pF, Fig. 34 & 37; S2 closed
tPLZ; Output LOW to Tri-state 0.10 2.0 µs CL = 100pF, Fig. 34 & 37; S1 closed
tPHZ; Output HIGH to Tri-state 0.10 2.0 µs CL = 100pF, Fig. 34 & 37; S2 closed
TA = 0 to 70°C and VCC = 3.3V ± 5% unless otherwise noted.
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Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
OTHER AC CHARACTERISTICS: Continued
TA = 0 to 70°C and VCC = +3.3V unless otherwise noted.
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
RS-422/V.11
tPZL; Tri-state to Output LOW 0.10 2.0 µs CL = 100pF, Fig. 34 &
38; S1 closed
tPZH; Tri-state to Output HIGH 0.10 2.0 µs CL = 100pF, Fig. 34 &
38; S2 closed
tPLZ; Output LOW to Tri-state 0.10 2.0 µs CL = 15pF, Fig. 34 &
38; S1 closed
tPHZ; Output HIGH to Tri-state 0.10 2.0 µs CL = 15pF, Fig. 34 &
38; S2 closed
V.35
tPZL; Tri-state to Output LOW 0.10 2.0 µs CL = 100pF, Fig. 34 &
38; S1 closed
tPZH; Tri-state to Output HIGH 0.10 2.0 µs CL = 100pF, Fig. 34 &
38; S2 closed
tPLZ; Output LOW to Tri-state 0.10 2.0 µs CL = 15pF, Fig. 34 &
38; S1 closed
tPHZ; Output HIGH to Tri-state 0.10 2.0 µs CL = 15pF, Fig. 34 &
38; S2 closed
TRANSCEIVER TO TRANSCEIVER SKEW (per Figures 32, 35, 37)
RS-232 Driver 100 ns [ (tPHL )Tx1 – (tPHL )Txn ]
100 ns [ (tPLH )Tx1 – (tPLH )Txn]
RS-232 Receiver 20 ns [ (tPHL )Rx1 – (tPHL )Rxn ]
20 ns [ (tPLH )Rx1 – (tPLH )Rxn ]
RS-422 Driver 2 ns [ (tPHL)Tx1 – (tPHL )Txn ]
2 ns [ (tPLH )Tx1 – (tPLH )Txn ]
RS-422 Receiver 3 ns [ (tPHL )Rx1 – (tPHL: )Rxn ]
3 ns [ (tPLH )Rx1 – (tPLH )Rxn ]
RS-423 Driver 5 ns [ (tPHL )Tx2 – (tPHL )Txn ]
5 ns [ (tPLH )Tx2 – (tPLH )Txn ]
RS-423 Receiver 5 ns [ (tPHL )Rx2 – (tPHL )Rxn ]
5 ns [ (tPLH )Rx2 – (tPLH )Rxn ]
V.35 Driver 4 ns [ (tPHL )Tx1 – (tPHL )Txn ]
4 ns [ (tPLH )Tx1 – (tPLH )Txn ]
V.35 Receiver 6 ns [ (tPHL )Rx1 – (tPHL )Rxn ]
6 ns [ (tPLH )Rx1 – (tPLH )Rxn]
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Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
PINOUT
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Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
SP3508 Pin Designation
Pin Number Pin Name Description
1 GND Signal Ground
2 SDEN TxD Driver Enable Input
3 TTEN TxCE Driver Enable Input
4 STEN ST Driver Enabe Input
5 RSEN RTS Driver Enable Input
6 TREN DTR Driver Enable Input
7 RRCEN DCD Driver Enable Input
8 RLEN RL Driver Enable Input
9 LLEN# LL Driver Enable Input
10 RDEN# RxD Receiver Enabe Input
11 RTEN# RxC Receiver Enable Input
12 TxCEN# TxC Receiver Enable Input
13 CSEN# CTS Receiver Enable Input
14 DMEN# DSR Receiver Enable Input
15 RRTEN# DCDDTE Receiver Enable Input
16 ICEN# RI Receiver Enable Input
17 TMEN TM Receiver Enable Input
18 D0 Mode Select Input
19 D1 Mode Select Input
20 D2 Mode Select Input
21 DLATCH# Decoder Latch Input
22 TERM_OFF Termination Disable Input
23 VCC Power Supply Input
24 C3P Charge Pump Capacitor
25 GND Signal Ground
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Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
SP3508 Pin Designation
Pin Number Pin Name Description
26 C3N Charge Pump Capacitor
27 VSS2 Minus VCC
28 AGND Signal Ground
29 AVCC Power Supply Input
30 LOOPBACK# Loopback Mode Enable Input
31 TxD TxD Driver TTL Input
32 TxCE TxCE Driver TTL input
33 ST ST Driver TTL Input
34 RTS RTS Driver TTL Input
35 DTR DTR Driver TTL Input
36 DCD_DCE DCDDCE Driver TTL Input
37 RL RL Driver TTL Input
38 LL LL Driver TTL Input
39 RxD RxD Receiver TTL Output
40 RxC RxC Receiver TTL Output
41 TxC TxC Receiver TTL Output
42 CTS CTS Receiver TTL Output
43 DSR DSR Receiver TTL Output
44 DCD_DTE DCDDTE Receiver TTL Output
45 RI RI Receiver TTL Output
46 TM TM Receiver TTL Output
47 GND Signal Ground
48 VCC Power Supply Input
49 RD(B) RxD Non-Inverting Input
50 RD(A) RxD Inverting Input
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Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
SP3508 Pin Designation
Pin Number Pin Name Description
51 RT(B) RxC Non-Inverting Input
52 RT(A) RxC Inverting Input
53 TxC(B) TxC Non-Inverting Input
54 GND Signal Ground
55 TxC(A) TxC Inverting Input
56 CS(B) CTS Non-Inverting Input
57 CS(A) CTS Inverting Input
58 DM(B) DSR Non-Inverting Input
59 DM(A) DSR Inverting Input
60 GNDV10 V.10 RX Reference Node
61 RRT(B) DCDDTE Non-Inverting Input
62 RRT(A) DCDDTE Inverting Input
63 IC RI Receiver Input
64 TM(A) TM Receiver Input
65 LL(A) LL Driver Output
66 VCC Power Supply Input
67 RL(A) RL Driver Output
68 VSS1 -2xVCC Charge Pump Output
69 C2N Charge Pump Capacitor
70 C1N Charge Pump Capacitor
71 GND Signal Ground
72 C2P Charge Pump Capacitor
73 VCC Power Supply Input
74 C1P Charge Pump Capacitor
75 GND Signal Ground
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Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
SP3508 Pin Designation
Pin Number Pin Name Description
76 VDD 2xVCC Charge Pump Output
77 RRC(B) DCDDCE Non-Inverting Output
78 VCC Power Supply Input
79 RRC(A) DCDDCE Inverting Output
80 GND Signal Ground
81 RS(A) RTS Inverting Output
82 VCC Power Supply Input
83 RS(B) RTS Non-Inverting Output
84 GND Signal Ground
85 TR(A) DTR Inverting Output
86 VCC Power Supply Input
87 TR(B) DTR Non-Inverting Output
88 GND Signal Ground
89 ST(A) ST Inverting Output
90 VCC Power Supply Input
91 ST(B) ST Non-Inverting Output
92 GND Signal Ground
93 TT(A) TxCE Inverting Output
94 VCC Power Supply Input
95 TT(B) TxCE Non-Inverting Output
96 GND Signal Ground
97 SD(A) TxD Inverting Output
98 VCC Power Supply Input
99 SD(B) TxD Non-Inverting Output
100 VCC Power Supply Input
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Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Table 1. Driver Mode Selection
Table 2. Receiver Mode Selection
SP3508 Driver Table
SP3508 Receiver Table
Driver Output
Pin V.35 Mode EIA-530
Mode
RS-232
Mode
(V.28)
EIA-530A
Mode
RS-449
Mode
(V.36)
X.21 Mode
(V.11) Shutdown Suggested
Signal
MODE
(D0, D1, D2)
001 010 011 100 101 110 111
T
1
OUT(a) V.35 V.11 V.28 V.11 V.11 V.11 High-Z TxD(a)
T
1
OUT(b) V.35 V.11 High-Z V.11 V.11 V.11 High-Z TxD(b)
T
2
OUT(a) V.35 V.11 V.28 V.11 V.11 V.11 High-Z TxCE(a)
T
2
OUT(b) V.35 V.11 High-Z V.11 V.11 V.11 High-Z TxCE(b)
T
3
OUT(a) V.35 V.11 V.28 V.11 V.11 V.11 High-Z TxC_DCE(a)
T
3
OUT(b) V.35 V.11 High-Z V.11 V.11 V.11 High-Z TxC_DCE(b)
T
4
OUT(a) V.28 V.11 V.28 V.11 V.11 V.11 High-Z RTS(a)
T
4
OUT(b) High-Z V.11 High-Z V.11 V.11 V.11 High-Z RTS(b)
T
5
OUT(a) V.28 V.11 V.28 V.10 V.11 V.11 High-Z DTR(a)
T
5
OUT(b) High-Z V.11 High-Z High-Z V.11 V.11 High-Z DTR(b)
T
6
OUT(a) V.28 V.11 V.28 V.11 V.11 V.11 High-Z DCD_DCE(a)
T
6
OUT(b) High-Z V.11 High-Z V.11 V.11 V.11 High-Z DCD_DCE(b)
T
7
OUT(a) V.28 V.10 V.28 V.10 V.10 High-Z High-Z RL
T
8
OUT(a) V.28 V.10 V.28 V.10 V.10 High-Z High-Z LL
Receiver Input
Pin V.35 Mode EIA-530
Mode
RS-232
Mode
(V.28)
EIA-530A
Mode
RS-449
Mode
(V.36)
X.21 Mode
(V.11) Shutdown Suggested
Signal
MODE
(D0, D1, D2)
001 010 011 100 101 110 111
R
1
IN(a) V.35 V.11 V.28 V.11 V.11 V.11 High-Z RxD(a)
R
1
IN(b) V.35 V.11 High-Z V.11 V.11 V.11 High-Z RxD(b)
R
2
IN(a) V.35 V.11 V.28 V.11 V.11 V.11 High-Z RxC(a)
R
2
IN(b) V.35 V.11 High-Z V.11 V.11 V.11 High-Z RxC(b)
R
3
IN(a) V.35 V.11 V.28 V.11 V.11 V.11 High-Z TxC_DTE(a)
R
3
IN(b) V.35 V.11 High-Z V.11 V.11 V.11 High-Z TxC_DTE(b)
R
4
IN(a) V.28 V.11 V.28 V.11 V.11 V.11 High-Z CTS(a)
R
4
IN(b) High-Z V.11 High-Z V.11 V.11 V.11 High-Z CTS(b)
R
5
IN(a) V.28 V.11 V.28 V.10 V.11 V.11 High-Z DSR(a)
R
5
IN(b) High-Z V.11 High-Z High-Z V.11 V.11 High-Z DSR(b)
R
6
IN(a) V.28 V.11 V.28 V.11 V.11 V.11 High-Z DCD_DTE(a)
R
6
IN(b) High-Z V.11 High-Z V.11 V.11 V.11 High-Z DCD_DTE(b)
R
7
IN(a) V.28 V.10 V.28 V.10 V.10 High-Z High-Z RI
R
8
IN(a) V.28 V.10 V.28 V.10 V.10 High-Z High-Z TM
15
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Figure 1. V.28 Driver Output Open Circuit Voltage Figure 2. V.28 Driver Output Loaded Voltage
Figure 3. V.28 Driver Output Slew Rate Figure 4. V.28 Driver Output Short-Circuit Current
Figure 6. V.28 Driver Output Rise/Fall Times
Figure 5. V.28 Driver Output Power-Off Impedance
TEST CIRCUITS
A
VOC
C
A
VT
C
3kΩ
A
V
T
C
7kΩ
Oscilloscope
Scope used f or sle w rate
measurement.
A
I
sc
C
A
C
V
CC
= 0V
±2V
I
x
A
C
3kΩ 2500pF
Oscilloscope
16
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Figure 7. V.28 Receiver Input Impedance Figure 8. V.28 Receiver Input Open Circuit Bias
Figure 9. V.10 Driver Output Open-Circuit Voltage Figure 10. V.10 Driver Output Test Terminated Volt-
age
Figure 12. V.10 Driver Output Power-Off CurrentFigure 11. V.10 Driver Output Short-Circuit Current
A
C
I
ia
±15V
A
C
v
oc
A
VOC
3.9kΩ
C
A
Vt
450Ω
C
A
I
sc
C
A
C
±0.25V
V
CC
= 0V
I
x
17
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Figure 13. V.10 Driver Output Transition Time Figure 14. V.10 Receiver Input Current
Figure 15. V.10 Receiver Input IV Graph Figure 16. V.11 Driver Output Open-Circuit Voltage
Figure 17. V.11 Driver Output Test Terminated Volt-
age
Figure 18. V.11 Driver Output Short-Circuit Current
A
450Ω
C
Oscilloscope
A
C
I
ia
±10V
A
B
V
OC
3.9kΩ
V
OCA
V
OCB
C
A
B
V
T
50Ω
V
OS
C
50Ω
A
B
C
Isa
Isb
V.10 R E CE IV E R
+3. 25mA
-3. 25 mA
+3V +10V
-3V-10V
Ma ximum Input C urrent
Vers us Voltage
18
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Figure 19. V.11 Driver Output Power-Off Current Figure 20. V.11 Receiver Input Current
Figure 21. V.11 Driver Output Rise/Fall Time Figure 22. V.11 Receiver Input IV Graph
A
B
C
I
xa
±0 .2 5V
A
B
C
I
xb
±0 .2 5V
V
CC
= 0V
V
CC
= 0V
A
B
C
I
ia
±1 0V
C
I
ib
±1 0V
A
B
A
B
50Ω
C
50Ω
50Ω V
E
Oscilloscope
V.11 RE C E IVE R
+3. 25 mA
-3. 25 mA
+3V +10V
-3V-10V
Ma ximu m Input C urrent
Vers us Voltage
19
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Figure 23. V.11 Receiver Input Current w/ Termina-
tion
Figure 24. V.11 Receiver Input Graph with Termina-
tion
Figure 25. V.35 Driver Output Test Terminated Volt-
age
Figure 26. V.35 Driver Output Source Impedance
A
B
C
I
ia
±6 V
C
I
ib
±6 V
A
B
100Ω to
150Ω
100Ω to
150Ω
A
B
V
2
50Ω
C
24kHz, 550mV
p-p
S ine Wa ve
V
1
A
B
50Ω
C
50Ω
V
T
V
OS
V.11 R E CE IVE R
w/ Optional Ca ble Termina tion
(100W to 150W) i [mA] = V [V] / 0.1
i [mA] = V [V] - 3) / 4. 0
i [mA] = V [V] / 0.1
i [mA] = V [V] - 3) / 4.0
-6V -3V
+3V +6V
Maximum Input C urrent
versus Voltage
Figure 27. V.35 Driver Output Short-Circuit Imped-
ance
A
B
C
I
S C
±2V
20
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Figure 31. Driver Output Leakage Current Test
Figure 32. Driver/Receiver Timing Test Circuit
Figure 29. V.35 Receiver Input Source Impedance
Figure 28. V.35 Driver Output Rise/Fall Time
Figure 30. V.35 Receiver Input Short-Circuit Imped-
ance
A
B
C
50Ω
Oscilloscope
50Ω
50Ω
A
B
V
2
50Ω
C
24kHz, 55 0mV
p-p
S ine Wa ve
V
1
A
B
C
I
sc
±2V
A
B
I
ZS C
Logic “1”
±10V
1 1 1
D
2
D
1
D
0
V
CC
= 0V
V
CC
Any one of the three conditions f or disab ling the driver.
I
ZS C
±10V
C
L 1
15pF
RO U T
B
A
B
A
TIN
C
L 2
f
IN
(50% Duty Cycle, 2.5V P-P )
21
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Figure 33. Driver Timing Test Load Circuit Figure 34. Receiver Timing Test Load Circuit
Figure 35. Driver Propagation Delays
Figure 36. Driver Enable and Disable Times
Figure 37. Receiver Propagation Delays
500Ω
C
L
Output
Under
Test
S
1
S
2
V
CC
1K Ω
1K ΩCR L
R eceiver
Output S1
S2
Tes t P oint
VCC
+3V
0V
5V
VOL
A, B
0V
1.5V 1.5V
tZL
t
ZH
VOH
A, B 2.3V
2.3V
tLZ
tHZ
0.5V
0.5V
Output normally LO W
Output normally H IGH
Mx or Tx_Enable
f = 1MHz; tR ≤ 10ns; tF ≤ 10ns
V
OH
V
OL
R E C E IVE R OUT (V OH - V OL )/2 (V OH - VOL )/2
t
PLH
f > 10MHz; t
R
< 5ns; t
F
< 5ns
OUTP UT
V
0D2
+
V
0D2
–
A – B 0V 0V
t
PHL
INP UT
tSKEW
= | tPHL - tPLH
|
+3V
0V
DR IV E R
INP UT
A
B
DR IV E R
OUTP UT
V
O
+
DIFFE R E NTIAL
OUTP UT
V
B
– V
A
0V
V
O
–
1.5V 1.5V
t
PLH
t
R
t
F
f > 10MHz; t
R
< 5ns; t
F
< 5ns
V
O
1/2V
O
1/2V
O
t
PHL
t
DPLH
t
DPHL
t
SKEW =
|
t
DPLH -
t
DPHL
|
22
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Figure 38. Receiver Enable and Disable Times
Figure 39. V.28 (RS-232) and V.10 (RS-423) Driver Enable and Disable Times
+3V
0V
Tx_Enable 1.5V 1.5V
tZL
f = 60kH z; t
R < 10ns ; tF < 10ns
TOUT
tLZ
Output LOW
0V
+3V
0V
VOH
1.5V 1.5V
tZH
f = 60kH z; tR < 10ns; t
F < 10ns
TOUT
t
HZ
Output HIG H
0V
Tx_Enable
VOL
0.5V
VOH -
VOL 0.5V
-VOL 0.5V
-
+3V
0V
+3.3V
R E C E IVE R OUT
0V
1.5V 1.5V
t
ZL
t
ZH
f = 1MHz; t
R
< 10ns ; t
F
< 10ns
R E C E IVE R OUT 1.5V
1.5V
t
LZ
t
HZ
0.5V
0.5V
Output normally LOW
Output normally H IG H
V
IL
V
IH
DE Cx
R xENABLE
23
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Figure 40. Typical V.10 Driver Output Waveform. Figure 41. Typical V.11 Driver Output Waveform.
Figure 42. Typical V.28 Driver Output Waveform. Figure 43. Typical V.35 Driver Output Waveform.
24
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Figure 44. Functional Diagram
TxD
SD(a)
SD(b)
SDEN
V
CC
V
DD
C1-C1+
+3.3V
(decoupling capacitor not shown)
1mF
SP3508
TxCE
TT(a)
TT(b)
TTEN
ST
ST(a)
ST(b)
STEN
RD(a)
RxD
RDEN
RD(b)
RT(a)
RxC
RTEN
RT(b)
TxC(a)
TxC
TxCEN
TxC(b)
CS(a)
CTS
CSEN
CS(b)
DM(a)
DSR
DMEN
DM(b)
RRT(a)
DCD_DTE
RRTEN
RRT(b)
TM(a)
TM
TMEN
RTS
RS(a)
RS(b)
RSEN
DTR
TR(a)
TR(b)
TREN
DCD_DCE
RRC(a)
RRC(b)
RRCEN
LL
LL(a)
LLEN
C2-C2+
1mF
1mF
GND
D0
D1
D2
TERM-OFF
D-LATCH
V.10-GND
RL
RL(a)
RLEN
IC
RI
ICEN
LOOPBACK
76
29
50
39
10
49
52
40
11
51
55
41
12
53
57
42
14
56
59
43
13
58
62
44
15
61
63
45
16
64
46
17
18
19
20
21
22
30
+3.3V
(See pinout assignments for
GND and V
CC
pins)
74 70 72 69
AGND
31
97
99
2
32
93
95
3
33
89
91
4
34
81
83
6
35
85
87
5
36
79
77
7
37
67
8
38
65
9
60
28
V.35 MODE
RX ENABLE
51ohms
51ohms
124ohms
RECEIVER TERMINATION NETWORK
V.11 MODE
V.35 MODE
TX ENABLE
51ohms
51ohms
124ohms
V.35 DRIVER TERMINATION NETWORK
V
SS1
68
V
SS2
1mF
27
1mF
1mF
24
26
AV
CC
C3-
C3+
Inverter
Regulated Charge Pump
C
VDD
C1 C2
C3
C
VSS1
C
VSS2
25
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
The SP3508 contains highly integrated se-
rial transceivers that offer programmability
between interface modes through software
control. The SP3508 offers the hardware
interface modes for RS-232 (V.28), RS-
449/V.36 (V.11 and V.10), EIA-530 (V.11 and
V.10), EIA-530A (V.11 and V.10), V.35 (V.35
and V.28) and X.21(V.11). The interface mode
selection is done via three control pins, which
can be latched via microprocessor control.
The SP3508 has eight drivers, eight receiv-
ers, and a patented on-board charge pump
(5,306,954) that is ideally suited for wide
area network connectivity and other multi-
protocol applications. Other features include
digital and line loopback modes, individual
enable/disable control lines for each driver
and receiver, fail-safe when inputs are either
open or shorted.
THEORY OF OPERATION
The SP3508 device is made up of
1) the drivers
2) the receivers
3) charge pumps
4) DTE/DCE switching algorithm
5) control logic.
Drivers
The SP3508 has eight enhanced indepen-
dent drivers. Control for the mode selection
is done via a three-bit control word into D0,
D1, and D2. The drivers are prearranged
such that for each mode of operation, the
relative position and functionality of the driv-
ers are set up to accommodate the selected
interface mode. As the mode of the drivers
is changed, the electrical characteristics
will change to support the required signal
levels. The mode of each driver in the dif-
ferent interface modes that can be selected
is shown in Table 1.
There are four basic types of driver circuits –
ITU-T-V.28 (RS-232), ITU-T-V.10 (RS-423),
ITU-T-V.11 (RS-422), and CCITT-V.35.
The V.28 (RS-232) drivers output single-
ended signals with a minimum of +5V (with
3kΩ & 2500pF loading), and can operate over
120kbps. Since the SP3508 uses a charge
pump to generate the RS-232 output rails, the
driver outputs will never exceed +10V. The
V.28 driver architecture is similar to Sipex's
standard line of RS-232 transceivers.
The RS-423 (V.10) drivers are also single-
ended signals which produce open circuit VOL
and VOH measurements of +4.0V to +6.0V.
When terminated with a 450Ω load to ground,
the driver output will not deviate more than
10% of the open circuit value. This is in com-
pliance of the ITU V.10 specication. The V.10
(RS-423) drivers are used in RS-449/V.36,
EIA-530, and EIA-530A modes as Category
II signals from each of their corresponding
specications. The V.10 driver can transmit
over 120Kbps if necessary.
The third type of drivers are V.11 (RS-422)
differential drivers. Due to the nature of dif-
ferential signaling, the drivers are more im-
mune to noise as opposed to single-ended
transmission methods. The advantage is
evident over high speeds and long trans-
mission lines. The strength of the driver
outputs can produce differential signals that
can maintain +2V differential output levels
with a load of 100Ω. The strength allows the
SP3508 differential driver to drive over long
cable lengths with minimal signal degrada-
tion. The V.11 drivers are used in RS-449,
EIA-530, EIA-530A and V.36 modes as
Category I signals which are used for clock
and data. Exar's new driver design over its
predecessors allow the SP3508 to operate
over 20Mbps for differential transmission.
The fourth type of drivers are V.35 differential
drivers.
There are only three available on the
SP3508 for data and clock (TxD, TxCE, and
TxC in DCE mode).
FEATURES
26
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
These drivers are current sources that
drive loop current through a differential pair
resulting in a 550mV differential voltage at
the receiver. These drivers also incorporate
xed termination networks for each driver in
order to set the VOH and VOL depending on
load conditions. This termination network is
basically a “Y” conguration consisting of
two 51Ω resistors connected in series and
a 124Ω resistor connected between the two
50Ω resistors to GND. Filtering can be done
on these pins to reduce common mode noise
transmitted over the transmission line by
connecting a capacitor to ground.
The drivers also have separate enable pins
which simplies half-duplex congurations
for some applications, especially program-
mable DTE/DCE. The enable pins will either
enable or disable the output of the drivers
according to the appropriate active logic
illustrated on Figure 44. The enable pins
have internal pull-up and pull-down devices,
depending on the active polarity of the re-
ceiver, that enable the driver upon power-on
if the enable lines are left oating. During
disabled conditions, the driver outputs will
be at a high impedance 3-state.
The driver inputs are both TTL or CMOS
compatible. All driver inputs have an internal
pull-up resistor so that the output will be at
a dened state at logic LOW (“0”). Unused
driver inputs can be left oating. The inter-
nal pull-up resistor value is approximately
500kΩ.
Receivers
The SP3508 has eight enhanced inde-
pendent receivers. Control for the mode
selection is done via a three-bit con-
trol word that is the same as the driver
control word. Therefore, the modes for
the drivers and receivers are identical in the
application. Like the drivers, the receivers
are prearranged for the specic requirements
of the synchronous serial interface. As the
operating mode of the receivers is changed,
the electrical characteristics will change
to support the required serial interface
protocols of the receivers. Table 1 shows
the mode of each receiver in the different
interface modes that can be selected.
There are two basic types of receiver cir-
cuits—ITU-T-V .28 (RS-232) and ITU-T-V.11,
(RS-422).
The RS-232 (V.28) receiver is single-ended
and accepts RS-232 signals from the RS-
232 driver. The RS-232 receiver has an
operating input voltage range of +15V and
can receive signals downs to +3V. The input
sensitivity complies with RS-232 and V.28
at +3V. The input impedance is 3kΩ to 7kΩ
in accordance to RS-232 and V.28. The re-
ceiver output produces a TTL/CMOS signal
with a +2.4V minimum for a logic “1” and a
+0.4V maximum for a logic “0”. The RS-232
(V.28) protocol uses these receivers for all
data, clock and control signals. They are also
used in V.35 mode for control line signals:
CTS, DSR, LL, and RL. The RS-232 receiv-
ers can operate over 120kbps.
The second type of receiver is a differential
type that can be congured internally to
support ITU-T-V.10 and CCITT-V.35
depending on its input conditions. This
receiver has a typical input impedance
of 10kΩ and a differential threshold of
less than +200mV, which complies with
the ITU-T-V.11 (RS-422) specications.
V.11 receivers are used in RS-449/V.36,
EIA-530, EIA-530A and X.21 as Category I
signals for receiving clock, data, and some
control line signals not covered by Category
II V.10 circuits. The differential V.11 trans-
ceiver has improved architecture that allows
over 20Mbps transmission rates.
Receivers dedicated for data and clock (RxD,
RxC, TxC) incorporate internal termination
for V.11. The termination resistor is typi-
cally 120Ω connected between the A and
B inputs. The termination is essential for
minimizing crosstalk and signal reection
over the transmission line . The minimum
value is guaranteed to exceed 100Ω, thus
complying with the V.11 and RS-422 speci-
cations. This resistor is invoked when the
receiver is operating as a V.11 receiver, in
modes EIA-530, EIA-530A, RS-449/V.36,
and X.21.
FEATURES
27
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
The same receivers also incorporate a ter-
mination network internally for V.35 applica-
tions. For V.35, the receiver input termination
is a “Y” termination consisting of two 51Ω
resistors connected in series and a 124Ω
resistor connected between the two 50Ω
resistors and GND. The receiver itself is
identical to the V.11 receiver.
The differential receivers can be congured
to be ITU-T-V.10 single-ended receivers by
internally connecting the non-inverting input
to ground. This is internally done by default
from the decoder. The non-inverting input is
rerouted to V10GND and can be grounded
separately. The ITU-T-V.10 receivers can
operate over 120Kbps and are used in RS-
449/V.36, E1A-530, E1A-530A and X.21
modes as Category II signals as indicated
by their corresponding specications. All
receivers include an enable/disable line
for disabling the receiver output allowing
convenient half-duplex congurations. The
enable pins will either enable or disable the
output of the receivers according to the ap-
propriate active logic illustrated on Figure
44. The receiver’s enable lines include an
internal pull-up or pull-down device, depend-
ing on the active polarity of the receiver, that
enables the receiver upon power up if the
enable lines are left oating. During disabled
conditions, the receiver outputs will be at
a high impedance state. If the receiver is
disabled any associated termination is also
disconnected from the inputs.
All receivers include a fail-safe feature that
outputs a logic high when the receiver inputs
FEATURES
are open, terminated but open, or shorted
together. For single-ended V.28 and V.10
receivers, there are internal 5kΩ pull-down
resistors on the inputs which produces a
logic high (“1”) at the receiver outputs. The
differential receivers have a proprietary cir-
cuit that detect open or shorted inputs and
if so, will produce a logic HIGH (“1”) at the
receiver output.
CHARGE PUMP
SP3508 uses an internal capacitive charge
pump to generate Vdd and Vss. The design
is a patented (5,306,954) four-phased volt-
age shifting charge pump converters that
converts the input voltage of 3.3V to nomi-
nal output voltages of +/-6V (Vdd & Vss1).
SP3508 also includes an inverter block
that inverts Vcc to -Vcc (Vss2). There is a
free-running oscillator that controls the four
phases of the voltage shifting. A description
of each phase follows.
4-phased doubler pump
Phase 1
-VSS1 charge storage -During this phase of
the clock cycle, the positive side of capacitors
C1 and C2 are initially charged to VCC. C1+
is then switched to ground and the charge in
C1- is transferred to C2-. Since C2+ is con-
nected to VCC, the voltage potential across
capacitor C2 is now 2xVCC.
V
CC
= +3V
–3 V –3 V
+3V
V
SS1
S tora ge C apacitor
V
DD
S tora ge C apacitor
C
1
C
2
+
+
+ + –
–
––
C
VDD
CVSS1
Figure 45. Charge Pump - Phase 1.
28
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Phase 2
-VSS1 transfer -Phase two of the clock connects the negative terminal of C2 to the VSS1 storage
capacitor and the positive terminal of C2 to ground, and transfers the negative generated
voltage to CVSS1. This generated voltage is regulated to -5.5V. Simultaneously, the positive
side of the capacitor C1 is switched to VCC and the negative side is connected to ground.
FEATURES
Phase 3
-VDD charge storage -The third phase of the clock is identical to the rst phase-the charge
transferred in C1 produces -VCC in the negative terminal of C1 which is applied to the negative
side of the capacitor C2. Since C2+ is at VCC, the voltage potential across C2 is 2xVCC.
VCC = +3V
–6 V
VSS S tora ge C apacitor
VDD S tora ge C apacitor
C1C2
+
+
+ +
–
–
––
CVDD
CVSS1
Figure 46. Charge Pump - Phase 2.
VCC = +3V
–3 V
+3V
–3 V
VSS1 S tora ge C apacitor
VDD S tora ge C apacitor
C1C2
+
+
+ + –
–
––
CVSS1
CVDD
Figure 47.Charge Pump - Phase 3.
-VDD transfer -The fourth phase of the clock connects the negative terminal of C2 to ground,
and transfers the generated 5.5V across C2 to CVDD, the VDD storage capacitor. This voltage
is regulated to +5.5V. At the regulated voltage, the internal oscillator is disabled and simulta-
neously with this, the positive side of capacitor C1 is switched to VCC and the negative side
is connected to ground, and the cycle begins again. The charge pump cycle will continue as
long as the operational conditions for the internal oscillator are present. Since both V+ and
V- are separately generated from VCC; in a no-load condition V+ and V- will be symmetrical.
Older charge pump approaches that generate V- from V+ will show a decrease in the mag-
nitude of V- compared to V+ due to the inherent inefciencies in the design. The clock rate
for the charge pump typically operates at 250kHz. The external capacitors can be as low as
1µF with a 16V breakdown voltage rating.
Phase 4
29
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
V
CC
= +3V
+6V
V
SS1
S tora ge C apacitor
V
DD
S tora ge C apacitor
C
1
C
2
+
+
+ + –
–
––
C
VDD
C
VSS1
Figure 48. Charge Pump - Phase 4.
2-phased inverter pump
Phase 1
Please refer to gure below: In the rst phase of the clock cycle, switches S2 and S4 are
opened and S1 and S3 closed. This connects the ying capacitor, C3, from Vin to ground.
C3 charge up to the input voltage applied at Vcc.
Phase 2
In the second phase of the clock cycle, switches S2 and S4 are closed and S1 and S3 are
opened. This connects the ying capacitor, C3, in parallel with the output capacitor, CVSS2.
The Charge stored in C3 is now transferred to CVSS2. Simultaneously, the negative side of
CVSS2 is connected to VSS2 and the positive side is connected to ground. With the voltage
across CVSS2 smaller than the voltage across C3, the charge ows from C3 to CVSS2 until the
voltage at the VSS2 equals -VCC.
C
3
S
2
S
1
S
3
S
4
V
SS2
C
VSS2
++
V
CC
V
SS2
= -V
CC
Figure 49. Circuit for an Ideal Voltage Inverter.
FEATURES
30
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Recommended Signals and Port Pin Assignments
Pin
Number
Pin Mnemonic Circuit Pin Mnemonic
Pin
Number
Signal
Type
Mnemo
nic
DB-25
Pin(F)
Signal
Type
Mnemo
nic
DB-25
Pin(F)
Signal
Type
Mnemo
nic
DB-37
Pin(F)
Signal
Type
Mnemo
nic
M34
Pin(F)
Signal
Type
Mnemo
nic
DB-15
Pin(F)
31 TxD SD(A) 97 V.28 BB 3 V.11 BB(A) 3 V.11 RD(A) 6 V.35 104 R V.11 R(A) 4
2 SDEN SD(B) 99 V.11 BB(B) 16 V.11 RD(B) 24 V.35 104 T V.11 R(B) 11
32 TxCE TT(A) 93 V.28 DD 17 V.11 DD(A) 17 V.11 RT(A) 8 V.35 115 V V.11 B(A) 7**
3 TTEN TT(B) 95 V.11 DD(B) 9 V.11 RT(B) 26 V.35 115 X V.11 B(B) 14**
33 ST ST(A) 89 V.28 DB 15 V.11 DB(A) 15 V.11 ST(A) 5 V.35 114 Y V.11 S(A) 6
4 STEN ST(B) 91 V.11 DB(B) 12 V.11 ST(B) 23 V.35 114 AA V.11 S(B) 13
34 RTS RS(A) 81 V.28 CB 5 V.11 CB(A) 5 V.11 CS(A) 9 V.28 106 D V.11 I(A) 5
5 RSEN RS(B) 83 V.11 CB(B) 13 V.11 CS(B) 27 V.11 I(B) 12
35 DTR TR(A) 85 V.28 CC 6 V.11 CC(A) 6 V.11 DM(A) 11 V.28 107 E
6 TREN TR(B) 87 V.11 CC(B) 22 V.11 DM(B) 29
36 DCD_DCE RRC(A) 79 V.28 CF 8 V.11 CF(A) 8 V.11 RR(A) 13 V.28 109 F
7 RRCEN RRC(B) 77 V.11 CF(B) 10 V.11 RR(B) 31
37 RL RL(A) 67 V.28 CE 22 V.28 125 J
8 RLEN
38 LL LL(A) 65 V.28 TM 25 V.10 TM 25 V.10 TM 18 V.28 142 NN
9 LLEN#
39 RxD RD(A) 50 V.28 BA 2 V.11 BA(A) 2 V.11 SD(A) 4 V.35 103 P V.11 T(A) 2
10 RDEN# RD(B) 49 V.11 BA(B) 12 V.11 SD(B) 22 V.35 103 S V.11 T(B) 9
40 RxC RT(A) 52 V.28 DA 24 V.11 DA(A) 24 V.11 TT(A) 17 V.35 113 U V.11 X(A) 7**
11 RTEN# RT(B) 51 V.11 DA(B) 11 V.11 TT(B) 35 V.35 113 W V.11 X(B) 14**
41 TxC TxC(A) 55
12 TxCEN# TxC(B) 53
42 CTS CS(A) 57 V.28 CA 4 V.11 CA(A) 4 V.11 RS(A) 7 V.28 105 C V.11 C(A) 3
13 CSEN# CS(B) 56 V.11 CA(B) 19 V.11 RS(B) 25 V.11 C(B) 10
43 DSR DM(A) 59 V.28 CD 20 V.11 CD(A) 20 V.11 TR(A) 12 V.28 108 H
14 DMEN# DM(B) 58 V.11 CD(B) 23 V.11 TR(B) 30
44 DCD_DTE RRT(A) 62
15 RRTEN# RRT(B) 61
45 RI IC 63 V.28 RL 21 V.10 RL 21 V.10 RL 14 V.28 140 N
16 ICEN#
46 TM TM(A) 64 V.28 LL 18 V.10 LL 18 V.10 LL 10 V.28 141 L
17 TMEN
SP3508 Multiprotocol Configured as DCE
Interface to System Logic
Interface to Port-
Connector
Receiver_4
Receiver_5
Receiver_6
Driver_7
Driver_8
RS-449
V.35
X.21
Driver_1
RS-232 or V.24
EIA-530
Receiver_2
Receiver_3
Driver_2
Driver_3
Driver_4
Driver_5
Receiver_1
Driver_6
Spare drivers and receivers may be used for optional signals (Signal
Quality, Rate Detect, Standby) or may be disabled using individual
enable pins for each driver and receiver
** X.21 use either B() or
X(), not both
Pin assignments and signal functions are subject to national or regional variation and
proprietary / non-standard implementations
Receiver_7
Receiver_8
DCE CONFIGURATION
31
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Recommended Signals and Port Pin Assignments
Pin
Number
Pin Mnemonic Circuit Pin Mnemonic
Pin
Number
Signal
Type
Mnemo
nic
DB-25
Pin(M)
Signal
Type
Mnemo
nic
DB-25
Pin(M)
Signal
Type
Mnemo
nic
DB-37
Pin(M)
Signal
Type
Mnemo
nic
M34
Pin(M)
Signal
Type
Mnemo
nic
DB-15
Pin(M)
31 TxD SD(A) 97 V.28 BA 2 V.11 BA(A) 2 V.11 SD(A) 4 V.35 103 P V.11 T(A) 2
2 SDEN SD(B) 99 V.11 BA(B) 12 V.11 SD(B) 22 V.35 103 S V.11 T(B) 9
32 TxCE TT(A) 93 V.28 DA 24 V.11 DA(A) 24 V.11 TT(A) 17 V.35 113 U V.11 X(A) 7**
3 TTEN TT(B) 95 V.11 DA(B) 11 V.11 TT(B) 35 V.35 113 W V.11 X(B) 14**
33 ST ST(A) 89
4 STEN ST(B) 91
34 RTS RS(A) 81 V.28 CA 4 V.11 CA(A) 4 V.11 RS(A) 7 V.28 105 C V.11 C(A) 3
5 RSEN RS(B) 83 V.11 CA(B) 19 V.11 RS(B) 25 V.11 C(B) 10
35 DTR TR(A) 85 V.28 CD 20 V.11 CD(A) 20 V.11 TR(A) 12 V.28 108 H
6 TREN TR(B) 87 V.11 CD(B) 23 V.11 TR(B) 30
36 DCD_DCE RRC(A) 79
7 RRCEN RRC(B) 77
37 RL RL(A) 67 V.28 RL 21 V.10 RL 21 V.10 RL 14 V.28 140 N
8 RLEN
38 LL LL(A) 65 V.28 LL 18 V.10 LL 18 V.10 LL 10 V.28 141 L
9 LLEN#
39 RxD RD(A) 50 V.28 BB 3 V.11 BB(A) 3 V.11 RD(A) 6 V.35 104 R V.11 R(A) 4
10 RDEN# RD(B) 49 V.11 BB(B) 16 V.11 RD(B) 24 V.35 104 T V.11 R(B) 11
40 RxC RT(A) 52 V.28 DD 17 V.11 DD(A) 17 V.11 RT(A) 8 V.35 115 V V.11 B(A) 7**
11 RTEN# RT(B) 51 V.11 DD(B) 9 V.11 RT(B) 26 V.35 115 X V.11 B(B) 14**
41 TxC TxC(A) 55 V.28 DB 15 V.11 DB(A) 15 V.11 ST(A) 5 V.35 114 Y V.11 S(A) 6
12 TxCEN# TxC(B) 53 V.11 DB(B) 12 V.11 ST(B) 23 V.35 114 AA V.11 S(B) 13
42 CTS CS(A) 57 V.28 CB 5 V.11 CB(A) 5 V.11 CS(A) 9 V.28 106 D V.11 I(A) 5
13 CSEN# CS(B) 56 V.11 CB(B) 13 V.11 CS(B) 27 V.11 I(B) 12
43 DSR DM(A) 59 V.28 CC 6 V.11 CC(A) 6 V.11 DM(A) 11 V.28 107 E
14 DMEN# DM(B) 58 V.11 CC(B) 22 V.11 DM(B) 29
44 DCD_DTE RRT(A) 62 V.28 CF 8 V.11 CF(A) 8 V.11 RR(A) 13 V.28 109 F
15 RRTEN# RRT(B) 61 V.11 CF(B) 10 V.11 RR(B) 31
45 RI IC 63 V.28 CE 22 V.28 125 J
16 ICEN#
46 TM TM(A) 64 V.28 TM 25 V.10 TM 25 V.10 TM 18 V.28 142 NN
17 TMEN
RS-449
V.35
X.21
Receiver_7
Receiver_8
RS-232 or V.24
EIA-530
Receiver_4
Receiver_5
Receiver_6
Driver_7
Driver_8
Driver_6
Driver_2
Driver_3
Driver_4
Driver_5
Spare drivers and receivers may be used for optional signals (Signal
Quality, Rate Detect, Standby) or may be disabled using individual
enable pins for each driver and receiver
** X.21 use either B() or
X(), not both
Pin assignments and signal functions are subject to national or regional variation and
proprietary / non-standard implementations
SP3508 Multiprotocol Configured as DTE
Interface to System Logic
Interface to Port-
Connector
Driver_1
Receiver_1
Receiver_2
Receiver_3
DTE CONFIGURATION
32
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
TERM_OFF FUNCTION
The SP3508 contains a TERM_OFF pin that
disables all three receiver input termination
networks regardless of mode. This allows
the device to be used in monitor mode ap-
plications typically found in networking test
equipment.
The TERM_OFF pin internally contains a
pull-down device with an impedance of over
500kΩ, which will default in a "ON" condition
during power-up if V.35 receivers enable
line and the SHUTDOWN mode from the
decoder will disable the termination regard-
less of TERM_OFF.
LOOPBACK FUNCTION
The SP3508 contains a LOOPBACK pin that
invokes a loopback path. This loopback path
is illustrated in Figure 50. LOOPBACK has
an internal pull-up resistor that defaults to
normal mode during power up or if the pin is
left oating. During loopback, the driver out-
put and receiver input characteristics will still
adhere to its appropriate specications.
DECODER AND D_LATCH FUNCTION
The SP3508 contains a D_LATCH pin that
latches the data into the D0, D1 and D2
decoder inputs. If tied to a logic LOW ("0"),
the latch is transparent, allowing the data at
the decoder inputs to propagate through and
program the SP3508 accordingly. If tied to a
logic HIGH ("1"), the latch locks out the data
and prevents the mode from changing until
this pin is brought to a logic LOW.
FEATURES
There are internal pull-up devices on D0,
D1 and D2, which allow the device to be in
SHUTDOWN mode ("111") upon power up.
However, if the device is powered-up with
the D_LATCH at a logic HIGH, the decoder
state of the SP3508 will be undened.
CTR1/CTR2 EUROPEAN COMPLIANCY
As with all of Exar's previous multi-protocol
serial transceiver IC's the drivers and re-
ceivers have been designed to meet all the
requirements to NET1/NET2 and TBR2 in
order to meet CTR1/CTR2 compliancy. The
SP3508 is also tested in-house at Exar and
adheres to all the NET1/2 physical layer
testing and the ITU Series V specications
before shipment. Please note that although
the SP3508, as with its predecessors, ad-
here to CRT1/CTR2 compliancy testing,
any complex or usual conguration should
be double-checked to ensure CTR1/CTR2
compliance. Consult the factory for details.
33
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Figure 50. Loopback Path
SD(a)
SD(b)
RD(a)
RD(b)
TT(a)
TT(b)
RT(a)
RT(b)
TxD
RxD
TxCE
RxC
ST(a)
ST(b)
TxC(a)
TxC(b)
ST
TxC
RS(a)
RS(b)
CS(a)
CS(b)
TR(a)
TR(b)
DM(a)
DM(b)
RTS
CTS
DTR
DSR
RRC(a)
RRC(b)
RR T(a)
RR T(b)
DCD_DCE
DCD_DTE
RL(a)
IC
RL
RI
LL(a)
TM(a)
LL
TM
31
39
32
40
33
41
34
42
35
43
36
44
37
45
38
46
97
99
50
49
93
95
52
51
89
91
55
53
81
83
57
56
85
87
59
58
79
77
62
61
67
63
65
64
34
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
Figure 51. SP3508 Typical Operating Conguration to Serial Port Connector with DCE/DTE program-
mability
20 (V.11, V.28) DTR_DSR_A
23 (V.11) DTR_DSR_B
1mF1mF
C
VDD
V
CC
V
DD
C1- C2-
C1+ C2+
1mF
SP3508CF
TxD
TxCE
ST
RTS
DTR
DCD_DCE
RL
RxC
TxC
CTS
DSR
DCD_DTE
RI
TM
10mF
m
DB-26 Serial Port Connector Pins Signal (DTE_DCE)
2 (V.11, V.35, V.28) TXD_RXD_A
14 (V.11, V.35) TXD_RXD_B
11 (V.11, V.35) TXCE_TXC_B
25 (V.10, V.28) LL_TM
15 (V.11, V.35, V.28) *TXC_RXC_A
12 (V.11, V.35) *TXC_RXC_B
SDEN
24 (V.11, V.35, V.28) TXCE_TXC_A
3 (V.11, V.35, V.28) RXD_TXD_A
16 (V.11, V.35) RXD_TXD_B
8 (V.11, V.28) DCD_DCD_A
10 (V.11) DCD_DCD_B
9 (V.11, V.35) RXC_TXCE_B
17 (V.11, V.35, V.28) RXC_TXCE_A
LLEN
STEN
GND
* - Driver applies for DCE only on pins 15 and 12.
Receiver applies for DTE only on pins 15 and 12.
+3.3V
I/O Lines represented by double arrowhead signifies a bi-directional bus.
Input Line
Output Line
LL
RxD
TTEN
RSEN
TREN
RRCEN
RLEN
RDEN
TMEN
TxCEN
RTEN
CSEN
DMEN
RRTEN
ICEN
TERM_OFF
D_LATCH
D0
D1
D2
Charge Pump Section
Transceiver Section
Logic Section
+3.3V
21 (V.10, V.28) RL_RI
22 (V.10, V.28) RI_RL
18 (V.10, V.28) LL_TM
DCE/DTE
Driver applies for DCE only on pins 8 and 10.
Receiver applies for DTE only on pins 8 and 10.
LOOPBACK
+3.3V
19 (V.11) RTS_CTS_B
4 (V.11, V.28) RTS_CTS_A
6 (V.11, V.28) DSR_DTR_A
22 (V.11) DSR_DTR_B
13 (V.11) CTS_RTS_B
5 (V.11, V.28) CTS_RTS_A
31 SD(a)
35
34
38
39
40
42
43
44
41
32
36
45
37
46
AGND
SD(b)
TT(a)
TT(b)
ST(a)
ST(b)
RS(a)
RS(b)
TR(a)
TR(b)
RRC(a)
RRC(b)
RL(a)
RD(a)
LL(a)
RD(b)
RT(a)
RT(b)
TxC(a)
TxC(b)
CS(a)
CS(b)
DM(a)
DM(b)
RRT(a)
RRT(b)
IC
TM(a)
18
19
20
97
99
93
95
89
91
81
83
85
87
79
77
67
50
65
49
51
55
53
57
56
59
58
62
61
63
64
52
21
22
30
28
+3.3V
AV
CC
24
26
68
27
V
SS2
V
SS1
C3+
C3-
6972
7074
76
29
1mF
C1 C2
C3
C
VSS1
C
VSS2
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
33
35
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
PACKAGE: 100 PIN LQFP
36
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com SP3508_100_072208
ORDERING INFORMATION
Part Number Temperature Range Package Types
SP3508CF-L ........................................... 0°C to +70°C .................................................. 100–pin JEDEC LQFP
SP3508EF-L ........................................ -40°C to +85°C .................................................. 100–pin JEDEC LQFP
Notice
EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reliabil-
ity. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are only for
illustration purposes and may vary depending upon a user's specic application. While the information in this publication has been carefully checked;
no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to signicantly affect its safety or effectiveness. Products are not authorized for
use in such applications unless EXAR Corporation receives, in writting, assurances to its satisfaction that: (a) the risk of injury or damage has been
minimized ; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances.
Copyright 2008 EXAR Corporation
Datasheet July 2008
Send your Interface technical inquiry with technical details to: uarttechsupport@exar.com
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
Date Revision Description
1/12/04 A Implemented Tracking revision
2/27/04 B Included Diamond column in spec table inidcating which specs apply over full
operating temperature range. Correct typo to Fig. 51 pin 61 and 62.
3/31/04 C Corrected max dimension for symbol c on LQFP package outline
6/03/04 D Added table to page 27 and 28
10/12/04 E Certied conformance to NET1/NET2 and TBR-1/TBR-2 TUV by TUV Rhein-
land (Test report # TBR2/30451940.001/04)
10/29/04 F Corrected V.28 Driver Open circuit values, pages 27 and 28 -- both for DCE
and DTE that BA(B) should connect to pin 14.
7/17/08 1.0.0 Change Revision format from letter code to number code. Change Logo,
footnote and notice statement from Sipex to Exar. Add TJ limits to Absolute
Maximum Ratings. Change propagation delay limit specication for V.11 and
V.35 Driver/Receiver from 60ns Maximum to 85ns Maximum. Update ordering
information to show only RoHS packaging (-L) is available.
REVISION HISTORY
