DATA SH EET
Product specification
File under Integrated Circuits, IC06 December 1990
INTEGRATED CIRCUITS
74HC/HCT243
Quad bus transceiver; 3-state
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
December 1990 2
Philips Semiconductors Product specification
Quad bus transceiver; 3-state 74HC/HCT243
FEATURES
•Non-inverting 3-state outputs
•2-way asynchronous data bus communication
•Output capability: bus driver
•ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT243 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT243 are quad bus transceivers featuring
non-inverting 3-state bus compatible outputs in both send
and receive directions.
They are designed for 4-line asynchronous 2-way data
communications between data buses.
The output enable inputs (OEA and OEB) can be used to
isolate the buses.
The “243” is similar to the “242” but has non-inverting (true)
outputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25°C; tr=t
f= 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD=C
PD × VCC2× fi+ ∑ (CL× VCC2 × fo) where:
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× VCC2× fo) = sum of outputs
CL= output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI= GND to VCC
For HCT the condition is VI= GND to VCC − 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
HC HCT
tPHL/ tPLH propagation delay
An to Bn;
Bn to An
CL= 15 pF; VCC = 5 V 6 11 ns
CIinput capacitance 3.5 3.5 pF
CI/O input/output capacitance 10 10 pF
CPD power dissipation capacitance per transceiver notes 1 and 2 26 34 pF
December 1990 3
Philips Semiconductors Product specification
Quad bus transceiver; 3-state 74HC/HCT243
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1OEAoutput enable input (active LOW)
2, 12 n.c. not corrected
3, 4, 5, 6 A0 to A3data inputs/outputs
7 GND ground (0 V)
11, 10, 9, 8 B0 to B3data inputs/outputs
13 OEBoutput enable input
14 VCC positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
December 1990 4
Philips Semiconductors Product specification
Quad bus transceiver; 3-state 74HC/HCT243
Fig.4 Functional diagram.
FUNCTION TABLE
Notes
1. H = HIGH voltage level
L = LOW voltage level
Z = high impedance OFF-state
INPUTS INPUTS/OUTPUTS
OEAOEBAnBn
L
H
L
H
L
L
H
H
inputs
Z
Z
A=B
B=A
Z
Z
inputs
December 1990 5
Philips Semiconductors Product specification
Quad bus transceiver; 3-state 74HC/HCT243
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: bus driver
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr=t
f= 6 ns; CL= 50 pF
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HC VCC
(V) WAVEFORMS
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
An to Bn;
Bn to An
22
8
6
90
18
15
115
23
20
135
27
23
ns 2.0
4.5
6.0
Fig.5
tPZH/ tPZL 3-state output enable time
OEA to An or Bn;
OEB to An or Bn
50
18
14
150
30
26
190
38
33
225
45
38
ns 2.0
4.5
6.0
Figs 6 and 7
tPHZ/ tPLZ 3-state output disable time
OEA to An or Bn;
OEB to An or Bn
61
22
18
165
33
28
205
41
35
250
50
43
ns 2.0
4.5
6.0
Figs 6 and 7
tTHL/ tTLH output transition time 14
5
4
60
12
10
75
15
13
90
18
15
ns 2.0
4.5
6.0
Fig.5
December 1990 6
Philips Semiconductors Product specification
Quad bus transceiver; 3-state 74HC/HCT243
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: bus driver
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr=t
f= 6 ns; CL= 50 pF
INPUT UNIT LOAD COEFFICIENT
An
Bn
OEA
OEB
1.10
1.10
1.00
1.00
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HCT VCC
(V) WAVEFORMS
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
An to Bn;
Bn to An
13 22 28 33 ns 4.5 Fig.5
tPZH/ tPZL 3-state output enable time
OEA to An or Bn;
OEB to An or Bn
18 34 43 51 ns 4.5 Figs 6 and 7
tPHZ/ tPLZ 3-state output disable time
OEA to An or Bn;
OEB to An or Bn
23 35 44 53 ns 4.5 Figs 6 and 7
tTHL/ tTLH output transition time 5 12 15 18 ns 4.5 Fig.5
December 1990 7
Philips Semiconductors Product specification
Quad bus transceiver; 3-state 74HC/HCT243
AC WAVEFORMS
Fig.5 Waveforms showing the input (An, Bn) to output (Bn, An) propagation delays and the output transition
times.
(1) HC : VM= 50%; VI= GND to VCC.
HCT: VM= 1.3 V; VI= GND to 3 V.
Fig.6 Waveforms showing the 3-state enable and disable times for input OEB.
(1) HC : VM= 50%; VI= GND to VCC.
HCT: VM= 1.3 V; VI= GND to 3 V.
Fig.7 Waveforms showing the 3-state enable and disable times for input OEA.
(1) HC : VM= 50%; VI= GND to VCC.
HCT: VM= 1.3 V; VI= GND to 3 V.
December 1990 8
Philips Semiconductors Product specification
Quad bus transceiver; 3-state 74HC/HCT243
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
