MAX8730
Low-Cost Battery Charger
________________________________________________________________ Maxim Integrated Products 1
19-3885; Rev 0; 12/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
General Description
The MAX8730 highly integrated, multichemistry, battery-
charger control IC simplifies construction of accurate
and efficient chargers. The MAX8730 operates at high
switching frequency to minimize external component
size and cost. The MAX8730 uses analog inputs to con-
trol charge current and voltage, and can be pro-
grammed by a microcontroller or hardwired.
The MAX8730 reduces charge current to give priority to
the system load, effectively limiting the adapter current
and reducing the adapter current requirements.
The MAX8730 provides a digital output that indicates
the presence of an AC adapter, and an analog output
that monitors the current drawn from the AC adapter.
Based on the presence and absence of the AC
adapter, the MAX8730 automatically selects the appro-
priate source for supplying power to the system by con-
trolling two external switches. Under system control, the
MAX8730 allows the battery to undergo a relearning
cycle in which the battery is completely discharged
through the system load and then recharged.
An analog output indicates adapter current or battery-
discharge current. The MAX8730 provides a low-quies-
cent-current linear regulator, which may be used when
the adapter is absent, or disabled for reduced current
consumption
The MAX8730 is available in a small, 5mm x 5mm, 28-
pin, thin (0.8mm) QFN package. An evaluation kit is
available to reduce design time. The MAX8730 is
available in a lead-free package.
Applications
Notebook Computers
Tablet PCs
Portable Equipment with Rechargeable Batteries
Features
Small Inductor (3.5µH)
Programmable Charge Current > 4.5A
Automatic Power-Source Selection
Analog Inputs Control Charge Current and
Charge Voltage
Monitor Outputs for
AC Adapter Current
Battery-Discharge Current
AC Adapter Presence
Independent 3.3V 20mA Linear Regulator
Up to 17.6V (max) Battery Voltage
+8V to +28V Input Voltage Range
Reverse Adapter Protection
System Short-Circuit Protection
Cycle-by-Cycle Current Limit
Ordering Information
PART TEMP
RANGE
PIN-
PACKAGE
PKG
CODE
MAX8730ETI+
-40°C to +85°C
28 Thin QFN
(5mm x 5mm)
T2855-5
+Denotes lead-free package.
Pin Configuration appears at end of data sheet.
MAX8730
ADAPTER
INPUT
PDS
SRC
ASNS
ACIN
ACOK
VCTL
LDO
CLS
ICTL
MODE
REFON
INPON LDO
RELTH
REF
SWREF
BATT
CSIN
CSIP
DHI
PDL
DHIV
IINP CCV
CCI CCS
CSSP CSSN
GND
REF
HOST
SYSTEM
LOAD
BATTERY
Typical Operating Circuit
MAX8730
Low-Cost Battery Charger
2_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1. VSRC = VASNS = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float,
ACIN = 0, CLS = REF, REFON = LDO, INPON = LDO, RELTH = 2V. TA= 0°C to +85°C, unless otherwise noted. Typical values are at
TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
CSSP, SRC, ACOK, ASNS, DHIV, BATT,
CSIP to GND.......................................................-0.3V to +30V
CSIP to CSIN or CSSP to CSSN ............................-0.3V to +0.3V
DHIV to SRC .................................................-6V to (SRC + 0.3V)
DHI to DHIV ...............................................-0.3V to (SRC + 0.3V)
PDL, PDS to GND ........................................-0.3V to (SRC + 0.3)
CCI, CCS, CCV, IINP, SWREF, REF,
MODE, ACIN to GND.............................-0.3V to (LDO + 0.3V)
RELTH, VCTL, ICTL, REFON, CLS, LDO,
INPON to GND .....................................................-0.3V to +6V
LDO Short-Circuit Current...................................................50mA
Continuous Power Dissipation (TA= +70°C)
28-Pin TQFN (derate 20.8mW/°C above +70°C) .......1667mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ............................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
CHARGE-VOLTAGE REGULATION
VCTL Range 0 3.6 V
Not including resistor
tolerances
-1.0
+1.0
VVCTL = 3.6V
or 0V Including 1% resistor
tolerances
-1.05
+1.05
Battery-Regulation Voltage
Accuracy
VVCTL = VLDO (3 or 4 cells)
-0.5
+0.5
%
VVCTL Default Threshold VVCTL rising 4.4 V
VVCTL = 3V 0 4
VCTL Input Bias Current SRC = BATT, ASNS = GND INPON =
REFON = 0, VVCTL = 5V 0 16
µA
CHARGE-CURRENT REGULATION
ICTL Range 0 3.6 V
128.25 135 141.75
mV
VICTL = 3.6V -5 +5 %
71.25
75
78.75
mV
Full-Charge-Current Accuracy
(CSIP to CSIN) VICTL = 2.0V -5 +5 %
Trickle-Charge-Current Accuracy
VICTL = 120mV 2.5 4.5 7.5 mV
Charge-Current Gain Error Based on VICTL = 3.6V and VICTL = 0.12V
-1.9
+1.9
%
Charge-Current Offset Error Based on VICTL = 3.6V and VICTL = 0.12V -2 +2 mV
BATT/CSIP/CSIN Input Voltage
Range 0 19 V
Charging enabled
300
600
CSIP/CSIN Input Current Charging disabled, SRC = BATT,
ASNS = GND or VICTL = 0V 8 16
µA
MAX8730
Low-Cost Battery Charger
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1. VSRC = VASNS = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float,
ACIN = 0, CLS = REF, REFON = LDO, INPON = LDO, RELTH = 2V. TA= 0°C to +85°C, unless otherwise noted. Typical values are at
TA= +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
ICTL falling 50 65 80
ICTL Power-Down Mode
Threshold ICTL rising 70 90 110
mV
VICTL = 3V -1 +1
ICTL Input Bias Current SRC = BATT, ASNS = GND, VICTL = 5V -1 +1
µA
CSSP-to-CSSN Full-Scale
Current-Sense Voltage
72.75 75.75 78.75
mV
72.75 75.75 78.75
mV
VCLS = REF (trim point) -4 +4 %
50 53 56 mV
VCLS = REF x 0.7
-5.6
+5.6
%
36 38
40.5
mV
Input Current-Limit Accuracy
VCLS = REF x 0.5
-6.6
+6.6
%
CSSP/CSSN Input Voltage Range
8.0 28 V
VCSSP = VCSSN = VSRC > 8.0V
400
800
CSSP/CSSN Input Current VSRC = 0V 0.1 1
µA
CLS Input Range 1.1
REF
V
CLS Input Bias Current VCLS = 2.0V -1 +1 µA
IINP Transconductance VCSSP - VCSSN = 56mV
2.66
2.8
2.94
µA/mV
VCSSP - VCSSN = 100mV, VIINP = 0 to 4.5V -5 +5
VCSSP - VCSSN = 75mV -8 +8
VCSSP - VCSSN = 56mV -5 +5
IINP Accuracy
VCSSP - VCSSN = 20mV
-12.5
+12.5
%
IINP Gain Error Based on V
IC T L =
RE F x 0.5 and V
IC T L = RE F -7 +7 %
IINP Offset Error Based on V
IC T L =
RE F x 0.5 and V
IC T L = RE F -2 +2 mV
IINP Fault threshold IINP rising 4.1 4.2 4.3 V
SUPPLY AND LINEAR REGULATOR
SRC Input Voltage Range 8.0 28 V
SRC falling 7 7.4
SRC Undervoltage Lockout
Threshold SRC rising 7.5 8
V
MAX8730
Low-Cost Battery Charger
4_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1. VSRC = VASNS = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float,
ACIN = 0, CLS = REF, REFON = LDO, INPON = LDO, RELTH = 2V. TA= 0°C to +85°C, unless otherwise noted. Typical values are at
TA= +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
Normal mode 4 6 mA
VINPON =VREFON = low
10 20
VINPON = low,
VREFON = high
300
600
VINPON = high,
VREFON = low
300
600
SRC Quiescent Current
(INPON/REFON = Don’t Care)
VSRC = VBATT =
12V, ASNS =
GND (Note 2)
VINPON = VREFON = high
350
600
µA
VBATT = 16.8V, VSRC = 19V, ICTL = 0 8 16
BATT Input Current
VBATT = 2V to 19V, VSRC > VBATT + 0.3V
300
600
µA
ICSIP + ICSIN + IBATT, ASNS = GND 2 5
VREFON = 5.4V
300
600
Battery-Leakage Current
ICSIP + ICSIN + IBATT +
ICSSP + ICSSN + ISRC,
ASNS = REFON = GND
INPON = GND
2 5
µA
LDO Output Voltage 8.0V < VSRC < 28V, no load 5.2
5.35
5.5 V
LDO Load Regulation 0 < ILDO < 10mA 20 50 mV
LDO Undervoltage Lockout
Threshold VSRC = 8.0V 4 V
REFERENCES
REF Output Voltage Ref
4.18 4.20 4.22
V
REF Undervoltage Lockout
Threshold REF falling 3.1 3.9 V
SWREF Output Voltage 8.0V < VSRC < 28V, no load
3.234
3.3
3.366
V
SWREF Load Regulation 0.1mA < ISWREF < 20mA 20 50 mV
TRIP POINTS
ACIN Threshold ACIN rising
2.037
2.1
2.163
V
ACIN Threshold Hysteresis 60 mV
ACIN Input Bias Current VACIN = 2.048V -1 +1 µA
SWITCHING REGULATOR
DHI Off-Time VBATT = 16.0V
300 350
400 ns
DHI Off-Time K Factor VBATT = 16.0V 4.8 5.6 6.4
V x µs
Sense Voltage for Minimum
Discontinuous Mode Ripple
Current
VCSIP - VCSIN 7 mV
Cycle-by-Cycle Current-Limit
Sense Voltage
160 200
240 mV
Charge Disable Threshold VSRC - VBATT, SRC falling 40 60 80 mV
DHIV Output Voltage With respect to SRC
-4.3 -4.8
-5.5 V
DHIV Sink Current 10 mA
MAX8730
Low-Cost Battery Charger
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1. VSRC = VASNS = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float,
ACIN = 0, CLS = REF, REFON = LDO, INPON = LDO, RELTH = 2V. TA= 0°C to +85°C, unless otherwise noted. Typical values are at
TA= +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
DHI Resistance Low IDHI = -10mA 2 4
DHI Resistance High IDHI = 10mA 1 2
ERROR AMPLIFIERS
V C TL = 3.6V , V
BAT T = 16.8V , M OD E = LD O
0.0625 0.125 0.250
GMV Loop Transconductance
V C TL = 3.6V , V
BAT T = 12.6V , M OD E = FLOAT 0.0833 0.167 0.333
mA/V
GMI Loop Transconductance ICTL = 3.6V, VCSSP - VCSIN = 75mV 0.5 1 2
mA/V
GMS Loop Transconductance VCLS = 2.048V, VCSSP - VCSSN = 75mV 0.5 1 2
mA/V
CCI/CCS/CCV Clamp Voltage
1.1V < VCCV < 3.0V,
1.1V < VCCI < 3.0V,
1.1V < VCCS < 3.0V
150 300
600 mV
LOGIC LEVELS
MODE, REFON Input Low Voltage
0.5 V
MODE Input Middle Voltage 1.9
2.65
3.3 V
M OD E , RE FON Inp ut H i g h V ol tag e
3.4 V
MODE, REFON, INPON Input
Bias Current MODE = 0 or 3.6V -2 +2 µA
VINPON rising
2.2
V
INPON Threshold
VINPON falling 0.8 V
ADAPTER DETECTION
ACOK Voltage Range 0 28 V
ACOK Sink Current VACOK = 0.4V, ACIN = 1.5V 1 mA
ACOK Leakage Current VACOK = 28V, ACIN = 2.5V 1 µA
BATTERY DETECTION
VMODE = VLDO
+140
BATT Overvoltage Threshold
VVCTL = VLDO , BATT
rising; result with respect
to battery-set voltage
VMODE = FLOAT
+100
mV
BATT Overvoltage Hysteresis
100
mV
RELTH Operating Voltage Range
0.9 2.6 V
RELTH Input Bias Current VRELTH = 0.9V to 2.6V -50 +50 nA
VRELTH = 0.9V
4.42
4.5
4.58
BATT Minimum Voltage Trip
Threshold VBATT falling VRELTH = 2.6V
12.77 13.0 13.23
V
PDS, PDL SWITCH CONTROL
Adapter-Absence Detect
Threshold VASNS - VBATT, VASNS falling
-300 -280 -240
mV
Adapter-Detect Threshold VASNS - VBATT
-140 -100
-60 mV
PDS Output Low Voltage Result with respect to SRC, IPDS = 0 -8 -10 -12 V
PDS/PDL Output High Voltage Result with respect to SRC, IPD_ = 0
-0.2
-0.5 V
PDS/PDL Turn-Off Current VPDS = VSRC - 2V, VSRC = 16V 6 12 mA
MAX8730
Low-Cost Battery Charger
6_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1. VSRC = VASNS = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float,
ACIN = 0, CLS = REF, REFON = LDO, INPON = LDO, RELTH = 2V. TA= 0°C to +85°C, unless otherwise noted. Typical values are at
TA= +25°C.)
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1. VSRC = VASNS = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float,
ACIN = 0, CLS = REF, REFON = LDO, INPON = LDO, RELTH = 2V. TA= -40°C to +85°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
PDS Turn-On Current PDS = SRC 6 12 mA
PDL Turn-On Resistance PDL = GND 50
100
200 k
PDS/PDL Delay Time 5.0 µs
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CHARGE-VOLTAGE REGULATION
VCTL Range 0 3.6 V
Not including resistor
tolerances -1.2 +1.2
VVCTL = 3.6V
or 0V Including 1% resistor
tolerances -1.25 +1.25
Battery-Regulation-Voltage
Accuracy
VVCTL = VLDO (3 or 4 cells) -0.8 +0.8
%
VVCTL Default Threshold VVCTL rising 4.4 V
VCTL Input Bias Current SRC = BATT, ASNS = GND INPON =
REFON = 0, VVCTL = 5V
0 16 µA
CHARGE-CURRENT REGULATION
ICTL Range 0 3.6 V
128.25 141.75 mV
VICTL = 3.6V -5 +5 %
70 80 mV
Full-Charge-Current Accuracy
(CSIP to CSIN)
VICTL = 2.0V -6.7 +6.7 %
Trickle-Charge-Current Accuracy VICTL = 120mV 2 10 mV
Charge-Current Gain Error Based on VICTL = 3.6V and VICTL = 0.12V -1.9 +1.9 %
Charge-Current Offset Error Based on VICTL = 3.6V and VICTL = 0.12V -2 +2 mV
BATT/CSIP/CSIN Input Voltage
Range 0 19 V
Charging enabled 1000
CSIP/CSIN Input Current
Charging disabled, SRC = BATT,
ASNS = GND, or VICTL = 0V 16
µA
ICTL falling 50 80
ICTL Power-Down Mode
Threshold
ICTL rising 70 110
mV
MAX8730
Low-Cost Battery Charger
_______________________________________________________________________________________ 7
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
INPUT-CURRENT REGULATION
CSSP-to-CSSN Full-Scale
Current-Sense Voltage
72.75
78.25
mV
VCLS = REF (trim point)
72.75
78.25
mV
VCLS = REF x 0.7
50.0
56.0
mVInput Current-Limit Accuracy
VCLS = REF x 0.5
36.00
40.50
mV
CSSP/CSSN Input Voltage Range
8.0 28 V
CSSP/CSSN Input Current VCSSP = VCSSN = VSRC > 8.0V
1000
µA
CLS Input Range 1.1
REF
V
IINP Transconductance VCSSP - VCSSN = 56mV
2.66
2.94
µA/mV
VCSSP - VCSSN = 100mV, VIINP = 0 to 4.5V -5 +5
VCSSP - VCSSN = 75mV -8 +8
VCSSP - VCSSN = 56mV -5 +5
IINP Accuracy
VCSSP - VCSSN = 20mV
-12.5
+12.5
%
IINP Gain Error
Based on V
I C T L =
RE F x 0.5 and V
I C T L = RE F
-7 +7 %
IINP Offset Error
Based on V
I C T L =
RE F x 0.5 and V
I C T L = RE F
-2 +2 mV
IINP Fault Threshold IINP rising 4.1 4.3 V
SUPPLY AND LINEAR REGULATOR
SRC Input Voltage Range 8.0 28 V
SRC falling 7
SRC Undervoltage Lockout
Threshold SRC rising 8
V
Normal mode 6 mA
VINPON = VREFON = low
20
VINPON = low,
VREFON = high 600
VINPON = high,
VREFON = low 600
SRC Quiescent Current
(INPON/REFON = Don’t Care)
SRC = VBATT =
12V, ASNS =
GND (Note 2)
VINPON = VREFON = high
600
µA
BATT Input Current
VBATT = 2V to 19V, VSRC > VBATT + 0.3V
600 µA
VREFON = 5.4V
600
Battery Leakage Current
ICSIP + ICSIN + IBATT
+ ICSSP + ICSSN + ISRC,
ASNS = REFON = GND
INPON = GND
16
µA
LDO Output Voltage 8.0V < VSRC < 28V, no load 5.2 5.5 V
LDO Load Regulation 0 < ILDO < 10mA 50 mV
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1. VSRC = VASNS = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float,
ACIN = 0, CLS = REF, REFON = LDO, INPON = LDO, RELTH = 2V. TA= -40°C to +85°C, unless otherwise noted.)
MAX8730
Low-Cost Battery Charger
8_______________________________________________________________________________________
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
REFERENCES
REF Output Voltage Ref 0 < IREF < 500µA
4.16
4.24
V
REF Undervoltage Lockout
Threshold REF falling 3.9 V
SWREF Output Voltage 8.0V < VSRC < 28V, no load
3.224
3.376
V
SWREF Load Regulation 0.1mA < ISWREF < 20mA 50 mV
TRIP POINTS
ACIN Threshold ACIN rising
2.037
2.163
V
SWITCHING REGULATOR
DHI Off-Time VBATT = 16.0V 300 400 ns
DHI Off-Time K Factor VBATT = 16.0V 4.8 6.4
V x µs
Cycle-by-Cycle Current-Limit
Sense Voltage 160 240 mV
DHIV Output Volatge With respect to SRC
-4.3
-5.5
V
DHIV Sink Current 10 mA
DHI Resistance Low IDHI = -10mA 4
DHI Resistance High IDHI = 10mA 2
ERROR AMPLIFIERS
V C TL = 3.6V , V
BAT T = 16.8V , M OD E = LD O
0.0625
0.250
GMV Loop Transconductance
V C TL = 3.6V , V
BAT T = 12.6V , M OD E = FLOAT 0.0833
0.333
mA/V
GMI Loop Transconductance ICTL = 3.6V, VCSSP - VCSIN = 75mV 0.5 2
mA/V
GMS Loop Transconductance VCLS = 2.048V, VCSSP - VCSSN = 75mV 0.5 2
mA/V
CCI/CCS/CCV Clamp Voltage
1.1V < VCCV < 3.0V, 1.1V < VCCI < 3.0V,
1.1V < VCCS < 3.0V 150 600 mV
LOGIC LEVELS
M OD E , RE FON Inp ut Low V ol tag e 0.5 V
MODE Input Middle Voltage 1.9 3.3 V
M OD E , RE FON Inp ut H i g h V ol tag e
3.4 V
VINPON rising
2.2
INPON Threshold
VINPON falling 0.8
V
ADAPTER DETECTION
ACOK Voltage Range 0 28 V
ACOK Sink Current VACOK = 0.4V, ACIN = 1.5V 1 mA
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1. VSRC = VASNS = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float,
ACIN = 0, CLS = REF, REFON = LDO, INPON = LDO, RELTH = 2V. TA= -40°C to +85°C, unless otherwise noted.)
MAX8730
Low-Cost Battery Charger
_______________________________________________________________________________________ 9
Note 1: Accuracy does not include errors due to external-resistance tolerances.
Note 2: In this mode, SRC current is drawn from the battery.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
BATTERY DETECTION
RELTH Operating Voltage Range
0.9 2.6 V
VRELTH = 0.9V 4.42
4.58
BATT Minimum Voltage Trip
Threshold VBATT falling
VRELTH = 2.6V 12.77
13.23
V
PDS, PDL SWITCH CONTROL
Adapter-Absence-Detect
Threshold VASNS - VBATT, VASNS falling
-310
-240
mV
Adapter-Detect Threshold VASNS - VBATT
-140
-60 mV
PDS Output Low Voltage Result with respect to SRC, IPDS = 0 -7 -12 V
PDS/PDL Output High Voltage Result with respect to SRC, IPD_ = 0
-0.5
V
PDS/ PDL Turn-Off Current VPDS = VSRC - 2V, VSRC = 16V 6 mA
PDS Turn-On Current PDS = SRC 6 mA
PDL Turn-On Resistance PDL = GND 50
100
200 k
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1. VSRC = VASNS = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float,
ACIN = 0, CLS = REF, REFON = LDO, INPON = LDO, RELTH = 2V. TA= -40°C to +85°C, unless otherwise noted.)
MAX8730
Low-Cost Battery Charger
10 ______________________________________________________________________________________
Typical Operating Characteristics
(Circuit of Figure 1, adapter = 19.5V, VBATT = 12V, VICTL = 2.4V, MODE > 1.8V, REFON = INPON = LDO, VRELTH = VREF/2, TA =
+25°C, unless otherwise noted.)
TRICKLE-CHARGE CURRENT
vs. BATTERY VOLTAGE
BATTERY VOLTAGE (V)
TRICKLE-CHARGE-CURRENT ERROR (%)
MAX8730 toc07
0369121518
-25
-20
-15
-10
-5
0
5
10
15
20
25
CHARGE CURRENT = 150mA
BATTERY-VOLTAGE ERROR
vs. CHARGE CURRENT
CHARGE CURRENT (A)
BATTERY-VOLTAGE ERROR (%)
MAX8730 toc08
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
-0.25
-0.20
-0.15
-0.10
-0.05
0
4 CELLS
3 CELLS
BATTERY-VOLTAGE ERROR vs. VCTL
VCTL (V)
CHARGE-VOLTAGE ERROR (%)
MAX8730 toc09
0 1.50.5 1.0 2.0 2.5 3.0 3.5
-1.0
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
INPUT CURRENT-LIMIT ERROR vs. CLS
VCLS (V)
INPUT CURRENT-LIMIT ERROR (%)
MAX8730 toc01
1.1 1.6 2.1 2.6 3.1 3.6 4.1
-15
-10
-5
0
5
10
15
TYPICAL UNIT
MINIMUM
MAXIMUM
INPUT CURRENT-LIMIT ERROR
vs. SYSTEM CURRENT
SYSTEM CURRENT (A)
INPUT CURRENT-LIMIT ERROR (%)
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
VIN = 17V
VIN = 19V
VIN = 24V
VCLS = VREF x 0.7
INPUT CURRENT-LIMIT ERROR
vs. SYSTEM CURRENT
SYSTEM CURRENT (A)
INPUT CURRENT-LIMIT ERROR (%)
MAX8730 toc03
012345
0
1
2
3
4
5
6
7
VCLS = VREF / 2
VCLS = VREF x 0.7
VCLS = VREF
IINP ERROR vs. VCSSP - VCSSN
MAX8730 toc04
VCSSP - VCSSN
IINP ERROR (%)
908070605040302010
-10
-5
0
5
10
15
-15
0 100
MINIMUM
MAXIMUM
CHARGE-CURRENT ERROR
vs. CHARGE-CURRENT SETTING
VICTL (V)
CHARGE-CURRENT ERROR (%)
MAX8730 toc05
0 0.6 1.2 1.8 2.4 3.0 3.6
-20
-15
-10
-5
0
5
10
15
20
TYPICAL UNIT
MINIMUM ERROR
MAXIMUM ERROR
CHARGE-CURRENT ERROR
vs. BATTERY VOLTAGE
BATTERY VOLTAGE (V)
CHARGE-CURRENT ERROR (%)
MAX8730 toc06
051015 20
-0.5
-0.2
0.1
0.4
0.7
1.0
1.3
1.6
VICTL = 2V
VICTL = 3.6V
MAX8730
Low-Cost Battery Charger
______________________________________________________________________________________ 11
OUTPUT RIPPLE VOLTAGE
vs. BATTERY VOLTAGE
BATTERY VOLTAGE (V)
OUTPUT RIPPLE VOLTAGE (mVP-P)
MAX8730 toc10
051015 20
0
0.03
0.06
0.09
0.12
0.15
0.18
Typical Operating Characteristics (continued)
(Circuit of Figure 1, adapter = 19.5V, VBATT = 12V, VICTL = 2.4V, MODE > 1.8V, REFON = INPON = LDO, VRELTH = VREF/2, TA =
+25°C, unless otherwise noted.)
SWITCHING FREQUENCY
vs. BATTERY VOLTAGE
BATTERY VOLTAGE (V)
SWITCHING FREQUENCY (kHz)
MAX8730 toc11
0369121518
200
400
600
800
1000
BATTERY REMOVAL
MAX8730toc12
13V
12.5V
COUT = 4.7µF
COUT = 10µF
4µs/div
CHARGE
CURRENT = 12V
ADAPTER INSERTION
MAX8730toc13
0V
20V
20V
0V
20V
0V
20V
0V
100µs/div
ADAPTER
PDS
PDL
SYSTEM
LOAD
ADAPTER
INSERTION
ADAPTER REMOVAL
MAX8730toc14
0V
20V
20V
0V
20V
0V
20V
0V
4ms/div
ADAPTER
PDS
PDL
SYSTEM
LOAD
BATTERY
VOLTAGE = 16.8V
SYSTEM LOAD TRANSIENT
MAX8730toc15
0A
5A
5A
0A
5A
0A
500mV/div
200µs/div
LOAD
CURRENT
ADAPTER
CURRENT
INDUCTOR
CURRENT
COMPENSATION
CCS
CCI
CCS
CCI
MAX8730
Low-Cost Battery Charger
12 ______________________________________________________________________________________
Typical Operating Characteristics (continued)
(Circuit of Figure 1, adapter = 19.5V, VBATT = 12V, VICTL = 2.4V, MODE > 1.8V, REFON = INPON = LDO, VRELTH = VREF/2, TA =
+25°C, unless otherwise noted.)
CHARGE CURRENT vs. TIME
TIME (h)
CHARGE CURRENT (A)
MAX8730 toc20
0 0.5 1.0 1.5 2.0 2.5 3.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
INITIAL CONDITION: 4 CELLS
10V BATTERY
FULL CHARGE = 16.8V
LDO LOAD REGULATION
ILDO (mA)
LDO ERROR (%)
MAX8730 toc21
01020304050
-0.9
-0.8
-0.6
-0.4
-0.2
-0.7
-0.5
-0.3
-0.1
0
CHARGER DISABLED
BATTERY LEAKAGE CURRENT
vs. BATTERY VOLTAGE
BATTERY VOLTAGE (V)
BATTERY-LEAKAGE CURRENT (µA)
MAX8730 toc19
0369121518
0
100
200
300
400
500
REFON = INPON = 1 REFON = 0
INPON = 1
REFON = 1
INPON = 0
REFON = INPON = 0
ADAPTER QUIESCENT CURRENT
vs. ADAPTER VOLTAGE
ADAPTER VOLTAGE (V)
ADAPTER QUIESCENT CURRENT (mA)
MAX8730 toc18
051015 20 25
0
0.5
1.0
1.5
2.0
2.5
3.0
BATTERY ABSENT
REFON = 1
INPON = 1
REFON = 0
INPON = 0
PEAK-TO-PEAK INDUCTOR CURRENT
vs. BATTERY VOLTAGE
BATTERY VOLTAGE (V)
PEAK-TO-PEAK INDUCTOR CURRENT (A)
MAX7830 toc16
0369121518
0.5
0.9
0.7
1.1
1.5
1.3
1.7
1.9
2.1
2.3
2.5
EFFICIENCY vs. CHARGE CURRENT
CHARGE CURRENT (A)
EFFICIENCY (%)
MAX8730 toc17
0 1.0 2.0 3.0 3.50.5 1.5 2.5 4.0
60
70
80
90
100
4 CELLS
3 CELLS
MAX8730
Low-Cost Battery Charger
______________________________________________________________________________________ 13
LDO LINE REGULATION
INPUT VOLTAGE (V)
LDO ERROR (%)
MAX8730 toc22
813182328
-0.400
-0.390
-0.380
-0.370
-0.360
-0.350
-0.395
-0.385
-0.375
-0.365
-0.355
REF ERROR vs. TEMPERATURE
TEMPERATURE (°C)
REF ERROR (%)
MAX8730 toc24
-40 -20 0 20 40 60 80
-0.35
-0.30
-0.25
-0.20
-0.15
-0.10
-0.05
0
REFERENCE LOAD REGULATION
IREF (µA)
REF (%)
MAX8730 toc23
0 100 200 300 400 500
-0.25
-0.23
-0.21
-0.19
-0.17
-0.15
-0.13
-0.11
CHARGER DISABLED
SWREF LOAD REGULATION
SWREF OUTPUT CURRENT (mA)
SWREF ERROR (%)
MAX8730 toc25
010203040
-1.5
-1.2
-0.9
-0.6
-0.3
0
SWREF VOLTAGE vs. TEMPERATURE
TEMPERATURE (°C)
SWREF VOLTAGE (V)
MAX8730 toc26
-40 -20 0 20 40 60 80
3.25
3.26
3.27
3.28
3.29
3.30
3.31
3.32
DISCONTINUOUS MODE
SWITCHING WAVEFORM
MAX8730toc27
0
0
0
20V
LX
DHI
INDUCTOR
CURRENT
20V
1A
1µs/div
CHARGE
CURRENT = 20mA
Typical Operating Characteristics (continued)
(Circuit of Figure 1, adapter = 19.5V, VBATT = 12V, VICTL = 2.4V, MODE > 1.8V, REFON = INPON = LDO, VRELTH = VREF/2, TA =
+25°C, unless otherwise noted.)
MAX8730
Low-Cost Battery Charger
14 ______________________________________________________________________________________
PIN
NAME
FUNCTION
1
ASNS
Adapter Voltage Sense. When VASNS > VBATT - 280mV, the battery switch is turned off and the adapter switch
is turned on. Connect to the adapter input using an RC filter as shown in Figure 1.
2 LDO
Linear-Regulator Output. LDO is the output of the 5.35V linear regulator supplied from SRC. Bypass LDO with
a 1µF ceramic capacitor from LDO to GND.
3
SWREF
3.3V Switched Reference. SWREF is a 1% accurate linear regulator that can deliver 20mA. SWREF remains
active when the adapter is absent and may be disabled by setting REFON to zero. Bypass SWREF with a 1µF
capacitor to GND.
4 REF 4.2V Voltage Reference. Bypass REF with a 1µF capacitor to GND.
5 CLS Source Current-Limit Input. Voltage input for setting the current limit of the input source.
6
ACIN
AC-Adapter-Detect Input. ACIN is the input to an uncommitted comparator. ACIN does not influence adapter
and battery selection.
7
VCTL
Charge-Voltage-Control Input. Connect VCTL to LDO for default 4.2V/cell.
8
RELTH
Relearn Threshold for Relearn Mode. In relearn mode, when VBATT < 5 x VRELTH, the MAX8730 drives PDS
low and drives PDL high to terminate relearning of a discharged battery. See the Relearn Mode section for
more details.
9
ACOK
AC Detect Output. This open-drain output pulls low when ACIN is greater than REF/2 and ASNS is greater
than BATT - 100mV. The ACOK output is high impedance when the MAX8730 is powered down. Connect a
10k pullup resistor from LDO to ACOK.
10
MODE
Tri-Level Input for Setting Number of Cells or Asserting the Conditioning Mode:
MODE = GND; asserts relearn mode.
MODE = Float; charge with 3 times the cell voltage programmed at VCTL.
MODE = LDO; charge with 4 times the cell voltage programmed at VCTL.
11 IINP Input-Current-Monitor Output. IINP sources the current proportional to the current sensed across CSSP and
CSSN. The transconductance from (CSSP – CSSN) to IINP is 2.8µA/mV (typ).
12 ICTL Charge-Current-Control Input. Pull ICTL to GND to shut down the charger.
13
REFON
SWREF Enable. Drive REFON high to enable SWREF.
14
INPON
Input Current-Monitor Enable. Drive INPON high to enable IINP.
15 CCI Output Current-Regulation Loop Compensation Point. Connect a 0.01µF capacitor from CCS to GND.
16 CCV V ol tag e- Reg ul ati on Loop C om p ensati on P oi nt. C onnect a 10k r esi stor i n ser i es w i th a 0.01µF cap aci tor to G N D .
17 CCS Input Current-Regulation Loop Compensation Point. Connect a 0.01µF capacitor from CCS to GND.
18 GND Analog Ground
19
BATT
Battery-Voltage Feedback Input
20
CSIN
Charge-Current-Sense Negative Input
21 CSIP Charge-Current-Sense Positive Input. Connect a current-sense resistor from CSIP to CSIN.
22
DHIV
High-Side Driver Supply. Connect a 0.1µF capacitor from DHIV to CSSN.
23 DHI High-Side Power MOSFET Driver Output. Connect to high-side, p-channel MOSFET gate.
24 SRC DC Supply Input Voltage and Connection for Driver for PDS/PDL Switches. Bypass SRC to power ground with
a 1µF capacitor.
25
CSSN
Input Current Sense for Negative Input
26
CSSP
Input Current Sense for Positive Input. Connect a 15m current-sense resistor from CSSP to CSSN.
27 PDS Power-Source PMOS Switch Driver Output. When the adapter is absent, the PDS output is pulled to SRC
through an internal 1M resistor.
28 PDL System-Load PMOS Switch Driver Output. When the adapter is absent, the PDL output is pulled to ground
through an internal 100k resistor.
29
Backside
Paddle
Backside Paddle. Connect the backside paddle to analog ground.
Pin Description
MAX8730
Low-Cost Battery Charger
______________________________________________________________________________________ 15
MAX8730
ADAPTER
INPUT
RS1
15m
C2
10nF
R6
6k
R4
75k
R5
18k
C1
32nF
R10
15k
C3
1µF
R3
3k
R12
50k
R13
50k
C11
1µF
R9
10k
R8
50k
R7
37.4k
REF
LDO
CIN1
4.7µF
L1
3.5µH
RS2
30m
C12
0.1µF
C4
0.1µF
C6
0.1µF
C8
0.01µF
R11
10k
C7
0.01µF
C9
0.01µF
C10
1µF
COUT1
4.7µF
COUT2
4.7µF
P2P1
P4
D1
P3
R2
R1
PDS
SRC
ASNS
ACIN
ICTL
ACOK
MODE
SWREF
VCTL
CLS
REFON
INPON
LDO
RELTH
REF
BATT
CSIN
CSIP
DHI
PDL
DHIV
IINP
CCV
CCI
C5
1µF
CCSGND
CSSP
INPUT
REF INPUT
HOST
OUTPUT
OUTPUT
A/D INPUT
LDO
REF
CSSN
SYSTEM
LOAD
BATTERY
COUT
Figure 1. Typical Application Circuit
MAX8730
Low-Cost Battery Charger
16 ______________________________________________________________________________________
Detailed Description
The MAX8730 includes all the functions necessary to
charge Li+, NiMH, and NiCd batteries. A high-efficien-
cy, step-down, DC-DC converter is used to implement
a precision constant-current, constant-voltage charger.
The DC-DC converter drives a p-channel MOSFET and
uses an external free-wheeling Schottky diode. The
charge current and input current-sense amplifiers have
low-input offset errors, allowing the use of small-value
sense resistors for reduced power dissipation. Figure 2
is the functional diagram.
The MAX8730 features a voltage-regulation loop (CCV)
and two current-regulation loops (CCI and CCS). The
loops operate independently of each other. The CCV
voltage-regulation loop monitors BATT to ensure that its
voltage never exceeds the voltage set by VCTL. The
CCI battery current-regulation loop monitors current
delivered to BATT to ensure that it never exceeds the
current limit set by ICTL. The charge-current-regulation
loop is in control as long as the battery voltage is below
the set point. When the battery voltage reaches its set
point, the voltage-regulation loop takes control and
maintains the battery voltage at the set point. A third
loop (CCS) takes control and reduces the charge cur-
rent when the adapter current exceeds the input cur-
rent limit set by CLS.
The ICTL, VCTL, and CLS analog inputs set the charge
current, charge voltage, and input-current limit, respec-
tively. For standard applications, default set points for
VCTL provide 4.2V per-cell charge voltage. The MODE
input selects a 3- or 4-cell mode.
Based on the presence or absence of the AC adapter,
the MAX8730 provides an open-drain logic output sig-
nal (ACOK) and connects the appropriate source to the
system. P-channel MOSFETs controlled from the PDL
and PDS select the appropriate power source. The
MODE input allows the system to perform a battery
relearning cycle. During a relearning cycle, the battery
is isolated from the charger and completely discharged
through the system load. When the battery reaches
100% depth of discharge, PDL turns off and PDS turns
on to connect the adapter to the system and to allow the
battery to be recharged to full capacity.
Setting Charge Voltage
The VCTL input adjusts the battery output voltage, VBATT.
This voltage is calculated by the following equation:
where CELLS is the number of cells selected with the
MODE input (see Table 1). Connect MODE to LDO for 4-
cell operation. Float the MODE input for 3-cell operation.
The battery-voltage accuracy depends on the absolute
value of VCTL, and the accuracy of the resistive volt-
age-divider that sets VCTL. Calculate the battery volt-
age accuracy according to the following equation:
where E0 is the worst-case MAX8730 battery voltage
error when using 1% resistors (0.83%), IVCTL is the
VCTL input bias current (4µA), and RVCTL is the imped-
ance at VCTL. Connect VCTL to LDO for the default
setting of 4.20V/cell with 0.7% accuracy.
Connect MODE to GND to enter relearn mode, which
allows the battery to discharge into the system while
the adapter is present; see the Relearn Mode Section.
Setting Charge Current
ICTL sets the maximum voltage across current-sense
resistor RS2, which determines the charge current. The
full-scale differential voltage between CSIP and CSIN is
135mV (4.5A for RS2 = 30m). Set ICTL according to
the following equation:
The input range for ICTL is 0 to 3.6V. To shut down the
charger, pull ICTL below 65mV. Choose a current-sense
resistor (RS2) to have a sufficient power rating to handle
the full-charge current. The current-sense voltage may
be reduced to minimize the power dissipation. However,
this can degrade accuracy due to the current-sense
amplifier’s input offset (±2mV). See the Typical
Operating Characteristics to estimate the charge-cur-
rent accuracy at various set points. The charge-current
error amplifier (GMI) is compensated at the CCI pin.
See the Compensation section.
VIxRSx
V
mV
ICTL CHG
.
=236
135
VEx
IxR
BATT ERROR VCTL VCTL
_ % =+
0100 36 1
V CELLS x V V
BATT VCTL
( )=+49
Table 1. Cell-Count Programming
CELLS CELL COUNT
GND Relearn mode
Float 3
LDO 4
MAX8730
Low-Cost Battery Charger
______________________________________________________________________________________ 17
N
MAX8730
A = 20V/V
CSSN
CSSP
CURRENT-SENSE
AMPLIFIER
CURRENT-SENSE
AMPLIFIER
GM =
2.8µA/mV
IINP
INPON REF
SYSTEM OVER-
CURRENT
CLS
GMS
CCS
A = 15V/V
CSIN
CSIP
CCI
GMI
ICTL
65mV
CHARGER
SHUTDOWN
CELL-
SELECT
LOGIC
BATT
MODE
REF
SELECTOR
(DEFAULT = 4.2V)
VCTL
GMV
CCV
LOWEST
VOLTAGE
CLAMP
222mA
LVC
6.56A
VCTL + 40mV DHI
HIGH-
SIDE
DRIVER
SRC
DHIV
OVP
IMIN
IMAX
CCMP
DC-DC
CONVERTER
5.4V
CHARGER
REGULATOR
SRC
LDO
REFERENCE
4.2V REF
CHARGER
BIAS
LOGIC
BATT
ADAPTER
DETECT
REFERENCE
3.3V
REFON
SRC
SWREF
REF/2
GND ACINACOK
CSI
-5V
REGULATOR
SRC - 10V
GND
REL_EN
SRC
ASNS
PDS
PDL
LOGIC
PDS
BATT
PDL
SRC
RELTH
CSSP
6µA
REL_EN N
Figure 2. Functional Diagram
MAX8730
Low-Cost Battery Charger
18 ______________________________________________________________________________________
The MAX8730 includes a foldback feature, which
reduces the Schottky requirement at low battery volt-
ages. See the Foldback Current Section.
Setting Input-Current Limit
The total input current, from a wall adapter or other DC
source, is the sum of the system supply current and the
current required by the charger. When the input current
exceeds the set input current limit, the MAX8730
decreases the charge current to provide priority to sys-
tem load current. System current normally fluctuates as
portions of the system are powered up or put to sleep.
The input-current-limit circuit reduces the power
requirement of the AC wall adapter, which reduces
adapter cost. As the system supply rises, the available
charge current drops linearly to zero. Thereafter, the
total input current can increase without limit.
The total input current is the sum of the device supply cur-
rent, the charger input current, and the system load cur-
rent. The total input current can be estimated as follows:
where ηis the efficiency of the DC-DC converter (typi-
cally 85% to 95%).
CLS sets the maximum voltage across the current-
sense resistor RS1, which determines the input current
limit. The full-scale differential voltage between CSSP
and CSSN is 75mV (5A for RS1 = 15m). Set CLS
according to the following equation:
The input range for CLS is 1.1V to VREF. Choose a cur-
rent-sense resistor (RS1) to have a sufficient power rat-
ing to handle the full system current. The current-sense
resistor may be reduced to improve efficiency, but this
degrades accuracy due to the current-sense amplifier’s
input offset (±3mV). See the Typical Operating Charac-
teristics to estimate the input current-limit accuracy at
various set points. The input current-limit error amplifier
(GMS) is compensated at the CCS pin; see the Com-
pensation section.
Input-Current Measurement
IINP monitors the system-input current sensed across
CSSP and CSSN. The voltage of IINP is proportional to
the input current according to the following equation:
VIINP = IINPUT x RS1 x GIINP x R10
where IINPUT is the DC current supplied by the AC
adapter, GIINP is the transconductance of IINP
(2.8µA/mV typ), and R10 is the resistor connected
between IINP and ground. Connect a 0.1µF filter
capacitor from IINP to GND to reduce ripple. IINP has a
0 to 4.5V output-voltage range. Connect IINP to GND if
it is not used.
The MAX8730 provides a short-circuit latch to protect
against system overload or short. The latch is set when
VIINP rises above 4.2V, and disconnects the adapter
from the system by turning PDS off (PDL does not
change). The latch is reset by bringing SRC below
UVLO (remove and reinsert the adapter). Choose a fil-
ter capacitor that is large enough to provide appropri-
ate debouncing and prevent accidental faults, yet
results in a response time that is fast enough to ther-
mally protect the MOSFETs. See the System Short
Circuit section.
IINP can be used to measure battery-discharge current
(see Figure 1) when the adapter is absent. To disable
IINP and reduce battery consumption to 10µA, drive
INPON to low. Charging is disabled when INPON is
low, even if the adapter is present.
AC-Adapter Detection and
Power-Source Selection
The MAX8730 includes a hysteretic comparator that
detects the presence of an AC power adapter and
automatically selects the appropriate power source.
When the adapter is present (VASNS > VBATT -
-100mV) the battery is disconnected from the system
load with the p-channel (P3) MOSFET. When the
adapter is removed (VASNS < VBATT - -270mV), PDS
turns off and PDL turns on with a 5µs break-before-
make sequence.
The ACOK output can be used to indicate the presence
of the adapter. When VACIN > 2.1V and VASNS > VBATT
- 100mV, ACOK becomes low. Connect a 10kpullup
resistor between LDO and ACOK. Use a resistive volt-
age-divider from the adapter’s output to the ACIN pin to
set the appropriate detection threshold. Since ACIN
has a 6V absolute maximum rating, set the adapter
threshold according to the following equation:
Relearn Mode
The MAX8730 can be programmed to perform a relearn
cycle to calibrate the battery’s fuel gauge. This cycle
consists of isolating the battery from the charger and dis-
charging it through the system load. When the battery
VV
ADAPTER THRESHOLD ADAPTER MAX
__
>3
VIxRSx
V
mV
CLS LIMIT REF
=175
II
IxV
Vx
INPUT LOAD CHARGE BATTERY
IN
=+ η
MAX8730
Low-Cost Battery Charger
______________________________________________________________________________________ 19
reaches 100% depth of discharge, it is then recharged.
Connect MODE to GND to place the MAX8730 in
relearn mode. In relearn mode, charging stops, PDS
turns off, and PDL turns on.
To utilize relearn mode, there must be two source-con-
nected MOSFETs to prevent the AC adapter from sup-
plying current to the system through the P1’s body
diode. Connect SRC to the common source node of
two MOSFETs.
The system must alert the user before performing a
relearn cycle. If the user removes the battery during
relearn mode, the MAX8730 detects battery removal
and reconnects the AC adapter (PDS turns on and PDL
turns off). Battery removal is detected when the battery
falls below 5xRELTH.
LDO Regulator, REF, and SWREF
An integrated linear regulator (LDO) provides a 5.35V
supply derived from SRC, and delivers over 10mA of
load current. LDO biases the 4.2V reference (REF) and
most of the control circuitry. Bypass LDO to GND with a
1µF ceramic capacitor. An additional standalone 1%,
3.3V linear regulator (SWREF) provides 20mA and can
remain on when the adapter is absent. Set REFON low
to disable SWREF. Set REFON high for normal opera-
tion. SWREF must be enabled to allow charging.
Operating Conditions
Adapter present: The adapter is considered to be
present when:
VSRC > 8V (max)
VASNS > VBATT - 300mV (max)
Charging: The MAX8730 allows charging when:
VSRC - VCSIN > 100mV (typ)
3 or 4 cells selected (MODE float or high condition)
ICTL > 110mV (max)
INPON is high
Relearn mode: The MAX8730 enables relearn mode
when:
VBATT / 5 > VRELTH
MODE is grounded
DC-DC Converter
The MAX8730 employs a step-down DC-DC converter
with a p-channel MOSFET switch and an external
Schottky diode. The MAX8730 features a constant-cur-
rent-ripple, current-mode control scheme with cycle-by-
cycle current limit. For light loads, the MAX8730
operates in discontinuous conduction mode for
improved efficiency. The operation of the DC-DC con-
troller is determined by the following four comparators
as shown in the functional block diagram in Figure 3:
The IMIN comparator sets the peak inductor current
in discontinuous mode. IMIN compares the control
signal (LVC) against 100mV (corresponding to
222mA when RS2 = 30m). The comparator termi-
nates the switch on-time when IMIN exceeds the
threshold.
The CCMP comparator is used for current-mode reg-
ulation in continuous conduction mode. CCMP com-
pares LVC against the charging-current feedback
signal (CSI). The comparator output is high and the
MOSFET on-time is terminated when the CSI voltage
is higher than LVC.
The IMAX comparator provides a cycle-by-cycle cur-
rent limit. IMAX compares CSI to 2.95V (correspond-
ing to 6.56A when RS2 = 30m). The comparator
output is high and the MOSFET on-time is terminated
when the current-sense signal exceeds 6.56A. A new
cycle cannot start until the IMAX comparator output
goes low.
The OVP comparator is used to prevent overvoltage
at the output due to battery removal. OVP compares
BATT against the set voltage; see the Setting Charge
Voltage section. When BATT is 20mV x CELLS above
the set value, OVP goes high and the MOSFET on-
time is terminated.
IMAX
CCMP
IMIN
OVP
CSI
2.95V
100mV
VCTLSETPOINT + 20mV
BATT/CELLS
BATT
LVC
R
S
Q
Q
OFF-TIME
ONE-SHOT
OFF-TIME
COMPUTE
DH
DRIVER
Figure 3. DC-DC Converter Block Diagram
MAX8730
Low-Cost Battery Charger
20 ______________________________________________________________________________________
CCV, CCI, CCS, and LVC Control Blocks
The MAX8730 controls input current (CCS control loop),
charge current (CCI control loop), or charge voltage
(CCV control loop), depending on the operating condi-
tion. The three control loops—CCV, CCI, and CCS—are
brought together internally at the lowest voltage clamp
(LVC) amplifier. The output of the LVC amplifier is the
feedback control signal for the DC-DC controller. The
minimum voltage at the CCV, CCI, or CCS appears at
the output of the LVC amplifier and clamps the other
control loops to within 0.3V above the control point.
Clamping the other two control loops close to the low-
est control loop ensures fast transition with minimal
overshoot when switching between different control
loops (see the Compensation section).
Continuous-Conduction Mode
With sufficient charge current, the MAX8730’s inductor
current never crosses zero, which is defined as contin-
uous-conduction mode. The controller starts a new
cycle by turning on the high-side MOSFET. When the
charge-current feedback signal (CSI) is greater than
the control point (LVC), the CCMP comparator output
goes high and the controller initiates the off-time by
turning off the MOSFET. The operating frequency is
governed by the off-time, which depends upon VBATT.
At the end of the fixed off-time, the controller initiates a
new cycle only if the control point (LVC) is greater than
100mV, and the peak charge current is less than the
cycle-by-cycle current limit. Restated another way,
IMIN must be high, IMAX must be low, and OVP must
be low for the controller to initiate a new cycle. If the
peak inductor current exceeds the IMAX comparator
threshold or the output voltage exceeds the OVP
threshold, then the on-time is terminated. The cycle-by-
cycle current limit protects against overcurrent and
short-circuit faults.
The MAX8730 computes the off-time by measuring
VBATT:
tOFF = 5.6µs/VBATT
for VBATT > 4V.
The switching frequency in continuous mode varies
according to the equation:
Discontinuous Conduction
The MAX8730 operates in discontinuous conduction
mode at light loads to make sure that the inductor cur-
rent is always positive. The MAX8730 enters discontinu-
ous conduction mode when the output of the LVC
control point falls below 100mV. For RS2 = 30m, this
corresponds to a peak inductor current of 222mA:
The MAX8730 implements slope compensation in dis-
continuous mode to eliminate multipulsing. This pre-
vents audible noise and minimizes the output ripple.
Compensation
The charge-voltage and charge current-regulation
loops are compensated separately and independently
at the CCV, CCI, and CCS pins.
CCV Loop Compensation
The simplified schematic in Figure 4 is sufficient to
describe the operation of the MAX8730 when the volt-
age loop (CCV) is in control. The required compensa-
tion network is a pole-zero pair formed with CCV and
RCV. The pole is necessary to roll off the voltage loop’s
response at low frequency. The zero is necessary to
compensate the pole formed by the output capacitor
and the load. RESR is the equivalent series resistance
(ESR) of the charger output capacitor (COUT). RLis the
equivalent charger output load, where RL= VBATT /
ICHG. The equivalent output impedance of the GMV
ImV
RS mA
DIS ×=
1
2
100
15 2 111
f
Vx sx VV V
SRC BATT BATT
.
=
+
1
56 11
µ
CCV
COUT
RCV
RLRESR
ROGMV
CCV
BATT
GMV
REF
GMOUT
Figure 4. CCV Loop Diagram
MAX8730
Low-Cost Battery Charger
______________________________________________________________________________________ 21
NAME EQUATION DESCRIPTION
CCV pole
Lowest frequency pole created by CCV and GMV’s finite output resistance.
Since ROGMV is very large and not well controlled, the exact value for the
pole frequency is also not well controlled (ROGMV > 10M).
CCV zero
Voltage-loop compensation zero. If this zero is at the same frequency or
lower than the output pole fP_OUT, then the loop-transfer function
approximates a single-pole response near the crossover frequency.
Choose CCV to place this zero at least 1 decade below crossover to ensure
adequate phase margin.
Output
pole
Output pole formed with the effective load resistance RL and output
capacitance COUT. RL influences the DC gain but does not affect the
stability of the system or the crossover frequency.
Output
zero
Output ESR Zero. This zero can keep the loop from crossing unity gain if
fZ_OUT is less than the desired crossover frequency; therefore, choose a
capacitor with an ESR zero greater than the crossover frequency.
amplifier, ROGMV, is greater than 10M. The voltage
amplifier transconductance, GMV = 0.125µA/mV for 4
cells and 0.167µA/mV for 3 cells. The DC-DC converter
transconductance is dependent upon the charge cur-
rent-sense resistor RS2:
where ACSI = 15V/V and RS2 = 30min the typical
application circuits, so GMOUT = 2.22A/V.
The loop transfer function is given by:
The poles and zeros of the voltage-loop transfer function
are listed from lowest frequency to highest frequency in
Table 2.
Near crossover, CCV is much lower impedance than
ROGMV. Since CCV is in parallel with ROGMV, CCV domi-
nates the parallel impedance near crossover. Additionally
RCV is much higher impedance than CCV and dominates
the series combination of RCV and CCV, so:
COUT is typically much lower impedance than RLnear
crossover so the parallel impedance is mostly capaci-
tive and:
If RESR is small enough, its associated output zero has
a negligible effect near crossover and the loop-transfer
function can be simplified as follows:
Setting the LTF = 1 to solve for the unity-gain frequency
yields:
For stability, choose a crossover frequency lower than
1/5 the switching frequency. For example, choosing a
crossover frequency of 45kHz and solving for RCV
using the component values listed in Figure 1 yields
RCV = 10k:
RCf
GMV GM k
CV OUT CO CV
OUT
_
=×
×
×210
π
fGMG
R
xC
CO CV OUT MV CV
OUT
_
×
2π
LTF GM R
sC G
OUT CV
OUT MV
R
sC R sC
L
OUT L OUT
( )
1
1
RsCR
sC R R
OGMV xCV CV
CV OGMV CV
( )
( )
1
1
LTF GM R GMV R
sC R sC R
sC R sC R
OUT L OGMV
OUT ESR CV CV
CV OGMV OUT L
( )( )
( )( )
×××
+×
+ ×
11
11
GM ARS
OUT CSI
=×
1
2
Table 2. CCV Loop Poles and Zeros
fRC
PCV OGMV CV
_=×
1
2π
fRC
ZCV CV CV
_=×
1
2π
fRC
P OUT L OUT
_=×
1
2π
fRC
Z OUT ESR OUT
_=×
1
2π
MAX8730
Low-Cost Battery Charger
22 ______________________________________________________________________________________
where:
VBATT = 16.8V
GMV = 0.125µA/mV
GMOUT = 2.22A/V
COUT = 10µF
fOSC = 350kHz (minimum occurs at VIN = 19V and
VBATT = 16.8V)
RL = 0.2
fCO-CV = 45kHz
To ensure that the compensation zero adequately can-
cels the output pole, select fZ_CV fP_OUT:
CCV (RL / RCV) COUT
CCV 200pF
Figure 5 shows the Bode plot of the voltage-loop fre-
quency response using the values calculated above.
CCI Loop Compensation
The simplified schematic in Figure 6 is sufficient to
describe the operation of the MAX8730 when the bat-
tery current loop (CCI) is in control. Since the output
capacitor’s impedance has little effect on the response
of the current loop, only a simple single pole is required
to compensate this loop. ACSI is the internal gain of the
current-sense amplifier. RS2 is the charge-current-
sense resistor (30m). ROGMI is the equivalent output
impedance of the GMI amplifier, which is greater than
10M. GMI is the charge-current amplifier transcon-
ductance = 1µA/mV. GMOUT is the DC-DC converter
transconductance = 2.22A/V.
The loop transfer function is given by:
that describes a single-pole system. Since:
the loop-transfer function simplifies to:
The crossover frequency is given by:
For stability, choose a crossover frequency lower than
1/10 of the switching frequency:
Values for CCI greater than 10 times the minimum value
may slow down the current-loop response. Choosing
CCI = 10nF yields a crossover frequency of 15.9kHz.
Figure 7 shows the Bode plot of the current-loop fre-
quency response using the values calculated above.
Cx GMI
xC nF
CI CI
>=
10
24
π
fGMI
C
CO CI CI
_ =2π
LTF GMI R
sR C
OGMI
OGMI CI
=+×1
GM ARS
OUT CSI
=×
1
LTF GM A RS GMI R
sR C
OUT CSI OGMI
OGMI CI
××
+×1
FREQUENCY (Hz)
MAGNITUDE (dB)
PHASE (DEGREES)
100k10k1k100101
-20
0
20
40
60
80
-40
-90
-45
0
-135
0.1 1M
MAG
PHASE
Figure 5. CCV Loop Response
CCI ROGMI
CCI
GMI
CSI
ICTL
GMOUT
CSIP
RS2
CSIN
Figure 6. CCI Loop Diagram
MAX8730
Low-Cost Battery Charger
______________________________________________________________________________________ 23
CCS Loop Compensation
The simplified schematic in Figure 8 is sufficient to
describe the operation of the MAX8730 when the input
current-limit loop (CCS) is in control. Since the output
capacitor’s impedance has little effect on the response
of the input current-limit loop, only a single pole is
required to compensate this loop. ACSS is the internal
gain of the current-sense amplifier, RS1 = 10min the
typical application circuits. ROGMS is the equivalent
output impedance of the GMS amplifier, which is
greater than 10M. GMS is the charge-current amplifier
transconductance = 1µA/mV. GMIN is the DC-DC con-
verter’s input-referred transconductance = GMOUT/D =
2.22A/V/D.
The loop-transfer function is given by:
the loop-transfer function simplifies to:
The crossover frequency is given by:
For stability, choose a crossover frequency lower than
1/10 of the switching frequency:
Values for CCS greater than 10 times the minimum
value may slow down the current-loop response exces-
sively. Figure 9 shows the Bode plot of the input cur-
rent-limit-loop frequency response using the values
calculated above.
Cx
GMS
fxV
V
CS OSC
IN MAX
BATT MIN
_
_
=52π
fGMS
CxV
V
CO CS CS
IN MAX
BATT MIN
__
_
=2π
LTF GMS R
SR C xRS RS
OGMS
OGMS CS
/=112
Since GM ARS
IN
CSS
=×
1
2
LTF GM A RSI GMS R
SR C
IN CSS OGMS
OGMS CS
×× 1
FREQUENCY (Hz)
MAGNITUDE (dB)
100k1k10
-20
0
20
40
60
100
80
-40
-45
0
-90
0.1
MAG
PHASE
Figure 7. CCI Loop Response
CCS ROGMS
GMS
CSS
CLS
CCS
CSSP
RS1
CSSI
GMIN
SYSTEM
LOAD
ADAPTER
INPUT
Figure 8. CCI Loop Diagram
FREQUENCY (Hz)
MAGNITUDE (dB)
100k 10M1k10
-20
0
20
40
60
100
80
-40
-45
0
-90
0.1
MAG
PHASE
PHASE (DEGREES)
Figure 9. CCS Loop Response
MAX8730
Low-Cost Battery Charger
24 ______________________________________________________________________________________
MOSFET Drivers
The DHI output is optimized for driving moderate-sized
power MOSFETs. This is consistent with the variable
duty factor that occurs in the notebook computer envi-
ronment where the battery voltage changes over a wide
range. DHI swings from SRC to DHIV and has a typical
impedance of 1sourcing and 4sinking.
Design Procedure
MOSFET Selection
Choose the p-channel MOSFETs according to the max-
imum required charge current. The MOSFET (P4) must
be able to dissipate the resistive losses plus the switch-
ing losses at both VSRC(MIN) and VSRC(MAX).
The worst-case resistive power losses occur at the
maximum battery voltage. Calculate the resistive losses
according to the following equation:
Calculate the switching losses according to the follow-
ing equation:
where CRSS is the reverse transfer capacitance of the
MOSFET, and IGATE is the peak gate-drive source/sink
current.
These calculations provide an estimate and are not a
substitute for breadboard evaluation, preferably includ-
ing a verification using a thermocoupler mounted on
the MOSFET.
Generally, a small MOSFET is desired to reduce switch-
ing losses at VBATT = VSRC / 2. This requires a tradeoff
between gate charge and resistance. Switching losses
in the MOSFET can become significant when the maxi-
mum AC adapter voltage is applied. If the MOSFET that
was chosen for adequate RDS(ON) at low supply volt-
ages becomes hot when subjected to VSRC(MAX), then
choose a MOSFET with lower gate charge. The actual
switching losses that can vary due to factors include
the internal gate resistance, threshold voltage, source
inductance, and PC board layout characteristics.
See Table 3 for suggestions about MOSFET selection.
Schottky Selection
The Schottky diode conducts the inductor current dur-
ing the off-time. Choose a Schottky diode with the
appropriate thermal resistance to guarantee that it does
not overheat:
θJA J MAX A MAX
F CHG BATT MIN
SRC MAX
TT
VxI x V
V
__
_
_
<
1
PD x
xQ
IxV I V C
f
SWITCHING
G
GATE SRC MAX x CHG SRC MAX x RSS
() ()
=
+
()
1
2
22
PD V
VxI R
sis ce BATT
SRC CHG DS ON
Re tan ()
2
Table 3. Recommended MOSFETs
MAX
CHARGE CURRENT (A)
MOSFET PIN-PACKAGE
QG (nC) RDSON (m)
Rθθ
θθJA
(°/W)
TMAX (°C)
3Si3457DV 6-SOT23 8 75 78 +150
2.5 FDC658P 6-SOT23 12 75 78 +150
3.5 FDS9435A 8-SO 14 80 50 +175
3.5 NDS9435A 8-SO 14 80 50 +175
4FDS4435 8-SO 24 35 50 +175
4FDS6685 8-SO 24 35 50 +175
4.5 FDS6675A 8-SO 34 19 50 +175
MAX8730
Low-Cost Battery Charger
______________________________________________________________________________________ 25
where θJA is the thermal resistance of the package (in
°C/W), TJ_MAX is the maximum junction temperature of
the diode, TA_MAX is the maximum ambient tempera-
ture of the system, and VFis the forward voltage of the
Schottky diode.
The Schottky size and cost can be reduced by utilizing
the MAX8730 foldback function. See the Foldback
Current section for more information.
Select the Schottky diode to minimize the battery leakage
current when the charger is shut down.
Inductor Selection
The MAX8730 uses a fixed inductor current ripple
architecture to minimize the inductance. The charge
current, ripple, and operating frequency (off-time)
affects inductor selection. For a good trade-off of
inductor size and efficiency, choose the inductance
according to the following equation:
where kOFF is the off-time constant (5.6V x µs typically).
Higher inductance values decrease the RMS current at
the cost of inductor size.
Inductor L1 must have a saturation current rating of at
least the maximum charge current plus 1/2 of the ripple
current (IL):
ISAT = ICHG + (1/2) IL
The ripple current is determined by:
The ripple current is only dependent on inductance
value and is independent of input and output voltage.
See the Ripple Current vs. VBATT graph in the Typical
Operating Characteristics.
See Table 4 for suggestions about inductor selection.
Input Capacitor Selection
The input capacitor must meet the ripple current
requirement (IRMS) imposed by the switching currents.
Ceramic capacitors are preferred due to their resilience
to power-up surge currents:
at 50% duty cycle.
The input capacitors should be sized so that the tem-
perature rise due to ripple current in continuous con-
duction does not exceed about 10°C. The maximum
ripple current occurs at 50% duty factor or VSRC = 2 x
VBATT, which equates to 0.5 x ICHG. If the application
of interest does not achieve the maximum value, size
the input capacitors according to the worst-case condi-
tions. See Table 5 for suggestions about input capaci-
tor selection.
II VV V
V
I
RMS CHG
BATT SRC BATT
SRC
CHG
=
()
=2
Ik
L
LOFF
=
Lk
xI
OFF
CHG
.
=04
Table 4. Recommended Inductors
APPLICATION (A) INDUCTOR SIZE (mm) L (µH) ISAT (A) RL (m
)
2.5 CDRH6D38 8.3 x 8.3 x 3 3.3 3.5 20
2.5 CDRH8D28 7 x 7 x 4 4.7 3.4 24.7
3.5 CDRH8D38 8.3 x 8.3 x 4 3.5 4.4 24
Table 5. Recommended Input Capacitors
APPLICATION (A)
INPUT CAPACITOR CAPACITANCE( µF) VOLTS (V) RMS AT 10°C (A)
< 3 GMK316F47S2G 4.7 35 1.8
< 4 GMK325F106ZH 4.7 35 2.4
< 4 TMK325BJ475MN 10 25 2.5
MAX8730
Low-Cost Battery Charger
26 ______________________________________________________________________________________
Output Capacitor Selection
The output capacitor absorbs the inductor ripple cur-
rent and must tolerate the surge current delivered from
the battery when it is initially plugged into the charger.
As such, both capacitance and ESR are important
parameters in specifying the output capacitor as a filter
and to ensure stability of the DC-DC converter (see the
Compensation section). Beyond the stability require-
ments, it is often sufficient to make sure that the output
capacitor’s ESR is much lower than the battery’s ESR.
Either tantalum or ceramic capacitors can be used on
the output. Ceramic devices are preferable because of
their good voltage ratings and resilience to surge cur-
rents. For a ceramic output capacitor, select the capac-
itance according to the following equation:
The output ripple requirement of a charger is typically
only constrained by the overvoltage protection circuitry
of the battery protector and the overvoltage protection
of the charger. For proper operation, ensure that the
ripple is smaller than the overvoltage protection thresh-
old of both the charger and the battery protector. If the
protector’s overvoltage protection is filtered, the battery
protector may not be a constraint.
Applications Information
Adapter Soft-Start
The adapter selection MOSFETs may be soft-started to
reduce adapter surge current upon adapter selection.
Figure 10 shows the adapter soft-start application using
Miller capacitance for optimum soft-start timing and
power dissipation.
System Short-Circuit IINP Configuration
The MAX8730 has a system short-circuit protection fea-
ture. When VIINP is greater than 4.2V, the MAX8730
latches off PDS. PDS remains off until the adapter is
removed and reinserted. For fast response to system
overcurrent, add an RC (C13 and R15), as shown in
Figure 11.
Select R15 according to the following equation:
where:
VSST = 4.2V.
ISST = Short-circuit system current threshold. Since sys-
tem short-circuit triggers a latch, it is important to choose
ISST high enough to prevent unintentional triggers.
Select C13 according to the following equation:
Ct
R
Delay
13
15
=
RV
GxRSxI x
R
SST
IINP SST
15
107
10=−
.
Ck
xLxV xVV V
OUT OFF
RIPPLE SRC BATT BATT
>+
2
8
11
ADAPTER
SYSTEM
LOAD
CSS2
10nF
RSS2
6k
RSS1
18k
CSS1
32nF
PDSSRC
Figure 10. Adapter Soft-Start Modification
R10
C6
R15
MAX8730
C13
IINP
Figure 11. System Short-Circuit IINP Configuration
MAX8730
Low-Cost Battery Charger
______________________________________________________________________________________ 27
For typical applications, choose tDelay = 20µs
(depends on the p-MOSFET selected for the PDS
switch).
The following components can be used for a 10A sys-
tem short-current design:
R10 = 8.66k
C6 = 0.1µF
R15 = 7.15k
C13 = 2.7nF
Foldback Current
At low duty cycles, most of the charge current is con-
ducted through the Schottky diode (D1). To reduce the
requirements of the Schottky diode, the MAX8730 has a
foldback charge current feature. When the battery volt-
age falls below 5 x VRELTH, ICTL sinks 6µA. Add a
series resistor to ICTL to adjust the charge current fold-
back, as shown in Figure 12:
Layout and Bypassing
Bypass SRC, ASNS, LDO, DHIV, and REF as shown in
Figure 1.
Good PC board layout is required to achieve specified
noise immunity, efficiency, and stable performance.
The PC board layout artist must be given explicit
instructions—preferably, a sketch showing the place-
ment of the power-switching components and high-
current routing. Refer to the PC board layout in the
MAX8730 evaluation kit for examples.
Use the following step-by-step guide:
1) Place the high-power connections first, with their
grounds adjacent:
Minimize the current-sense resistor trace lengths,
and ensure accurate current sensing with Kelvin
connections.
Minimize ground trace lengths in the high-current
paths.
Minimize other trace lengths in the high-current
paths.
Use > 5mm wide traces in the high-current
paths.
Connect to the input capacitors directly to the
source of the high-side MOSFET (10mm max
length). Place the input capacitor between the
input current-sense resistor and the source of the
high-side MOSFET.
2) Place the IC and signal components. Quiet connec-
tions to REF, CCV, CCI, CCS, ACIN, SWREF, and
LDO SRC should be returned to a separate ground
(GND) island. There is very little current flowing in
these traces, so the ground island need not be very
large. When placed on an inner layer, a sizable
ground island can help simplify the layout because
the low current connections can be made through
vias. The ground pad on the backside of the pack-
age should be the star connection to this quiet
ground island.
3) Keep the gate drive trace (DHI) and SRC path as
short as possible (L < 20mm), and route them away
from the current-sense lines and REF. Bypass DHIV
directly to the source of the high-side MOSFET.
These traces should also be relatively wide (W >
1.25mm).
4) Place ceramic bypass capacitors close to the IC.
The bulk capacitors can be placed further away.
R14=1
6µA
R8
R7 +R8 xV
REF I FOLDBACK xRS2x3.6V
135mV
R8 x R7
R7 +R8
REF
R7
R8
R14
ICTL
Figure 12. ICTL Foldback Current Adjustment
MAX8730
Low-Cost Battery Charger
28 ______________________________________________________________________________________
Chip Information
TRANSISTOR COUNT: 3307
PROCESS: BiCMOS
MAX8730
5mm x 5mm THIN QFN
TOP VIEW
26
27
25
24
10
9
11
LDO
REF
CLS
ACIN
VCTL
12
ASNS
CSIN
GND
CCS
CSIP
CCV
CCI
12
CSSN
4567
2021 19 17 16 15
CSSP
PDS
ICTL
IINP
MODE
SWREF BATT
3
18
28 8
PDL +RELTH
SRC
23 13 REFON
DHI
22 14 INPON
DHIV
*
EXPOSED PADDLE
ACOK
Pin Configuration
MAX8730
Low-Cost Battery Charger
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 29
©2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
QFN THIN.EPS
D2
(ND-1) X e
e
D
C
PIN # 1
I.D.
(NE-1) X e
E/2
E
0.08 C
0.10 C
A
A1 A3
DETAIL A
E2/2
E2
0.10 M C A B
PIN # 1 I.D.
b
0.35x45°
D/2 D2/2
L
C
L
C
e e
L
CC
L
k
L
L
DETAIL B
L
L1
e
AAAAA
MARKING
I
1
2
21-0140
PACKAGE OUTLINE,
16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
-DRAWING NOT TO SCALE-
L
e/2
COMMON DIMENSIONS
MAX.
EXPOSED PAD VARIATIONS
D2
NOM.MIN. MIN.
E2
NOM. MAX.
NE
ND
PKG.
CODES
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL
CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE
OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1
IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN
0.25 mm AND 0.30 mm FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT EXPOSED PAD DIMENSION FOR
T2855-3 AND T2855-6.
NOTES:
SYMBOL
PKG.
N
L1
e
E
D
b
A3
A
A1
k
10. WARPAGE SHALL NOT EXCEED 0.10 mm.
JEDEC
0.70 0.800.75
4.90
4.90
0.25
0.25
0
--
4
WHHB
4
16
0.350.30
5.10
5.105.00
0.80 BSC.
5.00
0.05
0.20 REF.
0.02
MIN. MAX.NOM.
16L 5x5
L0.30 0.500.40
------
WHHC
20
5
5
5.00
5.00
0.30
0.55
0.65 BSC.
0.45
0.25
4.90
4.90
0.25
0.65
--
5.10
5.10
0.35
20L 5x5
0.20 REF.
0.75
0.02
NOM.
0
0.70
MIN.
0.05
0.80
MAX.
---
WHHD-1
28
7
7
5.00
5.00
0.25
0.55
0.50 BSC.
0.45
0.25
4.90
4.90
0.20
0.65
--
5.10
5.10
0.30
28L 5x5
0.20 REF.
0.75
0.02
NOM.
0
0.70
MIN.
0.05
0.80
MAX.
---
WHHD-2
32
8
8
5.00
5.00
0.40
0.50 BSC.
0.30
0.25
4.90
4.90
0.50
--
5.10
5.10
32L 5x5
0.20 REF.
0.75
0.02
NOM.
0
0.70
MIN.
0.05
0.80
MAX.
0.20 0.25 0.30
DOWN
BONDS
ALLOWED
YES3.103.00 3.203.103.00 3.20T2055-3
3.103.00 3.203.103.00 3.20
T2055-4
T2855-3 3.15 3.25 3.35 3.15 3.25 3.35
T2855-6 3.15 3.25 3.35 3.15 3.25 3.35
T2855-4 2.60 2.70 2.80 2.60 2.70 2.80
T2855-5 2.60 2.70 2.80 2.60 2.70 2.80
T2855-7 2.60 2.70 2.80 2.60 2.70 2.80
3.20
3.00 3.10T3255-3 3 3.203.00 3.10
3.203.00 3.10T3255-4 3 3.203.00 3.10
NO
NO
NO
NO
YES
YES
YES
YES
3.203.00T1655-3 3.10 3.00 3.10 3.20 NO
NO3.203.103.003.10T1655N-1 3.00 3.20
3.353.15T2055-5 3.25 3.15 3.25 3.35 YES
3.35
3.15
T2855N-1 3.25 3.15 3.25 3.35 NO
3.353.15T2855-8 3.25 3.15 3.25 3.35 YES
3.203.10T3255N-1 3.00 NO
3.203.103.00
L
0.40
0.40
**
**
**
**
**
**
**
**
**
**
**
**
**
**
SEE COMMON DIMENSIONS TABLE
±0.15
11. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY.
I
2
2
21-0140
PACKAGE OUTLINE,
16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
-DRAWING NOT TO SCALE-
12. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY.
3.30T4055-1 3.20 3.40 3.20 3.30 3.40 ** YES
0.0500.02
0.600.40 0.50
10
-----
0.30
40
10
0.40 0.50
5.10
4.90 5.00
0.25 0.35 0.45
0.40 BSC.
0.15
4.90
0.250.20
5.00 5.10
0.20 REF.
0.70
MIN.
0.75 0.80
NOM.
40L 5x5
MAX.
13. LEAD CENTERLINES TO BE AT TRUE POSITION AS DEFINED BY BASIC DIMENSION "e", ±0.05.
T1655-2 ** YES3.203.103.003.103.00 3.20
T3255-5 YES3.003.103.00 3.20 3.203.10 **
exceptions