2004 Microchip Technology Inc. DS-21906A-page 1
MCP102/103/121/131
Features
• Ultra l ow sup ply curre nt: 1.7 5 µA (steady s tat e max .)
• Pr ecisio n monitoring options of:
- 1.90V, 2.32V, 2.63V, 2.93V, 3.08V, 4.38V
and 4.63V
• Resets microcontroller in a power-loss event
•RST pin (Active-low ):
-MCP121: Active-low, open-drain
-MCP131: Active-l ow , open -drain wi th internal
pull-up res is tor
-MCP102 and MCP103: Active-low, push-pull
• Reset Delay Timer (120 ms delay typical)
• A va ila ble in SO T23 -3, T O -9 2 and SC70 packages
• Tempera ture Range:
- Extended: -40°C to +125°C
(except MCP1XX-195)
- Industrial: -40°C to +85°C (MCP1XX-195 only)
• Lead Free Packaging
Applications
• Critical Microc ontroller and Microprocessor Power
Monitoring Applications
• Computers
• Intelligent Instruments
• Port ab le Batte ry-Po wered Equipm en t
General Description
The MCP102/103/121/131 are voltage supervisor
devices designed to keep a microcontroller in reset
until the system voltage has reached and stabilized at
the pr oper level for relia ble system operation. The t able
below shows the available features for thes e devices.
Package Types
Block Diagram
TABLE 1: DEVICE FEATURES
SOT23-3/SC-70
VSS
RST
MCP102/121/131
1
2
3
VDD
RST
TO-92
SOT23-3/SC-70
VDD
VSS
MCP103
1
2
3
RST
VDD VSS
VDD
Comparator
+
–Output
Driver RST
Band Gap
Reference
VSS
Reset
Delay
Circuit
R (1)
Note 1: MCP131 Only
Device Output Reset
Delay (typ) Package Pin Out
(Pin # 1, 2, 3) Comment
Type Pull-up Resistor
MCP102 Push-Pull No 120 ms RST, VDD, VSS
MCP103 Push-Pull No 120 ms VSS, RST, VDD
MCP121 Open-Drain External 120 ms RST, VDD, VSS
MCP131 Open-Drain Internal (~95 kΩ)120ms RST
, VDD, VSS
MCP111 Open-Drain External No VOUT, VSS, VDD See MCP111/112 Data Sheet
(DS21889)
MCP112 Push-Pull No No VOUT, VSS, VDD See MCP111/112 Data Sheet
(DS21889)
Micropower Voltage Supervisors
MCP102/103/121/131
DS-21906A-page 2 2004 Microchip Technology Inc.
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings†
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V
Input current (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 mA
Output current (RST) . . . . . . . . . . . . . . . . . . . . . . . . . .10 mA
Rated Rise Time of VDD . . . . . . . . . . . . . . . . . . . . . . 100V/µ s
All inputs and outputs w.r.t. VSS . . . . . –0 . 6 V to (VDD + 1.0V)
Storage temperature . . . . . . . . . . . . . . . . . .–65°C to + 150°C
Ambient temp. with power applied . . . . . . .–40°C to + 125°C
Maximum Junction temp. with power applied . . . . . . . .150°C
ESD protection on all pins. . . . . . . . . . . . . . . . . . . . . . . . . ≥ 2kV
† Notice: Stres ses above those listed under “Maximum Rat-
ings” may cause permanent damage to the devic e. This is a
stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied. Expo-
sure to max imum rati ng conditions for extended periods may
affect device reliability.
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits are specified f or:
VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only), TA = -40°C to +125°C.
Parameters Sym Min Typ Max Units Conditions
Operating Voltage Range VDD 1.0 — 5.5 V
Specified VDD Value to RST low VDD 1.0 — V IRST = 10 uA, VRST < 0.2V
Operating Current MCP102,
MCP103, IDD — < 1 1.75 µA Reset Power-up Timer (tRPU) Inactive
MCP121 — — 20.0 µA Reset Power-up Timer (tRPU) Active
MCP131 IDD —< 11.75µAV
DD > VTRIP and Reset Power-up
T imer (tRPU) Inactive
——75µAV
DD < VTRIP and Reset Power-up
T imer (tRPU) Inactive (Note 3)
— — 90 µA Reset Power-up Timer (tRPU) Active
(Note 4)
VDD Trip Point MCP1XX-195 VTRIP 1.872 1.900 1.929 V TA = +25°C (Note 1)
1.853 1.900 1.948 V TA = -40°C to +85°C (Note 2)
MCP1XX-240 2.285 2.320 2.355 V TA = +25°C (Note 1)
2.262 2.320 2.378 V (Note 2)
MCP1XX-270 2.591 2.630 2.670 V TA = +25°C (Note 1)
2.564 2.630 2.696 V (Note 2)
MCP1XX-300 2.886 2.930 2.974 V TA = +25°C (Note 1)
2.857 2.930 3.003 V (Note 2)
MCP1XX-315 3.034 3.080 3.126 V TA = +25°C (Note 1)
3.003 3.080 3.157 V (Note 2)
MCP1XX-450 4.314 4.380 4.446 V TA = +25°C (Note 1)
4.271 4.380 4.490 V (Note 2)
MCP1XX-475 4.561 4.630 4.700 V TA = +25°C (Note 1)
4.514 4.630 4.746 V (Note 2)
VDD Trip Point Tempco TTPCO — ±100 — ppm/°C
Note 1: Trip point is ±1.5% from typical value.
2: Trip point is ±2.5% from typical value.
3: RST output is forced low. There is a current through the internal pull-up resistor.
4: This includes the current through the internal pull-up resistor and the reset power-up timer.
2004 Microchip Technology Inc. DS-21906A-page 3
MCP102/103/121/131
Threshold
Hysteresis
(min. = 1%,
max = 6%)
MCP1XX-195 VHYS 0.019 — 0.114 V TA = +25°C
MCP1XX-240 0.023 — 0.139 V
MCP1XX-270 0.026 — 0.158 V
MCP1XX-300 0.029 — 0.176 V
MCP1XX-315 0.031 — 0.185 V
MCP1XX-450 0.044 — 0.263 V
MCP1XX-475 0.046 — 0.278 V
RST Low-level Output Voltage VOL ——0.4VI
OL = 500 µA, VDD = VTRIP(MIN)
RST High-level Output Voltage
(MCP102 and MCP103 only ) VOH VDD – 0.6 — — V IOH = 1 mA, For MCP102/MCP103
only (push-pull output)
Internal Pull-up Resistor
(MCP131 only) RPU —95—kΩ V
DD = 5.5V
Open-Drain Output Leakage Current
(MCP121 only) IOD —0.1—µA
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all limits are specified f or:
VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only), TA = -40°C to +125°C.
Parameters Sym Min Typ Max Units Conditions
Note 1: Trip point is ±1.5% from typical value.
2: Trip point is ±2.5% from typical value.
3: RST output is forced low. There is a current through the internal pull-up resistor.
4: This includes the current through the internal pull-up resistor and the reset power-up timer.
MCP102/103/121/131
DS-21906A-page 4 2004 Microchip Technology Inc.
FIGURE 1-1: Timing Diagram.
AC CHARACTERISTICS
TEMPERATURE CHARACTERISTIC S
Electrical Specifications: Unless otherwise indicated, all limits are specified f or:
VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only), TA = -40°C to +125°C.
Parameters Sym Min Typ Max Units Conditions
VDD Detec t to R ST Inactive tRPU 80 120 180 ms Figure 1-1 and CL = 50 pF
VDD Detec t to R ST Active tRPD — 130 — µs VDD ramped from VTRIP(MAX) +
250 mV down to VTRIP(MIN) –
250 mV, per Figure 1-1,
CL = 50 pF (Note 1)
RST Rise Time After RST Active
(MCP102 and MCP103 only) tRT —5 —µsFor RST 10% to 90% of final value
per Figure 1-1, CL = 50 pF
(Note 1)
Note 1: These parameters are for design guidance only and are not 100% tested.
1V
1V
VTRIP
VDD
RST
tRPU
VOH
tRT
tRPD
VOL
Electrical Specifications: Unless otherwise noted, all limits are specified for:
VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only), TA = -40°C to +125°C.
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range TA-40 — +85 ºC MCP1XX-195
Specified Temperature Range TA-40 — +125 ºC Except MCP1XX -195
Maximum Junction Temperature TJ— — +150 ºC
Storage Temperature Range TA-65 — +150 ºC
Package Thermal Resistances
Thermal Resistance, 3L-SOT23 θJA — 336 — ºC/W
Thermal Resistance, 3L-SC-70 θJA — 340 — ºC/W
Thermal Resistance, 3L-TO92 θJA — 131.9 — ºC/W
2004 Microchip Technology Inc. DS-21906A-page 5
MCP102/103/121/131
2.0 TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, all limits are specified for:
VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only; see Figure 4-1), TA = -40°C to +125°C.
FIGURE 2-1: IDD vs. Temperature (Reset
Power-up Timer Inactive) (MCP102-195).
FIGURE 2-2: IDD vs. Temperature (Reset
Power-up Timer Inactive) (MCP131-315).
FIGURE 2-3: IDD vs. Temperature (Reset
Power-up Timer Inactive) (MCP121-450).
FIGURE 2-4: IDD vs. Temperature (Reset
Power-up Timer Active) (MCP102-195).
FIGURE 2-5: IDD vs. Temperature (Reset
Power-up Timer Active) (MCP131-315).
FIGURE 2-6: IDD vs. Temperature (Reset
Power-up Timer Active) (MCP121-450).
Note: The g r ap hs and t ables provided following this n ote are a statistical s umm ary based on a l im ite d n um ber of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
-40
-20
0
20
40
60
80
100
120
140
Temperature (°C)
IDD (uA)
1.7V
1.0V
2.1V
2.8V
4.0V
5.0V
5.5V
MCP102-195
0
5
10
15
20
25
30
35
-40
-20
0
20
40
60
80
100
120
140
Temperature (°C)
IDD (uA)
1.0V
2.9V
MCP131-315
3.3V, 4.0V, 5.0V, 5.5V
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
-40
-20
0
20
40
60
80
100
120
140
Temperature (°C)
IDD (uA)
3.0V
1.0V
4.6V
4.1V
5.0V
5.5V
MCP121-450
4.8V
0
2
4
6
8
10
12
14
16
-40
-20
0
20
40
60
80
100
120
140
Temperature (°C)
IDD (uA)
2.1V
2.8V
4.0V
5.0V
5.5V
MCP102-195
0
10
20
30
40
50
60
70
80
-40
-20
0
20
40
60
80
100
120
140
Temperature (°C)
IDD (uA)
3.3V
4.0V
4.5V
5.0V
MCP131-315
5.5V
0
2
4
6
8
10
12
14
16
-40
-20
0
20
40
60
80
100
120
140
Temperature (°C)
IDD (uA)
4.6V
5.0V
5.5V
MCP121-450
4.8V
MCP102/103/121/131
DS-21906A-page 6 2004 Microchip Technology Inc.
Note: Unless otherwise indicated, all limits are specified for:
VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only; see Figure 4-1), TA = -40°C to +125°C.
FIGURE 2-7: IDD vs. VDD (Reset Power-
up Timer Inactive) (MCP102-195).
FIGURE 2-8: IDD vs. VDD (Reset Power-
up Timer Inactive) (MCP131-315).
FIGURE 2-9: IDD vs. VDD (Reset Power-
up Timer Inactive) (MCP121- 450).
FIGURE 2-10: IDD vs.VDD (Reset Power-up
Timer Active) (MCP102-195).
FIGURE 2-11: IDD vs.VDD (Reset Power-up
Timer Active) (MCP131-315).
FIGURE 2-12: IDD vs.VDD (Reset Power-up
Timer Active) (MCP121-450).
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
1.0 2.0 3.0 4.0 5.0 6.
0
VDD (V)
IDD (uA)
-40°C
+25°C
+85°C
+125°C
MCP102-195
0°C
-5
0
5
10
15
20
25
30
35
1.0 2.0 3.0 4.0 5.0 6.0
VDD (V)
IDD (uA)
MCP131-315 -40°C
+85°C
+125°C
0°C, +25°C
+70°
C
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0 2.0 3.0 4.0 5.0 6.
0
VDD (V)
IDD (uA)
MCP121-450
-40°C
+25°C
+85°C
+125°C
0°C
+70°C
0
2
4
6
8
10
12
14
16
1.0 2.0 3.0 4.0 5.0 6.
0
VDD (V)
IDD (uA )
0°C
+25°C
+70°C
+85°C
+125°C
-40°C
MCP102-195
Device in Reset
tRPU inactive
Device in Reset
tRPU inactive
0
10
20
30
40
50
60
70
80
1.0 2.0 3.0 4.0 5.0 6.0
VDD (V)
IDD (uA)
MCP131-315 -40°C, 0°C +25°C
+85°C
+125°C
+70°C
Device in Reset
tRPU inactive
-2
0
2
4
6
8
10
12
14
16
1.02.03.04.05.06.
0
VDD (V)
IDD (uA)
MCP121-450 -40°C
+25°C
+85°C
+125°C
0°C
+70°C
Device in Reset
tRPU inactive
2004 Microchip Technology Inc. DS-21906A-page 7
MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for:
VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121; see Figure 4-1), TA = -40°C to +125°C.
FIGURE 2-13: VTRIP vs. Temperature vs.
Hysteresis (MCP102-195).
FIGURE 2-14: VTRIP vs. Temperature vs.
Hysteresis (MCP131-315).
FIGURE 2-15: VTRIP vs. Temperature vs.
Hysteresis (MCP121-450).
FIGURE 2-16: VOL vs. IOL (MCP102-195 @
VDD = 1.7V).
FIGURE 2-17: VOL vs. IOL (MCP131-315 @
VDD = 2.9V).
FIGURE 2-18: VOL vs. IOL (MCP121-450 @
VDD = 4.1V).
1.895
1.900
1.905
1.910
1.915
1.920
1.925
1.930
1.935
1.940
1.945
-60 -10 40 90 140
Temperature (°C)
VTRIP (V)
0.000
0.005
0.010
0.015
0.020
0.025
0.030
0.035
0.040
0.045
0.050
Hyst (V)
VTRIP, decreasing VDD
VHYS, Hysteresis
MCP102-195
VTRIP, increasing VDD
3.060
3.080
3.100
3.120
3.140
3.160
3.180
3.200
-60 -10 40 90 140
Temperature (°C)
VTRIP (V)
0.090
0.092
0.094
0.096
0.098
0.100
0.102
0.104
0.106
0.108
Hyst (V)
MCP131-315
VTRIP, decreasi ng VDD
VTRIP, increasing V
DD
VHYS, Hysteresis
4.300
4.350
4.400
4.450
4.500
4.550
-60 -20 20 60 100 140
Temperature (°C)
VTRIP (V)
0.100
0.110
0.120
0.130
0.140
0.150
0.160
0.170
0.180
0.190
Hyst (V)
MCP121-450
VTRIP, decreasing VDD
VTRIP, increasing VDD
VHYS, Hysteresis
-0.020
0.000
0.020
0.040
0.060
0.080
0.100
0.120
0.00 0.25 0.50 0.75 1.00
IOL (mA)
VOL (V)
-40°C0°C
+85°C
+125°C
MCP102-195
VDD = 1.7V +70°C
+25°C
0.000
0.010
0.020
0.030
0.040
0.050
0.060
0.070
0.00 0.25 0.50 0.75 1.00
IOL (mA)
VOL (V)
MCP131-315
VDD = 2.9V
-40°C
+25°C
+85°C
+125°C
+70°C
0°C
0.000
0.010
0.020
0.030
0.040
0.050
0.060
0.00 0.25 0.50 0.75 1.00
IOL (mA)
VOL (V)
MCP121-450
VDD = 4.1V
-40°C
+25°C
+85°C
+125°C
+70°C
0°C
MCP102/103/121/131
DS-21906A-page 8 2004 Microchip Technology Inc.
Note: Unless otherwise indicated, all limits are specified for:
VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only; see Figure 4-1), TA = -40°C to +125°C.
FIGURE 2-19: VOL vs. Temperature
(MCP102-195 @ VDD = 1.7V).
FIGURE 2-20: VOL vs. Temperature
(MCP131-315 @ VDD = 2.9V).
FIGURE 2-21: VOL vs. Temperature
(MCP121-450 @ VDD = 4.1V).
FIGURE 2-22: VOH vs. IOL (MCP102-195
@ VDD = 2.1V).
0.000
0.020
0.040
0.060
0.080
0.100
0.120
0.140
-40 0 40 80 120
Temperature (°C)
VOL (V)
IOL = 0.00 mA
MCP102-195
VDD = 1.7 V
IOL = 0.25 mA
IOL = 0.50 mA
IOL = 0.75 mA
IOL = 1.00 mA
0.000
0.010
0.020
0.030
0.040
0.050
0.060
0.070
-40 0 40 80 120
Temperature (°C)
VOL (V)
MCP131-315
VDD = 2.9V
IOL = 0.00 mA
IOL = 0.25 mA
IOL = 0.50 mA
IOL = 0.75 mA
IOL = 1.00 mA
0.000
0.010
0.020
0.030
0.040
0.050
0.060
-40 0 40 80 120
Temperature (°C)
VOL (V)
IOL = 0.00 mA
IOL = 0.25 mA
IOL = 0.50 mA
IOL = 0.75 mA
IOL = 1.00 mA
MCP121-450
VDD = 4.1V
1.950
1.970
1.990
2.010
2.030
2.050
2.070
2.090
2.110
0.00 0.25 0.50 0.75 1.00
IOL (mA)
VOH (V)
MCP102-195
VDD = 2.1V
-40°C
+25°C
+85°C
+125°C
+70°C
0°C
2004 Microchip Technology Inc. DS-21906A-page 9
MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for:
VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only; see Figure 4-1), TA = -40°C to +125°C.
FIGURE 2-23: tRPD vs. Temperature
(MCP102-195).
FIGURE 2-24: tRPD vs. Temperature
(MCP131-315).
FIGURE 2-25: tRPD vs. Temperature
(MCP121-450).
FIGURE 2-26: tRPU vs. Temperature
(MCP102-195).
FIGURE 2-27: tRPU vs. Temperature
(MCP131-315).
FIGURE 2-28: tRPU vs. Temperature
(MCP121-450).
0
50
100
150
200
250
300
-40 -15 10 35 60 85 110
Temperatu re (°C)
tRPD (µs)
VDD decreasing from:
VTRIP(max) + 0.25V to VTRIP(min) - 0.25V
VDD decreasing
from: 5V - 1.7V
VDD decreasing
from: 5V - 0V
MCP102-195
0
50
100
150
200
250
-40 -15 10 35 60 85 110
Temperature (°C)
tRPD (µs)
VDD decreasing from:
VTRIP(max) + 0.25V to VTRIP(min) - 0.25V
VDD decreasing from:
5V - 2.7V
VDD decreasing from:
5V - 0V
MCP131-315
35
35.5
36
36.5
37
37.5
38
-40 -15 10 35 60 85 110
Temperature (°C)
tRT (µs)
VDD increasing from:
0V - 5.0V VDD increasing from:
0V - 5.5V
VDD increasing from:
0V - 4.6V VDD increasing from:
0V - 4.8V
MCP121-450
100
110
120
130
140
150
160
-40 -15 10 35 60 85 110
Temperature (°C)
tRPU (µs)
VDD increasing from:
0V - 2.1V
VDD increasing
from: 0V - 5.5V
VDD increasing from:
0V - 2.8V
VDD increasing
from: 0V - 4.0V
MCP102-195
100
110
120
130
140
150
160
-40 -15 10 35 60 85 110
Temperature (°C)
tRPU (µs)
VDD increasing from:
0V - 4.5V
VDD increasing from:
0V - 5.5V
VDD increasing from:
0V - 3.3V
VDD increasing from:
0V - 4.0V
MCP131-315
110
115
120
125
130
135
140
145
-40 -15 10 35 60 85 110
Temperature (°C)
tRPU (µs)
VDD increasing from:
0V - 4.8V
VDD increasing from:
0V - 5.0V
VDD increasing from:
0V - 5.5V
MCP121-450
MCP102/103/121/131
DS-21906A-page 10 2004 Microchip Technology Inc.
Note: Unless otherwise indicated, all limits are specified for:
VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only; see Figure 4-1), TA = -40°C to +125°C.
FIGURE 2-29: tRT vs. Temperature
(MCP102-195).
FIGURE 2-30: tRT vs. Temperature
(MCP131-315).
FIGURE 2-31: tRT vs. Temperature
(MCP121-450).
FIGURE 2-32: Transient Duration vs.
VTRIP (min) - VDD.
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
-40 -15 10 35 60 85 110
Temperature (°C)
tRT (µs )
VDD increasing from:
0V - 2.1V
VDD increasing from:
0V - 5.5V
VDD increasing from:
0V - 2.8V
VDD increasing from:
0V - 4.0V
MCP102-195
VDD increasing from:
0V - 5.0V
25
27
29
31
33
35
37
39
41
43
45
-40 -15 10 35 60 85 110
Temperature (°C)
tRT (µs)
VDD increasing from:
0V - 5.0V
VDD increasing from:
0V - 4.0V
VDD increasing from:
0V - 5.5V
VDD increasing from:
0V - 3.3V
VDD increasing from:
0V - 4.5V
MCP131-315
35
35.5
36
36.5
37
37.5
38
-40 -15 10 35 60 85 110
Temperature (°C)
tRT (µs)
VDD increasing from:
0V - 5.0V VDD increasing from:
0V - 5.5V
VDD increasing from:
0V - 4.6V VDD increasing from:
0V - 4.8V
MCP121-450
0
200
400
600
800
1000
1200
1400
0.001 0.01 0.1 1 10
VTRIP(Min) - VDD
Transient Duration (µS)
MCP121-450
MCP102-195
MCP131-315
2004 Microchip Technology Inc. DS-21906A-page 11
MCP102/103/121/131
3.0 PIN DESCRIPTION
The descriptions of the pins are li sted in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
Pin No.
Symbol Function
MCP102
MCP121
MCP131 MCP103
11RST
Output S t ate
VDD Falling:
H = VDD > VTRIP
L = VDD < VTRIP
VDD Rising:
H = VDD > VTRIP + VHYS
L = VDD < VTRIP + VHYS
23V
DD Positive power supply
32V
SS Ground refe renc e
MCP102/103/121/131
DS-21906A-page 12 2004 Microchip Technology Inc.
4.0 APPLICATION INFORMATION
For many of today’s microcontroller applications, care
must be taken to pre vent low-pow er conditions tha t can
cause many different system problems. The most
common causes are brown-out conditions, where the
system supply dr ops belo w the operatin g level mome n-
tarily. The second most common cause is when a
slowly decaying power supply causes the micro-
controller to begin executing instructions without
sufficient voltage to sustain volitile memory (RAM), thus
producing indeterminate results. Figure 4-1 shows a
typical application circuit.
The MCP102/103/121/131 are voltage supervisor
devices designed to keep a microcontroller in reset
until the system voltage has reached and stabilized at
the proper level for reliable system operation. These
devices also operate as protection from brown-out
conditions when the system supply voltage drops
below a safe operating level.
FIGURE 4-1: Typic al App li ca tio n Circui t.
4.1 RST Operation
The RST output pin operation determines how the
device can be used, and indicates when the system
should be forced into reset. To accomplish this, an
internal volt age re ferenc e is us ed to s et the v olt age tri p
point (VTRIP). Additionally, there is a hysteresis on this
trip point.
When the falling edge of VDD crosses this voltage
threshold, the reset power-down timer (TRPD) starts.
When this delay timer times out (TRPD), the RST pin is
forced low.
When the rising-edge of VDD crosses this voltage
threshold, the reset power-up timer (TRPU) starts.
When this delay timer times out (TRPU), the RST pin is
forced high, the reset power-up timer is active and
there is additional system current.
The actual voltage trip point (VTRIPAC) will be between
the minimum trip point (VTRIPMIN) and the maximum
trip point (VTRIPMAX). The hysteresis on this trip point
and the delay timer (TRPU) are to remove any “jitter”
that would occur on the RST pin when th e devi ce VDD
is at the trip point.
Figu re 4-2 shows the w aveform of the RST pin as deter-
mined by the VDD voltage, while Table 4-1 shows the
state of the RST pin. The VTRIP specification is for falling
VDD voltages. When the VDD voltage is rising, the R ST
will not be driven high until VDD is at VTRIP + VHYS. Once
VDD has crossed the voltage trip point, there is also a
minimal delay time (TRPD) bef ore the R ST pin is driven
low.
TABLE 4-1: RST PIN STATE S
FIGURE 4-2: RST Operation as Determined by the VTRIP and VHYS.
MCP1XX
VDD
VDD
VDD
RST MCLR
(reset input)
(Active-Low)
VSS VSS
PICmicro®
Microcontroller
RPU
Note 1: Resistor RPU may be required with the
MCP121 due to the open-drain output
.
Resistor RPU may not be required with
the MCP131 due to the internal pull-up
resistor. The MCP102 and MCP103 do
not require the external pull-up resistor.
0.1
µF
State of RST Pin when:
Device VDD < VTRIP V
DD >
VTRIP + V HYS
Ouput Driver
MCP102 LHPush-pull
MCP103 LHPush-pull
MCP121 LH
(1) Open-drain
(1)
MCP131 LH
(2) Open-drain
(2)
Note 1: Requires External Pull-up resistor
2: Has Internal Pull -up res is tor
VDD VTRIPMAX
VTRIPMIN VTRIPAC
VTRIPAC
VTRIPAC + VHYSAC
RST
1V
< 1V is outside the
device specifications
tRPD
tRPU
tRPD tRPU
2004 Microchip Technology Inc. DS-21906A-page 13
MCP102/103/121/131
4.2 Negative Going VDD Transients
The minimum pulse width (time) required to cause a
reset may be an important criteria in the implementa-
tion of a POR circuit. This time is referred to as
transien t durat ion an d is the am ount o f time need ed for
these s up erv iso ry devices to res po nd to a dro p i n V DD.
The transi ent duration ti me is depend ant on the magn i-
tude of VTRIP – VDD. Generally speaking, the transient
duration decreases with increases in VTRIP – VDD.
Figure 4-3 shows a typical transient duration vs. reset
comparator overdrive, for which the MCP102/103/121/
131 will not generate a reset pulse. It shows that the
farther be low the trip point the transien t pulse g oes, the
duration of the pulse required to cause a reset gets
shorter. Figure 2-32 shows the transient response
characteristics for the MCP102/103 /121/131.
A 0.1 µF bypass capacitor, mounted as close as
possible to the VDD pin, provides additional transient
immunity (refer to Figu re 4-1).
FIGURE 4-3: Example of Typical
Transient Duration Waveform.
4.3 Reset Power-up Timer (tRPU)
Figure 4-4 illustrates the device current states. While
the system is powering down, the device has a low
current. This current is dependent on the device VDD
and trip point. When the device VDD rises thr ough the
voltage trip point (VTRIP), an internal timer starts . This
timer cons umes additional current until the RST pin is
driven (or released) high. This time is known as the
Reset Power-up Time (tRPU). Figure 4-4 shows when
tRPU is active (device consuming additional current).
FIGURE 4-4: Reset Pow er-up Timer
Waveform.
4.3. 1 EFFECT OF TEMPERATURE ON
RESET POWER-UP TIMER (TRPU)
The Reset Power-up timer time-out period (tRPU)
determines how long the device remains in the reset
condition. This is affected by both VDD and temperature.
Typical responses for different VDD values and
temperatures are shown in Figures 2-26, 2-27 and
2-28.
Time (µs)
0V
Supply Voltage
5V
VTRIP(MIN) - VDD
tTRANS
VTRIP(MAX)
VTRIP(MIN)
VTRIP
VDD
RST tRPU
Reset Power-up
Timer Inactive
Reset
Power-up
Timer
Inactive
Reset Power-up
Timer Active
See Figures 2-1,
2-2 and 2-3
See Figures 2-4,
2-5 and 2-6
See Figures 2-1
,
2-2 and 2-3
MCP102/103/121/131
DS-21906A-page 14 2004 Microchip Technology Inc.
5.0 PACKAGING INFORMATION
5.1 Package Marking Information
Part Number MCP1xx =
MCP102 MCP103 MCP121 MCP131
MCP1xxT-195I/LB BGN FGN DGN CGN
MCP1xxT-240E/LB BHN FHN DHN CHN
MCP1xxT-270E/LB BJN FJN DJN CJN
MCP1xxT-300E/LB BKN FKN DKN CKN
MCP1xxT-315E/LB BLN FLN DLN CLN
MCP1xxT-450E/LB BMN FMN DMN CMN
MCP1xxT-475E/LB BPN FPN DPN CPN
Legend: 1 Part Number + temperature range and voltage (two-digit code)
2 Part Number + temperature range and voltage (two-digit code)
Y Year (Y, YY)
WW Work Week
N Traceability Code (N, NN, NNN)
Note: In the event the full Microchip part number cannot be marked on one line, it will be
carried over to the next line thus limiting the number of available characters for customer
specific information.
3-Pin SOT-23
3-Pin SC-70
Top Side
cdef
cde
3-Lead TO-92
XXXXXX
XXXXXX
XXXXXX
YWWNNN
Example:
MCP102
195I
TO0425
456
Part Number MCP1xx =
MCP102 MCP103 MCP121 MCP131
MCP1xxT-195I/TT JGNN TGNN LGNN KGNN
MCP1xxT-240ETT JHNN THNN LHNN KHNN
MCP1xxT-270E/TT JJNN TJNN LJNN KJNN
MCP1xxT-300E/TT JKNN TKNN LKNN KKNN
MCP1xxT-315E/TT JLNN TLNN LLNN KLNN
MCP1xxT-450E/TT JMNN TMNN LMNN KMNN
MCP1xxT-475E/TT JPNN TPNN LPNN KPNN
Example:
Example:
cde
NY
WW
NN
Bottom Side
2004 Microchip Technology Inc. DS-21906A-page 15
MCP102/103/121/131
3-Lead Plastic Small Outl ine Transistor (TT) (SOT-23)
10501050
β
Mold Draft Angle Bottom 10501050
α
Mold Draft Angle Top 0.510.440.37.020.017.015BLead Width 0.180.140.09.007.006.004
c
Lead Thickness 10501050
φ
Foot Angle 0.550.450.35.022.018.014LFoot Length 3.042.922.80.120.115.110DOvera ll Length 1.401.301.20.055.051.047E1Molded Package Width 2.642.372.10.104.093.083EOverall Width 0.100.060.01.004.002.000A1Standoff § 1.020.950.88.040.037.035A2Molded Package Thickness 1.121.010.89.044.040.035AOverall Height 1.92.076
p1
Outside le ad pitch (basic) 0.96.038
p
Pitch 33
n
Number of Pin s MAXNOMMINMAXNOMMINDimen sion Li mits MILLIMETERSINCHES*Units
2
1
p
D
B
n
E
E1
L
c
β
φ
α
A2
A
A1
p1
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: TO-236
Drawing No. C04-104
§ Significant Characteristic
MCP102/103/121/131
DS-21906A-page 16 2004 Microchip Technology Inc.
3-Lead Plastic Small Outline Transistor (LB) (SC-70)
12°8°12°8°
b
Mold Draft Angle Bottom
12°8°12°8°
a
Mold Draft Angle Top
0.400.15.016.006BLead Width
0.250.08.010.003
c
Lead Thickness
0.410.10.016.004LFoot Length
2.251.80.089.071DOverall Length
1.351.15.053.045E1Molded Package Width
2.401.80.094.071EOverall Width
.0100.00.0004.000A1Standoff
1.000.80.039.031A2Molded Package Thickness
1.100.80.043.031AOverall Height
1.30 BSC.
p1
Outside lead pitch (basic)
0.65 BSC.
p
Pitch
33Number of Pins
MAXMINMAXMINDimension Limits
MILLIMETERS*INCHESUnits
shall not exceed .005" (0.127mm) per side.
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions
Notes:
JEITA (EIAJ) Equivalent: SC70
Drawing No. C04-104
*Controlling Parameter
L
B
E1
E
p
c
p1 D
1
2
3
b
a
A A2
A1
.026 BSC.
.051 BSC.
2004 Microchip Technology Inc. DS-21906A-page 17
MCP102/103/121/131
3-Lead Plastic Transistor Outline (TO) (TO-92)
432432
β
Mold Draft Angle Bottom 654654
α0.560.480.41.022.019.016BLead Width 0.510.430.36.020.017.014
c
Lead Thickness
2.412.292.16.095.090.085RMolded Package Radius 4.954.644.32.195.183.170DOverall Length 4.954.714.45.195.186.175E1Overall Width 3.943.623.30.155.143.130ABottom to Package Flat 1.27.050
p
Pitch 33
n
Number of Pin s MAXNOMMINMAXNOMMINDimen sion Li mits MILLIMETERSINCHES*Units
R
n
1
3
α
p
L
B
A
c
β
1
D
2
E1
Tip to Seating Plane L .500 .555 .610 12.70 14.10 15.49
*Controlling Parameter
Mold Draft Angle Top
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: TO-92
Drawing No. C04-101
MCP102/103/121/131
DS-21906A-page 18 2004 Microchip Technology Inc.
5.2 Product Tape and Reel Specifications
FIGURE 5-1: EMBOSSED CARRIER DIMENSIONS (8, 12, 16 AND 24 MM TAPE ONLY)
FIGURE 5-2: 3-LEAD SOT-23/SC70 DEVICE TAPE AND REEL SPECIFICATIONS
Top
Cover
Tape
K0
P
W
B0
A0
TABLE 1: CARRIER TAPE/CAVITY DIMENSIONS
Case
Outline Package
Type
Carrier
Dimensions Cavity
Dimensions Output
Quantity
Units
Reel
Diameter in
mm
W
mm P
mm A0
mm B0
mm K0
mm
TT SOT-23 3L 8 4 3.15 2.77 1.22 3000 180
LB SC-70 3L 8 4 2.4 2.4 1.19 3000 180
Standard Reel Component Orientation
Device
Marking
PIN 1
User Direction of Feed
W
P
2004 Microchip Technology Inc. DS-21906A-page 19
MCP102/103/121/131
FIGURE 5-3: TO-92 DEVICE TAPE AND REEL SPECIFICATIONS
Device
Marking
P
Seal
Tape
Back
Tape
MARK
FACE
User Direction of Feed
W
MARK
FACE
MARK
FACE
Note: Bent leads are for Tape and Reel only.
MCP102/103/121/131
DS-21906A-page 20 2004 Microchip Technology Inc.
NOTES:
2004 Microchip Technology Inc. DS21906A-page 21
MCP102/103/121/131
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Sales and Support
Device: MCP102: MicroPower Voltage Supervisor, push-pull
MCP102T: MicroPower V oltage Supervisor, push-pull
(Tape and Ree l)
MCP103: MicroPower Voltage Supervisor, push-pull
MCP103T: MicroPower V oltage Supervisor, push-pull
(Tape and Ree l)
MCP121 MicroPower V oltage Supervisor, open-drain
MCP121T: MicroPower Voltage Supervisor, open-drain
(Tape and Ree l)
MCP131 MicroPower V oltage Supervisor, open-drain
MCP131T: MicroPower Voltage Supervisor, open-drain
(Tape and Ree l)
Monitor i ng Optio ns: 195 = 1.90V
240 = 2.32V
270 = 2.63V
300 = 2.93V
315 = 3.08V
450 = 4.38V
475 = 4.63V
Temperature Range: I = -40°C to +85°C (MCP11X-195 only)
E = -40°C to +125°C (Except MCP11X-195 only)
Package: TT = SOT-23B, 3-lead
LB = SC-70, 3-lead
TO = TO-92, 3-lead
Lead Fini sh : Blank= Ma tte Tin (Pure Sn)
PART NO. XXX X
Temperature
Monitoring
Options
Device
Examples:
a) MCP102T-195I/TT: Tape and Reel,
1.95V MicroPower
Voltage Supervisor,
push-pull, -40°C to +85°C,
SOT-23B-3 package.
b) MCP102-300E/TO: 3.00V MicroPower
Voltage Supervisor,
push-pull, -40°C to +125°C,
T O-92-3 package.
a) MCP103T-270E/TT: Tape and Reel,
2.70V MicroPower
Voltage Supervis or,
push-pull, -40°C to +125°C,
SOT-23B-3 package.
b) MCP103T-475E/LB:Tape and Reel,
4.75V MicroPower
Voltage Supervis or,
push-pull,
-40°C to +125 °C ,
SC- 70-3 pac kage.
a) MCP121T-315I/LB: Tape and Reel,
3.15V MicroPower
Voltage Supervis or,
open-drain,
-40°C to +125 °C ,
SC- 70-3 pac kage.
b) MCP121-300E/TO: 3.00V MicroPower
Voltage Supervisor,
open-drain,
-40°C to +125 °C ,
T O-92-3 package.
a) MCP131T-195I/TT: Tape and Reel,
1.95V MicroPower
Voltage Supervisor,
open-drain,
-40°C to +85°C,
SOT-23B-3 package.
b) MCP131-300E/TO: 3.00V MicroPower
Voltage Supervisor,
open-drain,
-40°C to +125 °C ,
T O-92-3 package.
Range
XX
Package
X
Tape/Reel
Option
–/
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and
recommended workarounds. To determine if an errata sheet exists for a pa rticular device, please contact one of the following:
1. Your local Microc hip sales office
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3. The Microchip Wor ldwide Site (www. micr ochip.com)
Please specify which device, revision of silicon and Dat a Sheet (include Literature #) you are using.
Customer Notification System
Register on our web site (www.microchip.com) to receive the most current information on our products.
MCP102/103/121/131
DS21906A-page 22 2004 Microchip Technology Inc.
NOTES:
2004 Microchip Technology Inc. DS21906A-page 23
Information contained in this publication regarding device
applications and the like is intended through sug gestion only
and may be superseded by updates. It i s your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microc hip Technology Incorporated with respect
to the accuracy or use of such inf orm ation, or inf ringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical
components in life support systems is not authorized except
with express written approval by Microchip. No licenses are
conveyed, implicitly or otherwise, under any intellectual
property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro,
PICSTA RT, PRO MAT E, PowerSma rt , rfPIC, and
SmartShunt are registered trademarks of Microchip
Tec hnology Incor porated in the U.S.A. and other countries.
AmpLab, FilterLab, M XDE V, MXLAB, PICMASTER, SEEV AL,
SmartSensor and The Embedded Control Solutions Company
are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Migratable Memory, MPASM,
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,
PowerTool, rfLAB, rfPICDEM, Select Mode, Sm art Serial,
SmartTel and Total Endurance are trademarks of Microchip
Tec hnology Incor porated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2004, Microchip Technology Inc orporated, Pr inted in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on t he market today, when used in t he
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outs ide the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is c onstantly evolving. We a t Microchip are committed to continuously improving the c ode protect ion f eatures of our
products. Attempts to break Microchip’ s code protection f eature may be a violati on of t he Digit al Millennium Copyright Act. If such act s
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, micro peripherals, nonvolat ile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS21906A-page 24 2004 Microchip Technology Inc.
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