The MilQor® series of high-reliability DC-DC converters
brings SynQor’s field proven high-efficiency synchronous
rectifier technology to the Military/Aerospace industry.
SynQor’s innovative QorSealTM packaging approach ensures
survivability in the most hostile environments. Compatible
with the industry standard format, these converters operate
at a fixed frequency, have no opto-isolators, and follow
conservative component derating guidelines. They are
designed and manufactured to comply with a wide range of
military standards.
HIGH RELIABILITY DC-DC CONVERTER
FULL POWER OPERATION: -55ºC T O +125ºC
• Fixed switching frequency
• No opto-isolators
• Parallel operation with current share
• Remote sense
• Clock synchronization
• Primary and secondary referenced enable
• Continuous short circuit and overload protection with
auto-restart feature
• Input under-voltage lockout/over-voltage shutdown
Features
MQFL series converters (with MQME filter) are designed to meet:
• MIL-HDBK-704-8 (A through F)
• RTCA/DO-160E Section 16
• MIL-STD-1275B
• DEF-STAN 61-5 (part 6)/5
• MIL-STD-461 (C, D, E)
• RTCA/DO-160E Section 22
Specification Compliance
MQFL series converters are:
• Designed for reliability per NAVSO-P3641-A guidelines
• Designed with components derated per:
— MIL-HDBK-1547A
— NAVSO P-3641A
Design Process
MQFL series converters are qualified to:
• MIL-STD-810F
— consistent with RTCA/D0-160E
• SynQor’s First Article Qualification
— consistent with MIL-STD-883F
• SynQor’s Long-Term Storage Survivability Qualification
• SynQor’s on-going life test
Qualification Process
• AS9100 and ISO 9001:2000 certified facility
• Full component traceability
• Temperature cycling
• Constant acceleration
• 24, 96, 160 hour burn-in
• Three level temperature screening
In-Line Manufacturing Process
DE S I G N E D & MA N U F A C T U R E D IN T H E USA
FE A T U R I N G QO R SE A L™ HI-RE L AS S E M B L Y
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 1
MQFL-270-28S
Single Output
155-400 V 155-475 V 28 V 4 A 88% @ 4 A / 86% @ 2 A
Continuous Input Transient Input Output Output Efciency
The MilQor® series of high-reliability DC-DC converters
brings SynQor’s field proven high-efficiency synchronous
rectifier technology to the Military/Aerospace industry.
SynQor’s innovative QorSealTM packaging approach ensures
survivability in the most hostile environments. Compatible
with the industry standard format, these converters operate
at a fixed frequency, have no opto-isolators, and follow
conservative component derating guidelines. They are
designed and manufactured to comply with a wide range of
military standards.
HIGH RELIABILITY DC-DC CONVERTER
FULL POWER OPERATION: -55ºC T O +125ºC
• Fixed switching frequency
• No opto-isolators
• Parallel operation with current share
• Remote sense
• Clock synchronization
• Primary and secondary referenced enable
• Continuous short circuit and overload protection with
auto-restart feature
• Input under-voltage lockout/over-voltage shutdown
Features
MQFL series converters (with MQME filter) are designed to meet:
• MIL-HDBK-704-8 (A through F)
• RTCA/DO-160E Section 16
• MIL-STD-1275B
• DEF-STAN 61-5 (part 6)/5
• MIL-STD-461 (C, D, E)
• RTCA/DO-160E Section 22
Specification Compliance
MQFL series converters are:
• Designed for reliability per NAVSO-P3641-A guidelines
• Designed with components derated per:
— MIL-HDBK-1547A
— NAVSO P-3641A
Design Process
MQFL series converters are qualified to:
• MIL-STD-810F
— consistent with RTCA/D0-160E
• SynQor’s First Article Qualification
— consistent with MIL-STD-883F
• SynQor’s Long-Term Storage Survivability Qualification
• SynQor’s on-going life test
Qualification Process
• AS9100 and ISO 9001:2000 certified facility
• Full component traceability
• Temperature cycling
• Constant acceleration
• 24, 96, 160 hour burn-in
• Three level temperature screening
In-Line Manufacturing Process
DE S I G N E D & MA N U F A C T U R E D IN T H E USA
FE A T U R I N G QO R SE A L™ HI-RE L AS S E M B L Y
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 2
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
BLOCK DIAGRAM
ISOLATION STAGEREGULATION STAGE
UVLO
OVSD
CONTROL
POWER
PRIMARY
CONTROL
+Vin
INPUT
RETURN
CASE
ENABLE 1
SYNC OUT
SYNC IN
1
2
3
4
5
6
GATE DRIVERS
ISOLATION BARRIER
CURRENT
LIMIT
CURRENT
SENSE
BIAS POWER
TRANSFORMER
T1
T2
MAGNETIC
DATA COUPLING
7
8
SECONDARY
CONTROL
GATE DRIVERS
12
11
10
9
- SENSE
+Vout
OUTPUT
RETURN
SHARE
ENABLE 2
+ SENSE
T1 T2
TYPICAL CONNECTION DIAGRAM
270Vdc Load
MQFL
+VIN
IN RTN
CASE
ENA 1
SYNC OUT
SYNC IN
ENA 2
SHARE
+ SNS
– SNS
OUT RTN
+VOUT
1
2
3
4
5
6
12
11
10
9
8
7
open
means
on
open
means
on
+
–
–
+
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 3
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
MQFL-270-28S ELECTRICAL CHARACTERISTICS
Parameter Min. Typ. Max. Units Notes & Conditions Group A
Vin=270 V dc ±5%, Iout=4 A, CL=0 µF, free running (see Note 10)
unless otherwise specied Subgroup
(see Note 13)
ABSOLUTE MAXIMUM RATINGS
Input Voltage
Non-Operating 600 V
Operating 550 V See Note 1
Reverse Bias (Tcase = 125ºC) -0.8 V
Reverse Bias (Tcase = -55ºC) -1.2 V
Isolation Voltage (I/O to case, I to O)
Continuous -500 500 A
Transient (≤100 µs) -800 800 V
Operating Case Temperature -55 125 °C See Note 2
Storage Case Temperature -65 135 °C
Lead Temperature (20 s) 300 °C
Voltage at ENA1, ENA2 -1.2 50 V
INPUT CHARACTERISTICS
Operating Input Voltage Range 155 270 400 V Continuous 1, 2, 3
" 155 270 475 V Transient, 1 s 4, 5, 6
Input Under-Voltage Lockout See Note 3
Turn-On Voltage Threshold 142 150 155 V 1, 2, 3
Turn-Off Voltage Threshold 133 140 145 V 1, 2, 3
Lockout Voltage Hysteresis 5 11 17 V 1, 2, 3
Input Over-Voltage Shutdown See Note 3
Turn-Off Voltage Threshold 490 520 550 V 1, 2, 3
Turn-On Voltage Threshold 450 475 500 V 1, 2, 3
Shutdown Voltage Hysteresis 20 50 80 V 1, 2, 3
Maximum Input Current 1 A Vin = 155 V; Iout = 4 A 1, 2, 3
No Load Input Current (operating) 28 35 mA 1, 2, 3
Disabled Input Current (ENA1) 1 4 mA Vin = 155 V, 270 V, 475 V 1, 2, 3
Disabled Input Current (ENA2) 6 11 mA Vin = 155 V, 270 V, 475 V 1, 2, 3
Input Terminal Current Ripple (pk-pk) 140 180 mA Bandwidth = 100 kHz – 10 MHz; see Figure 14 1, 2, 3
OUTPUT CHARACTERISTICS
Output Voltage Set Point (Tcase = 25ºC) 27.72 28.00 28.28 V Vout at sense leads 1
Vout Set Point Over Temperature 27.6 28 28.4 V " 2, 3
Output Voltage Line Regulation -20 0 20 mV " ; Vin = 155 V, 270 V, 475 V; Iout=4 A 1, 2, 3
Output Voltage Load Regulation 120 135 150 mV " ; Vout @ (Iout=0 A) - Vout @ (Iout=4 A) 1, 2, 3
Total Output Voltage Range 27.44 28.00 28.56 V " 1, 2, 3
Vout Ripple and Noise Peak to Peak 45 90 mV Bandwidth = 10 MHz; CL=11µF 1, 2, 3
Operating Output Current Range 0 4 A 1, 2, 3
Operating Output Power Range 0 112 W 1, 2, 3
Output DC Current-Limit Inception 4.1 4.7 5.3 A See Note 4 1, 2, 3
Short Circuit Output Current 4.1 4.8 5.5 A Vout ≤ 1.2 V; see Note 15 1, 2, 3
Back-Drive Current Limit while Enabled 1.5 A 1, 2, 3
Back-Drive Current Limit while Disabled 10 50 mA 1, 2, 3
Maximum Output Capacitance 3,000 µF See Note 5
DYNAMIC CHARACTERISTICS
Output Voltage Deviation Load Transient See Note 6
For a Pos. Step Change in Load Current -2500 -2000 mV Total Iout step = 2A‹-›4A, 0.4A‹-›2A; CL=11µF 4, 5, 6
For a Neg. Step Change in Load Current 2000 2500 mV " 4, 5, 6
Settling Time (either case) 300 500 µs See Note 7 4, 5, 6
Output Voltage Deviation Line Transient Vin step = 155V‹-›475V; CL=11 µF; see Note 8
For a Pos. Step Change in Line Voltage 3500 4500 mV " 4, 5, 6
For a Neg. Step Change in Line Voltage -4500 4500 mV " 4, 5, 6
Settling Time (either case) 500 700 µs See Note 7, Iout=2 A See Note 5
Turn-On Transient
Output Voltage Rise Time 6 10 ms Vout = 2.8 V-›25.2 V 4, 5, 6
Output Voltage Overshoot 0 2 % See Note 5
Turn-On Delay, Rising Vin 50 75 120 ms ENA1, ENA2 = 5 V; see Notes 9 & 11 4, 5, 6
Turn-On Delay, Rising ENA1 5 10 ms ENA2 = 5 V; see Note 9 4, 5, 6
Turn-On Delay, Rising ENA2 2 4 ms ENA1 = 5 V; see Note 9 4, 5, 6
EFFICIENCY
Iout = 4 A (155 Vin) 85 89 % 1, 2, 3
Iout = 2 A (155 Vin) 90 % 1, 2, 3
Iout = 4 A (270 Vin) 84 88 % 1, 2, 3
Iout = 2 A (270 Vin) 81 86 % 1, 2, 3
Iout = 4 A (400 Vin) 81 86 % 1, 2, 3
Iout = 2 A (400 Vin) 82 % 1, 2, 3
Load Fault Power Dissipation 22 32 W Iout at current limit inception point - see Note 4 1, 2, 3
Short Circuit Power Dissipation 22 24 W Vout ≤ 1.2 V; see Note 15 See Note 5
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 4
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
MQFL-270-28S ELECTRICAL CHARACTERISTICS (Continued)
Parameter Min. Typ. Max. Units Notes & Conditions Group A
Vin=270 V dc ±5%, Iout=4 A, CL=0 µF, free running (see Note 10)
unless otherwise specied Subgroup
(see Note 13)
ISOLATION CHARACTERISTICS
Isolation Voltage Dielectric strength
Input RTN to Output RTN 500 V 1
Any Input Pin to Case 500 V 1
Any Output Pin to Case 500 V 1
Isolation Resistance (in rtn to out rtn) 100 MΩ 1
Isolation Resistance (any pin to case) 100 MΩ 1
Isolation Capacitance (in rtn to out rtn) 44 nF 1
FEATURE CHARACTERISTICS
Switching Frequency (free running) 500 550 600 kHz 1, 2, 3
Synchronization Input
Frequency Range 500 700 kHz 1, 2, 3
Logic Level High 2 10 V 1, 2, 3
Logic Level Low -0.5 0.8 V 1, 2, 3
Duty Cycle 20 80 % See Note 5
Synchronization Output
Pull Down Current 20 mA VSYNC OUT = 0.8 V See Note 5
Duty Cycle 25 75 % Output connected to SYNC IN of other MQFL unit See Note 5
Enable Control (ENA1 and ENA2)
Off-State Voltage 0.8 V 1, 2, 3
Module Off Pulldown Current 80 µA Current drain required to ensure module is off See Note 5
On-State Voltage 2 V 1, 2, 3
Module On Pin Leakage Current 20 µA Imax draw from pin allowed with module still on See Note 5
Pull-Up Voltage 3.2 4.0 4.8 V See Figure A 1, 2, 3
RELIABILITY CHARACTERISTICS
Calculated MTBF (MIL-STD-217F2)
GB @ Tcase = 70ºC 2600 103 Hrs.
AIF @ Tcase = 70ºC 300 103 Hrs.
Demonstrated MTBF TBD 103 Hrs.
WEIGHT CHARACTERISTICS
Device Weight 79 g
Electrical Characteristics Notes
1. Converter will undergo input over-voltage shutdown.
2. Derate output power to 50% of rated power at Tcase = 135º C.
3. High or low state of input voltage must persist for about 200µs to be acted on by the lockout or shutdown circuitry.
4. Current limit inception is dened as the point where the output voltage has dropped to 90% of its nominal value.
5. Parameter not tested but guaranteed to the limit specied.
6. Load current transition time ≥ 10 µs.
7. Settling time measured from start of transient to the point where the output voltage has returned to ±1% of its nal value.
8. Line voltage transition time ≥ 250 µs.
9. Input voltage rise time ≤ 250 µs.
10. Operating the converter at a synchronization frequency above the free running frequency will slightly reduce the converter’s efciency and may also
cause a slight reduction in the maximum output current/power available. For more information consult the factory.
11. After a disable or fault event, module is inhibited from restarting for 300 ms. See Shut Down section.
12. SHARE pin outputs a power failure warning pulse during a fault condition. See Current Share section.
13. Only the ES and HB grade products are tested at three temperatures. The B and C grade products are tested at one temperature. Please refer to the
ESS table for details.
14. These derating curves apply for the ES- and HB- grade products. The C- grade product has a maximum case temperature of 100º C and a maximum
junction temperature rise of 20º C above TCASE. The B- grade product has a maximum case temperature of 85º C and a maximum junction temperature
rise of 20º C at full load.
15. Converter delivers current into a persisting short circuit for up to 1 second. See Current Limit in the Application Notes section.
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 5
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
60
65
70
75
80
85
90
95
100
01234
Load Current (A)
Efficiency (%)
155 Vin
270 Vin
400 Vin
Figure 1: Efficiency at nominal output voltage vs. load current for
minimum, nominal, and maximum input voltage at T
CASE=25
°
C.
60
65
70
75
80
85
90
95
100
-55ºC 25ºC 125ºC
Case Temperature (ºC)
Efficiency (%)
Figure 2: Efficiency at nominal output voltage and 60% rated power vs.
case temperature for input voltage of 155V, 270V, and 400V.
0
2
4
6
8
10
12
14
16
18
20
0 1 2 3 4
Load Current (A)
Power Dissipation (W)
155 Vin
270 Vin
400 Vin
Figure 3: Power dissipation at nominal output voltage vs. load current
for minimum, nominal, and maximum input voltage at T
CASE=25
°
C.
0
2
4
6
8
10
12
14
16
18
20
-55ºC 25ºC 125ºC
Case Temperature (ºC)
Power Dissipation (W)
155 Vin
270 Vin
400 Vin
Figure 4: Power dissipation at nominal output voltage and 60% rated
power vs. case temperature for input voltage of 155V, 270V, and 400V.
Figure 5: Output Current / Output Power derating curve as a function
of T
CASE and the Maximum desired power MOSFET junction tempera-
ture.
0
5
10
15
20
25
30
012345
Load Current (A)
Output Voltage (V)
270 Vin
Figure 6: Output voltage vs. load current showing typical current limit
curves. See Current Limit section in the Application Notes.
0
1
2
3
4
5
6
25 45 65 85 105 125 145
Case Temperature (ºC)
Iout (A)
0
28
56
84
112
140
168
= 105ºC
= 125ºC
= 145ºC
Pout (W)
Tjmax
Tjmax
Tjmax
135
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 6
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
Figure 7: Turn-on transient at full resistive load and zero output capac-
itance initiated by ENA1. Input voltage pre-applied. Ch 1: Vout (10V/
div). Ch 2: ENA1 (5V/div).
Figure 8: Turn-on transient at full resistive load and 10 mF output
capacitance initiated by ENA1. Input voltage pre-applied. Ch 1: Vout
(10V/div). Ch 2: ENA1 (5V/div).
Figure 9: Turn-on transient at full resistive load and zero output capac-
itance initiated by ENA2. Input voltage pre-applied. Ch 1: Vout (10V/
div). Ch 2: ENA2 (5V/div).
Figure 10: Turn-on transient at full resistive load and zero output
capacitance initiated by Vin. ENA1 and ENA2 both previously high.
Ch 1: Vout (10V/div). Ch 2: Vin (100V/div).
Figure 11: Output voltage response to step-change in load current
50%-100%-50% of Iout (max). Load cap: 1
µ
F ceramic cap and 10
µ
F, 100
m
W
ESR tantalum cap. Ch 1: Vout (2 V/div). Ch 2: Iout (2 A/div).
Figure 12: Output voltage response to step-change in load current
0%-50%-0% of Iout (max). Load cap: 1
µ
F ceramic cap and 10
µ
F, 100 m
W
ESR tantalum cap. Ch 1: Vout (1 V/div). Ch 2: Iout (2 A/div).
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 7
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
Figure 13: Output voltage response to step-change in input voltage
(155 V - 400 V - 155 V). Load cap: 10
µ
F, 100 m
W
ESR tantalum cap and
1
µ
F ceramic cap. Ch 1: Vin (100 V/div). Ch 2: Vout (2 V/div).
Figure 14: Test set-up diagram showing measurement points for Input
Terminal Ripple Current (Figure 15) and Output Voltage Ripple
(Figure 16).
Figure 15: Input terminal current ripple, ic, at full rated output current
and nominal input voltage with SynQor MQ filter module (50 mA/div).
Bandwidth: 20MHz. See Figure 14.
Figure 16: Output voltage ripple, Vout, at nominal input voltage and
rated load current (20 mV/div). Load capacitance: 1
µ
F ceramic capac-
itor and 10
µ
F tantalum capacitor. Bandwidth: 10 MHz. See Figure 14.
Figure 17: Rise of output voltage after the removal of a short circuit
across the output terminals. Ch 1: Vout (10 V/div). Ch 2: Iout (10 A/
div).
Figure 18: SYNC OUT vs. time, driving SYNC IN of a second SynQor
MQFL converter. Ch1: SYNC OUT: (1V/div).
MQFL
Converter
MQME
Filter
See Fig. 15 See Fig. 16
1
µ
F
ceramic
capacitor
10
µ
F,
100m
W
ESR
capacitor
VSOURCE
iCVOUT
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 8
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
0.01
0.1
1
10
10 100 1,000 10,000 100,000
Hz
Output Impedance (ohms)
155 Vin
270 Vin
400 Vin
M01M1K00
1
K
0
1Frequency (in Hz)
0
10
20
30
40
50
60
70
80
90
100
110
Amplitude (in dBµV)
Figure 23: High frequency conducted emissions of standalone MQFL-
270-05S, 5Vout module at 120W output, as measured with Method
CE102. Limit line shown is the ‘Basic Curve’ for all applications with a
270V source.
M01M1K0
0
1K01
0
10
20
30
40
50
60
70
80
90
100
110
Amplitude (in dBµV)
Frequency (in Hz)
Figure 24: High frequency conducted emissions of MQFL-270-05S, 5Vout
module at 120W output with MQFL-270-P filter, as measured with Method
CE102. Limit line shown is the ‘Basic Curve’ for all applications with a
270V source.
Figure 19: Magnitude of incremental output impedance (Zout = vout/
iout) for minimum, nominal, and maximum input voltage at full rated
power.
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
10 100 1,000 10,000 100,000
Hz
Forward Transmission (dB)
155 Vin
270 Vin
400 Vin
Figure 20: Magnitude of incremental forward transmission (FT =
vout/vin) for minimum, nominal, and maximum input voltage at full
rated power.
-55
-45
-35
-25
-15
-5
5
10 100 1,000 10,000 100,000
Hz
Reverse Transmission (dB)
155 Vin
270 Vin
400 Vin
Figure 21: Magnitude of incremental reverse transmission (RT = iin/iout)
for minimum, nominal, and maximum input voltage at full rated power.
1
10
100
1000
10000
10 100 1,000 10,000 100,000
Hz
Input Impedance (ohms)
155 Vin
270 Vin
400 Vin
Figure 22: Magnitude of incremental input impedance (Zin = vin/iin)
for minimum, nominal, and maximum input
voltage at full rated power.
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 9
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
BASIC OPERATION AND FEATURES
The MQFL DC-DC converter uses a two-stage power conversion
topology. The first, or regulation, stage is a buck-converter that
keeps the output voltage constant over variations in line, load,
and temperature. The second, or isolation, stage uses transform-
ers to provide the functions of input/output isolation and voltage
transformation to achieve the output voltage required.
Both the regulation and the isolation stages switch at a fixed
frequency for predictable EMI performance. The isolation stage
switches at one half the frequency of the regulation stage, but due
to the push-pull nature of this stage it creates a ripple at double its
switching frequency. As a result, both the input and the output of
the converter have a fundamental ripple frequency of about 550
kHz in the free-running mode.
Rectification of the isolation stage’s output is accomplished with
synchronous rectifiers. These devices, which are MOSFETs with a
very low resistance, dissipate far less energy than would Schottky
diodes. This is the primary reason why the MQFL converters have
such high efficiency, particularly at low output voltages.
Besides improving efficiency, the synchronous rectifiers permit
operation down to zero load current. There is no longer a need
for a minimum load, as is typical for converters that use diodes for
rectification. The synchronous rectifiers actually permit a nega-
tive load current to flow back into the converter’s output terminals
if the load is a source of short or long term energy. The MQFL
converters employ a “back-drive current limit” to keep this nega-
tive output terminal current small.
There is a control circuit on both the input and output sides of the
MQFL converter that determines the conduction state of the power
switches. These circuits communicate with each other across the
isolation barrier through a magnetically coupled device. No
opto-isolators are used. A separate bias supply provides power
to both the input and output control circuits.
An input under-voltage lockout feature with hysteresis is provided,
as well as an input over-voltage shutdown. There is also an
output current limit that is nearly constant as the load impedance
decreases to a short circuit (i.e., there is no fold-back or fold-
forward characteristic to the output current under this condition).
When a load fault is removed, the output voltage rises exponen-
tially to its nominal value without an overshoot.
The MQFL converter’s control circuit does not implement an output
over-voltage limit or an over-temperature shutdown.
The following sections describe the use and operation of addi-
tional control features provided by the MQFL converter.
CONTROL FEATURES
ENABLE: The MQFL converter has two enable pins. Both must
have a logic high level for the converter to be enabled. A logic
low on either pin will inhibit the converter.
The ENA1 pin (pin 4) is referenced with respect to the converter’s
input return (pin 2). The ENA2 pin (pin 12) is referenced with
respect to the converter’s output return (pin 8). This permits the
converter to be inhibited from either the input or the output side.
Regardless of which pin is used to inhibit the converter, the regu-
lation and the isolation stages are turned off. However, when
the converter is inhibited through the ENA1 pin, the bias supply
is also turned off, whereas this supply remains on when the con-
verter is inhibited through the ENA2 pin. A higher input standby
current therefore results in the latter case.
Both enable pins are internally pulled high so that an open connec-
tion on both pins will enable the converter. Figure A shows the equiv-
alent circuit looking into either enable pins. It is TTL compatible.
SHUT DOWN: The MQFL converter will shut down in response
to following conditions:
- ENA1 input low
- ENA2 input low
- VIN input below under-voltage lockout threshold
- VIN input above over-voltage shutdown threshold
- Persistent current limit event lasting more than 1 second
Following a shutdown from a disable event or an input voltage
fault, there is a startup inhibit delay which will prevent the con-
verter from restarting for approximately 300ms. After the 300ms
delay elapses, if the enable inputs are high and the input voltage
is within the operating range, the converter will restart. If the VIN
input is brought down to nearly 0V and back into the operating
range, there is no startup inhibit, and the output voltage will rise
according to the “Turn-On Delay, Rising Vin” specification.
Refer to the following Current Limit section for details regarding
persistent current limit behavior.
REMOTE SENSE: The purpose of the remote sense pins is to
correct for the voltage drop along the conductors that connect the
converter’s output to the load. To achieve this goal, a separate
conductor should be used to connect the +SENSE pin (pin 10)
directly to the positive terminal of the load, as shown in the con-
nection diagram. Similarly, the –SENSE pin (pin 9) should be
connected through a separate conductor to the return terminal of
the load.
NOTE: Even if remote sensing of the load voltage is not desired,
the +SENSE and the -SENSE pins must be connected to +Vout (pin
7) and OUTPUT RETURN (pin 8), respectively, to get proper regu-
lation of the converter’s output. If they are left open, the converter
will have an output voltage that is approximately 200mV higher
than its specified value. If only the +SENSE pin is left open, the
output voltage will be approximately 25mV too high.
Inside the converter, +SENSE is connected to +Vout with a 100W
resistor and –SENSE is connected to OUTPUT RETURN with a
10W resistor.
It is also important to note that when remote sense is used, the
voltage across the converter’s output terminals (pins 7 and 8)
will be higher than the converter’s nominal output voltage due to
resistive drops along the connecting wires. This higher voltage at
the terminals produces a greater voltage stress on the converter’s
internal components and may cause the converter to fail to deliver
the desired output voltage at the low end of the input voltage
range at the higher end of the load current and temperature
range. Please consult the factory for details.
SYNCHRONIZATION: The MQFL converter’s switching fre-
quency can be synchronized to an external frequency source
that is in the 500 kHz to 700 kHz range. A pulse train at the
desired frequency should be applied to the SYNC IN pin (pin 6)
with respect to the INPUT RETURN (pin 2). This pulse train should
have a duty cycle in the 20% to 80% range. Its low value should
be below 0.8V to be guaranteed to be interpreted as a logic low,
and its high value should be above 2.0V to be guaranteed to be
interpreted as a logic high. The transition time between the two
states should be less than 300ns.
If the MQFL converter is not to be synchronized, the SYNC IN pin
should be left open circuit. The converter will then operate in its
free-running mode at a frequency of approximately 550 kHz.
If, due to a fault, the SYNC IN pin is held in either a logic low or
logic high state continuously, the MQFL converter will revert to its
free-running frequency.
The MQFL converter also has a SYNC OUT pin (pin 5). This
output can be used to drive the SYNC IN pins of as many as ten
(10) other MQFL converters. The pulse train coming out of SYNC
OUT has a duty cycle of 50% and a frequency that matches the
switching frequency of the converter with which it is associated.
This frequency is either the free-running frequency if there is no
synchronization signal at the SYNC IN pin, or the synchroniza-
tion frequency if there is.
The SYNC OUT signal is available only when the DC input volt-
age is above approximately 125V and when the converter is not
inhibited through the ENA1 pin. An inhibit through the ENA2 pin
will not turn the SYNC OUT signal off.
NOTE: An MQFL converter that has its SYNC IN pin driven by
the SYNC OUT pin of a second MQFL converter will have its start
of its switching cycle delayed approximately 180 degrees relative
to that of the second converter.
Figure B shows the equivalent circuit looking into the SYNC IN
pin. Figure C shows the equivalent circuit looking into the SYNC
OUT pin.
CURRENT SHARE: When several MQFL converters are placed
in parallel to achieve either a higher total load power or N+1
redundancy, their SHARE pins (pin 11) should be connected
together. The voltage on this common SHARE node represents
the average current delivered by all of the paralleled converters.
Each converter monitors this average value and adjusts itself so
that its output current closely matches that of the average.
Since the SHARE pin is monitored with respect to the OUTPUT
RETURN (pin 8) by each converter, it is important to connect all of
the converters’ OUTPUT RETURN pins together through a low DC
and AC impedance. When this is done correctly, the converters
will deliver their appropriate fraction of the total load current to
within +/- 10% at full rated load.
Whether or not converters are paralleled, the voltage at the
SHARE pin could be used to monitor the approximate average
current delivered by the converter(s). A nominal voltage of 1.0V
represents zero current and a nominal voltage of 2.2V represents
the maximum rated total current, with a linear relationship in
between. The internal source resistance of a converter’s SHARE
pin signal is 2.5 kW.
During an input voltage fault or primary disable event, the SHARE
pin outputs a power failure warning pulse. The SHARE pin will
go to 3V for approximately 14ms as the output voltage falls.
During a current limit auto-restart event, the SHARE pin outputs a
startup synchronization pulse. The SHARE pin will go to 5V for
approximately 2ms before the converter restarts.
NOTE: Converters operating from separate input filters with
reverse polarity protection (such as the MQME-270-R filter) with
their outputs connected in parallel may exhibit auto-restart opera-
tion at light loads. Consult factory for details.
OUTPUT VOLTAGE TRIM: If desired, it is possible to increase
the MQFL converter’s output voltage above its nominal value. To
do this, use the +SENSE pin (pin 10) for this trim function instead
of for its normal remote sense function, as shown in Figure D.
In this case, a resistor connects the +SENSE pin to the –SENSE
pin (which should still be connected to the output return, either
remotely or locally). The value of the trim resistor should be cho-
sen according to the following equation or from Figure E:
Rtrim = 100 x Vnom
[Vout – Vnom – 0.025 ]
where:
Vnom = the converter’s nominal output voltage,
Vout = the desired output voltage (greater than Vnom), and
Rtrim is in Ohms.
As the output voltage is trimmed up, it produces a greater voltage
stress on the converter’s internal components and may cause the
converter to fail to deliver the desired output voltage at the low
end of the input voltage range at the higher end of the load cur-
rent and temperature range. Please consult the factory for details.
Factory trimmed converters are available by request.
INPUT UNDER-VOLTAGE LOCKOUT: The MQFL converter
has an under-voltage lockout feature that ensures the converter
will be off if the input voltage is too low. The threshold of input
voltage at which the converter will turn on is higher that the thresh-
old at which it will turn off. In addition, the MQFL converter will
not respond to a state of the input voltage unless it has remained
in that state for more than about 200
µ
s. This hysteresis and the
delay ensure proper operation when the source impedance is
high or in a noisy environment.
INPUT OVER-VOLTAGE SHUTDOWN: The MQFL converter
also has an over-voltage feature that ensures the converter will be
off if the input voltage is too high. It also has a hysteresis and
time delay to ensure proper operation.
CURRENT LIMIT: The converter will reduce its output voltage
in response to an overload condition, as shown in Figure 6. If
the output voltage drops to below approximately 50% of the
nominal setpoint for longer than 1 second, the auto-restart feature
will engage. The auto-restart feature will stop the converter from
delivering load current, in order to protect the converter and the
load from thermal damage. After four seconds have elapsed, the
converter will automatically restart.
In a system with multiple converters configured for load sharing
using the SHARE pin, if the auto-restart feature engages, the con-
verters will synchronize their restart using signals communicated
on the SHARE pin.
BACK-DRIVE CURRENT LIMIT: Converters that use MOSFETs as
synchronous rectifiers are capable of drawing a negative current
from the load if the load is a source of short- or long-term energy.
This negative current is referred to as a “back-drive current”.
Conditions where back-drive current might occur include paral-
leled converters that do not employ current sharing, or where the
current share feature does not adequately ensure sharing during
the startup or shutdown transitions. It can also occur when con-
verters having different output voltages are connected together
through either explicit or parasitic diodes that, while normally
off, become conductive during startup or shutdown. Finally, some
loads, such as motors, can return energy to their power rail. Even
a load capacitor is a source of back-drive energy for some period
of time during a shutdown transient.
To avoid any problems that might arise due to back-drive current,
the MQFL converters limit the negative current that the converter
can draw from its output terminals. The threshold for this back-
drive current limit is placed sufficiently below zero so that the con-
verter may operate properly down to zero load, but its absolute
value (see the Electrical Characteristics page) is small compared
to the converter’s rated output current.
THERMAL CONSIDERATIONS: Figure 5 shows the suggested
Power Derating Curves for this converter as a function of the case
temperature and the maximum desired power MOSFET junction
temperature. All other components within the converter are
cooler than its hottest MOSFET, which at full power is no more
than 20ºC higher than the case temperature directly below this
MOSFET. The Mil-HDBK-1547A component derating guideline
calls for a maximum component temperature of 105ºC. Figure
5 therefore has one power derating curve that ensures this limit
is maintained. It has been SynQor’s extensive experience that
reliable long-term converter operation can be achieved with a
maximum component temperature of 125ºC. In extreme cases,
a maximum temperature of 145ºC is permissible, but not recom-
mended for long-term operation where high reliability is required.
Derating curves for these higher temperature limits are also
included in Figure 5. The maximum case temperature at which
the converter should be operated is 135ºC.
When the converter is mounted on a metal plate, the plate will
help to make the converter’s case bottom a uniform temperature.
How well it does so depends on the thickness of the plate and
on the thermal conductance of the interface layer (e.g. thermal
grease, thermal pad, etc.) between the case and the plate. Unless
this is done very well, it is important not to mistake the plate’s
temperature for the maximum case temperature. It is easy for
them to be as much as 5-10ºC different at full power and at high
temperatures. It is suggested that a thermocouple be attached
directly to the converter’s case through a small hole in the plate
when investigating how hot the converter is getting. Care must
also be made to ensure that there is not a large thermal resistance
between the thermocouple and the case due to whatever adhe-
sive might be used to hold the thermocouple in place.
INPUT SYSTEM INSTABILITY: This
condition can occur
because any DC-DC converter appears incrementally as a
negative resistance load. A detailed application note titled
“Input System Instability” is available on the SynQor website
which provides an understanding of why this instability arises,
and shows the preferred solution for correcting it.
Figure E: Output Voltage Trim Graph
Figure D: Typical connection for output voltage trimming.
270Vdc
Load
+VIN
IN RTN
CASE
ENA 1
SYNC OUT
SYNC IN
ENA 2
SHARE
+ SNS
– SNS
OUT RTN
+VOUT
1
2
3
4
5
6
12
11
10
9
8
7
open
means
on
Rtrim
+
–
+
–
Figure B: Equivalent circuit looking into the SYNC IN pin with
respect to the IN RTN (input return) pin.
PIN 2
PIN 6
5K
5V
SYNC IN
IN RTN
TO SYNC
CIRCUITRY
5K
Figure C: Equivalent circuit looking into SYNC OUT pin with
respect to the IN RTN (input return) pin.
FROM SYNC
CIRCUITRY
5K
5V
SYNC OUT
IN RTN PIN 2
PIN 5
OPEN COLLECTOR
OUTPUT
2N3904
1N4148
250K
125K
68K
5.0V
TO ENABLE
CIRCUITRY
PIN 4
(or PIN 12)
PIN 2
(or PIN 8) IN RTN
ENABLE
Figure A: Equivalent circuit looking into either the ENA1 or ENA2
pins with respect to its corresponding return pin.
BASIC OPERATION AND FEATURES
The MQFL DC-DC converter uses a two-stage power conversion
topology. The first, or regulation, stage is a buck-converter that
keeps the output voltage constant over variations in line, load,
and temperature. The second, or isolation, stage uses transform-
ers to provide the functions of input/output isolation and voltage
transformation to achieve the output voltage required.
Both the regulation and the isolation stages switch at a fixed
frequency for predictable EMI performance. The isolation stage
switches at one half the frequency of the regulation stage, but due
to the push-pull nature of this stage it creates a ripple at double its
switching frequency. As a result, both the input and the output of
the converter have a fundamental ripple frequency of about 550
kHz in the free-running mode.
Rectification of the isolation stage’s output is accomplished with
synchronous rectifiers. These devices, which are MOSFETs with a
very low resistance, dissipate far less energy than would Schottky
diodes. This is the primary reason why the MQFL converters have
such high efficiency, particularly at low output voltages.
Besides improving efficiency, the synchronous rectifiers permit
operation down to zero load current. There is no longer a need
for a minimum load, as is typical for converters that use diodes for
rectification. The synchronous rectifiers actually permit a nega-
tive load current to flow back into the converter’s output terminals
if the load is a source of short or long term energy. The MQFL
converters employ a “back-drive current limit” to keep this nega-
tive output terminal current small.
There is a control circuit on both the input and output sides of the
MQFL converter that determines the conduction state of the power
switches. These circuits communicate with each other across the
isolation barrier through a magnetically coupled device. No
opto-isolators are used. A separate bias supply provides power
to both the input and output control circuits.
An input under-voltage lockout feature with hysteresis is provided,
as well as an input over-voltage shutdown. There is also an
output current limit that is nearly constant as the load impedance
decreases to a short circuit (i.e., there is no fold-back or fold-
forward characteristic to the output current under this condition).
When a load fault is removed, the output voltage rises exponen-
tially to its nominal value without an overshoot.
The MQFL converter’s control circuit does not implement an output
over-voltage limit or an over-temperature shutdown.
The following sections describe the use and operation of addi-
tional control features provided by the MQFL converter.
CONTROL FEATURES
ENABLE: The MQFL converter has two enable pins. Both must
have a logic high level for the converter to be enabled. A logic
low on either pin will inhibit the converter.
The ENA1 pin (pin 4) is referenced with respect to the converter’s
input return (pin 2). The ENA2 pin (pin 12) is referenced with
respect to the converter’s output return (pin 8). This permits the
converter to be inhibited from either the input or the output side.
Regardless of which pin is used to inhibit the converter, the regu-
lation and the isolation stages are turned off. However, when
the converter is inhibited through the ENA1 pin, the bias supply
is also turned off, whereas this supply remains on when the con-
verter is inhibited through the ENA2 pin. A higher input standby
current therefore results in the latter case.
Both enable pins are internally pulled high so that an open connec-
tion on both pins will enable the converter. Figure A shows the equiv-
alent circuit looking into either enable pins. It is TTL compatible.
SHUT DOWN: The MQFL converter will shut down in response
to following conditions:
- ENA1 input low
- ENA2 input low
- VIN input below under-voltage lockout threshold
- VIN input above over-voltage shutdown threshold
- Persistent current limit event lasting more than 1 second
Following a shutdown from a disable event or an input voltage
fault, there is a startup inhibit delay which will prevent the con-
verter from restarting for approximately 300ms. After the 300ms
delay elapses, if the enable inputs are high and the input voltage
is within the operating range, the converter will restart. If the VIN
input is brought down to nearly 0V and back into the operating
range, there is no startup inhibit, and the output voltage will rise
according to the “Turn-On Delay, Rising Vin” specification.
Refer to the following Current Limit section for details regarding
persistent current limit behavior.
REMOTE SENSE: The purpose of the remote sense pins is to
correct for the voltage drop along the conductors that connect the
converter’s output to the load. To achieve this goal, a separate
conductor should be used to connect the +SENSE pin (pin 10)
directly to the positive terminal of the load, as shown in the con-
nection diagram. Similarly, the –SENSE pin (pin 9) should be
connected through a separate conductor to the return terminal of
the load.
NOTE: Even if remote sensing of the load voltage is not desired,
the +SENSE and the -SENSE pins must be connected to +Vout (pin
7) and OUTPUT RETURN (pin 8), respectively, to get proper regu-
lation of the converter’s output. If they are left open, the converter
will have an output voltage that is approximately 200mV higher
than its specified value. If only the +SENSE pin is left open, the
output voltage will be approximately 25mV too high.
Inside the converter, +SENSE is connected to +Vout with a 100W
resistor and –SENSE is connected to OUTPUT RETURN with a
10W resistor.
It is also important to note that when remote sense is used, the
voltage across the converter’s output terminals (pins 7 and 8)
will be higher than the converter’s nominal output voltage due to
resistive drops along the connecting wires. This higher voltage at
the terminals produces a greater voltage stress on the converter’s
internal components and may cause the converter to fail to deliver
the desired output voltage at the low end of the input voltage
range at the higher end of the load current and temperature
range. Please consult the factory for details.
SYNCHRONIZATION: The MQFL converter’s switching fre-
quency can be synchronized to an external frequency source
that is in the 500 kHz to 700 kHz range. A pulse train at the
desired frequency should be applied to the SYNC IN pin (pin 6)
with respect to the INPUT RETURN (pin 2). This pulse train should
have a duty cycle in the 20% to 80% range. Its low value should
be below 0.8V to be guaranteed to be interpreted as a logic low,
and its high value should be above 2.0V to be guaranteed to be
interpreted as a logic high. The transition time between the two
states should be less than 300ns.
If the MQFL converter is not to be synchronized, the SYNC IN pin
should be left open circuit. The converter will then operate in its
free-running mode at a frequency of approximately 550 kHz.
If, due to a fault, the SYNC IN pin is held in either a logic low or
logic high state continuously, the MQFL converter will revert to its
free-running frequency.
The MQFL converter also has a SYNC OUT pin (pin 5). This
output can be used to drive the SYNC IN pins of as many as ten
(10) other MQFL converters. The pulse train coming out of SYNC
OUT has a duty cycle of 50% and a frequency that matches the
switching frequency of the converter with which it is associated.
This frequency is either the free-running frequency if there is no
synchronization signal at the SYNC IN pin, or the synchroniza-
tion frequency if there is.
The SYNC OUT signal is available only when the DC input volt-
age is above approximately 125V and when the converter is not
inhibited through the ENA1 pin. An inhibit through the ENA2 pin
will not turn the SYNC OUT signal off.
NOTE: An MQFL converter that has its SYNC IN pin driven by
the SYNC OUT pin of a second MQFL converter will have its start
of its switching cycle delayed approximately 180 degrees relative
to that of the second converter.
Figure B shows the equivalent circuit looking into the SYNC IN
pin. Figure C shows the equivalent circuit looking into the SYNC
OUT pin.
CURRENT SHARE: When several MQFL converters are placed
in parallel to achieve either a higher total load power or N+1
redundancy, their SHARE pins (pin 11) should be connected
together. The voltage on this common SHARE node represents
the average current delivered by all of the paralleled converters.
Each converter monitors this average value and adjusts itself so
that its output current closely matches that of the average.
Since the SHARE pin is monitored with respect to the OUTPUT
RETURN (pin 8) by each converter, it is important to connect all of
the converters’ OUTPUT RETURN pins together through a low DC
and AC impedance. When this is done correctly, the converters
will deliver their appropriate fraction of the total load current to
within +/- 10% at full rated load.
Whether or not converters are paralleled, the voltage at the
SHARE pin could be used to monitor the approximate average
current delivered by the converter(s). A nominal voltage of 1.0V
represents zero current and a nominal voltage of 2.2V represents
the maximum rated total current, with a linear relationship in
between. The internal source resistance of a converter’s SHARE
pin signal is 2.5 kW.
During an input voltage fault or primary disable event, the SHARE
pin outputs a power failure warning pulse. The SHARE pin will
go to 3V for approximately 14ms as the output voltage falls.
During a current limit auto-restart event, the SHARE pin outputs a
startup synchronization pulse. The SHARE pin will go to 5V for
approximately 2ms before the converter restarts.
NOTE: Converters operating from separate input filters with
reverse polarity protection (such as the MQME-270-R filter) with
their outputs connected in parallel may exhibit auto-restart opera-
tion at light loads. Consult factory for details.
OUTPUT VOLTAGE TRIM: If desired, it is possible to increase
the MQFL converter’s output voltage above its nominal value. To
do this, use the +SENSE pin (pin 10) for this trim function instead
of for its normal remote sense function, as shown in Figure D.
In this case, a resistor connects the +SENSE pin to the –SENSE
pin (which should still be connected to the output return, either
remotely or locally). The value of the trim resistor should be cho-
sen according to the following equation or from Figure E:
Rtrim = 100 x Vnom
[Vout – Vnom – 0.025 ]
where:
Vnom = the converter’s nominal output voltage,
Vout = the desired output voltage (greater than Vnom), and
Rtrim is in Ohms.
As the output voltage is trimmed up, it produces a greater voltage
stress on the converter’s internal components and may cause the
converter to fail to deliver the desired output voltage at the low
end of the input voltage range at the higher end of the load cur-
rent and temperature range. Please consult the factory for details.
Factory trimmed converters are available by request.
INPUT UNDER-VOLTAGE LOCKOUT: The MQFL converter
has an under-voltage lockout feature that ensures the converter
will be off if the input voltage is too low. The threshold of input
voltage at which the converter will turn on is higher that the thresh-
old at which it will turn off. In addition, the MQFL converter will
not respond to a state of the input voltage unless it has remained
in that state for more than about 200
µ
s. This hysteresis and the
delay ensure proper operation when the source impedance is
high or in a noisy environment.
INPUT OVER-VOLTAGE SHUTDOWN: The MQFL converter
also has an over-voltage feature that ensures the converter will be
off if the input voltage is too high. It also has a hysteresis and
time delay to ensure proper operation.
CURRENT LIMIT: The converter will reduce its output voltage
in response to an overload condition, as shown in Figure 6. If
the output voltage drops to below approximately 50% of the
nominal setpoint for longer than 1 second, the auto-restart feature
will engage. The auto-restart feature will stop the converter from
delivering load current, in order to protect the converter and the
load from thermal damage. After four seconds have elapsed, the
converter will automatically restart.
In a system with multiple converters configured for load sharing
using the SHARE pin, if the auto-restart feature engages, the con-
verters will synchronize their restart using signals communicated
on the SHARE pin.
BACK-DRIVE CURRENT LIMIT: Converters that use MOSFETs as
synchronous rectifiers are capable of drawing a negative current
from the load if the load is a source of short- or long-term energy.
This negative current is referred to as a “back-drive current”.
Conditions where back-drive current might occur include paral-
leled converters that do not employ current sharing, or where the
current share feature does not adequately ensure sharing during
the startup or shutdown transitions. It can also occur when con-
verters having different output voltages are connected together
through either explicit or parasitic diodes that, while normally
off, become conductive during startup or shutdown. Finally, some
loads, such as motors, can return energy to their power rail. Even
a load capacitor is a source of back-drive energy for some period
of time during a shutdown transient.
To avoid any problems that might arise due to back-drive current,
the MQFL converters limit the negative current that the converter
can draw from its output terminals. The threshold for this back-
drive current limit is placed sufficiently below zero so that the con-
verter may operate properly down to zero load, but its absolute
value (see the Electrical Characteristics page) is small compared
to the converter’s rated output current.
THERMAL CONSIDERATIONS: Figure 5 shows the suggested
Power Derating Curves for this converter as a function of the case
temperature and the maximum desired power MOSFET junction
temperature. All other components within the converter are
cooler than its hottest MOSFET, which at full power is no more
than 20ºC higher than the case temperature directly below this
MOSFET. The Mil-HDBK-1547A component derating guideline
calls for a maximum component temperature of 105ºC. Figure
5 therefore has one power derating curve that ensures this limit
is maintained. It has been SynQor’s extensive experience that
reliable long-term converter operation can be achieved with a
maximum component temperature of 125ºC. In extreme cases,
a maximum temperature of 145ºC is permissible, but not recom-
mended for long-term operation where high reliability is required.
Derating curves for these higher temperature limits are also
included in Figure 5. The maximum case temperature at which
the converter should be operated is 135ºC.
When the converter is mounted on a metal plate, the plate will
help to make the converter’s case bottom a uniform temperature.
How well it does so depends on the thickness of the plate and
on the thermal conductance of the interface layer (e.g. thermal
grease, thermal pad, etc.) between the case and the plate. Unless
this is done very well, it is important not to mistake the plate’s
temperature for the maximum case temperature. It is easy for
them to be as much as 5-10ºC different at full power and at high
temperatures. It is suggested that a thermocouple be attached
directly to the converter’s case through a small hole in the plate
when investigating how hot the converter is getting. Care must
also be made to ensure that there is not a large thermal resistance
between the thermocouple and the case due to whatever adhe-
sive might be used to hold the thermocouple in place.
INPUT SYSTEM INSTABILITY: This
condition can occur
because any DC-DC converter appears incrementally as a
negative resistance load. A detailed application note titled
“Input System Instability” is available on the SynQor website
which provides an understanding of why this instability arises,
and shows the preferred solution for correcting it.
Figure E: Output Voltage Trim Graph
Figure D: Typical connection for output voltage trimming.
270Vdc
Load
+VIN
IN RTN
CASE
ENA 1
SYNC OUT
SYNC IN
ENA 2
SHARE
+ SNS
– SNS
OUT RTN
+VOUT
1
2
3
4
5
6
12
11
10
9
8
7
open
means
on
Rtrim
+
–
+
–
Figure B: Equivalent circuit looking into the SYNC IN pin with
respect to the IN RTN (input return) pin.
PIN 2
PIN 6
5K
5V
SYNC IN
IN RTN
TO SYNC
CIRCUITRY
5K
Figure C: Equivalent circuit looking into SYNC OUT pin with
respect to the IN RTN (input return) pin.
FROM SYNC
CIRCUITRY
5K
5V
SYNC OUT
IN RTN PIN 2
PIN 5
OPEN COLLECTOR
OUTPUT
2N3904
1N4148
250K
125K
68K
5.0V
TO ENABLE
CIRCUITRY
PIN 4
(or PIN 12)
PIN 2
(or PIN 8) IN RTN
ENABLE
Figure A: Equivalent circuit looking into either the ENA1 or ENA2
pins with respect to its corresponding return pin.
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 10
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
BASIC OPERATION AND FEATURES
The MQFL DC-DC converter uses a two-stage power conversion
topology. The first, or regulation, stage is a buck-converter that
keeps the output voltage constant over variations in line, load,
and temperature. The second, or isolation, stage uses transform-
ers to provide the functions of input/output isolation and voltage
transformation to achieve the output voltage required.
Both the regulation and the isolation stages switch at a fixed
frequency for predictable EMI performance. The isolation stage
switches at one half the frequency of the regulation stage, but due
to the push-pull nature of this stage it creates a ripple at double its
switching frequency. As a result, both the input and the output of
the converter have a fundamental ripple frequency of about 550
kHz in the free-running mode.
Rectification of the isolation stage’s output is accomplished with
synchronous rectifiers. These devices, which are MOSFETs with a
very low resistance, dissipate far less energy than would Schottky
diodes. This is the primary reason why the MQFL converters have
such high efficiency, particularly at low output voltages.
Besides improving efficiency, the synchronous rectifiers permit
operation down to zero load current. There is no longer a need
for a minimum load, as is typical for converters that use diodes for
rectification. The synchronous rectifiers actually permit a nega-
tive load current to flow back into the converter’s output terminals
if the load is a source of short or long term energy. The MQFL
converters employ a “back-drive current limit” to keep this nega-
tive output terminal current small.
There is a control circuit on both the input and output sides of the
MQFL converter that determines the conduction state of the power
switches. These circuits communicate with each other across the
isolation barrier through a magnetically coupled device. No
opto-isolators are used. A separate bias supply provides power
to both the input and output control circuits.
An input under-voltage lockout feature with hysteresis is provided,
as well as an input over-voltage shutdown. There is also an
output current limit that is nearly constant as the load impedance
decreases to a short circuit (i.e., there is no fold-back or fold-
forward characteristic to the output current under this condition).
When a load fault is removed, the output voltage rises exponen-
tially to its nominal value without an overshoot.
The MQFL converter’s control circuit does not implement an output
over-voltage limit or an over-temperature shutdown.
The following sections describe the use and operation of addi-
tional control features provided by the MQFL converter.
CONTROL FEATURES
ENABLE: The MQFL converter has two enable pins. Both must
have a logic high level for the converter to be enabled. A logic
low on either pin will inhibit the converter.
The ENA1 pin (pin 4) is referenced with respect to the converter’s
input return (pin 2). The ENA2 pin (pin 12) is referenced with
respect to the converter’s output return (pin 8). This permits the
converter to be inhibited from either the input or the output side.
Regardless of which pin is used to inhibit the converter, the regu-
lation and the isolation stages are turned off. However, when
the converter is inhibited through the ENA1 pin, the bias supply
is also turned off, whereas this supply remains on when the con-
verter is inhibited through the ENA2 pin. A higher input standby
current therefore results in the latter case.
Both enable pins are internally pulled high so that an open connec-
tion on both pins will enable the converter. Figure A shows the equiv-
alent circuit looking into either enable pins. It is TTL compatible.
SHUT DOWN: The MQFL converter will shut down in response
to following conditions:
- ENA1 input low
- ENA2 input low
- VIN input below under-voltage lockout threshold
- VIN input above over-voltage shutdown threshold
- Persistent current limit event lasting more than 1 second
Following a shutdown from a disable event or an input voltage
fault, there is a startup inhibit delay which will prevent the con-
verter from restarting for approximately 300ms. After the 300ms
delay elapses, if the enable inputs are high and the input voltage
is within the operating range, the converter will restart. If the VIN
input is brought down to nearly 0V and back into the operating
range, there is no startup inhibit, and the output voltage will rise
according to the “Turn-On Delay, Rising Vin” specification.
Refer to the following Current Limit section for details regarding
persistent current limit behavior.
REMOTE SENSE: The purpose of the remote sense pins is to
correct for the voltage drop along the conductors that connect the
converter’s output to the load. To achieve this goal, a separate
conductor should be used to connect the +SENSE pin (pin 10)
directly to the positive terminal of the load, as shown in the con-
nection diagram. Similarly, the –SENSE pin (pin 9) should be
connected through a separate conductor to the return terminal of
the load.
NOTE: Even if remote sensing of the load voltage is not desired,
the +SENSE and the -SENSE pins must be connected to +Vout (pin
7) and OUTPUT RETURN (pin 8), respectively, to get proper regu-
lation of the converter’s output. If they are left open, the converter
will have an output voltage that is approximately 200mV higher
than its specified value. If only the +SENSE pin is left open, the
output voltage will be approximately 25mV too high.
Inside the converter, +SENSE is connected to +Vout with a 100W
resistor and –SENSE is connected to OUTPUT RETURN with a
10W resistor.
It is also important to note that when remote sense is used, the
voltage across the converter’s output terminals (pins 7 and 8)
will be higher than the converter’s nominal output voltage due to
resistive drops along the connecting wires. This higher voltage at
the terminals produces a greater voltage stress on the converter’s
internal components and may cause the converter to fail to deliver
the desired output voltage at the low end of the input voltage
range at the higher end of the load current and temperature
range. Please consult the factory for details.
SYNCHRONIZATION: The MQFL converter’s switching fre-
quency can be synchronized to an external frequency source
that is in the 500 kHz to 700 kHz range. A pulse train at the
desired frequency should be applied to the SYNC IN pin (pin 6)
with respect to the INPUT RETURN (pin 2). This pulse train should
have a duty cycle in the 20% to 80% range. Its low value should
be below 0.8V to be guaranteed to be interpreted as a logic low,
and its high value should be above 2.0V to be guaranteed to be
interpreted as a logic high. The transition time between the two
states should be less than 300ns.
If the MQFL converter is not to be synchronized, the SYNC IN pin
should be left open circuit. The converter will then operate in its
free-running mode at a frequency of approximately 550 kHz.
If, due to a fault, the SYNC IN pin is held in either a logic low or
logic high state continuously, the MQFL converter will revert to its
free-running frequency.
The MQFL converter also has a SYNC OUT pin (pin 5). This
output can be used to drive the SYNC IN pins of as many as ten
(10) other MQFL converters. The pulse train coming out of SYNC
OUT has a duty cycle of 50% and a frequency that matches the
switching frequency of the converter with which it is associated.
This frequency is either the free-running frequency if there is no
synchronization signal at the SYNC IN pin, or the synchroniza-
tion frequency if there is.
The SYNC OUT signal is available only when the DC input volt-
age is above approximately 125V and when the converter is not
inhibited through the ENA1 pin. An inhibit through the ENA2 pin
will not turn the SYNC OUT signal off.
NOTE: An MQFL converter that has its SYNC IN pin driven by
the SYNC OUT pin of a second MQFL converter will have its start
of its switching cycle delayed approximately 180 degrees relative
to that of the second converter.
Figure B shows the equivalent circuit looking into the SYNC IN
pin. Figure C shows the equivalent circuit looking into the SYNC
OUT pin.
CURRENT SHARE: When several MQFL converters are placed
in parallel to achieve either a higher total load power or N+1
redundancy, their SHARE pins (pin 11) should be connected
together. The voltage on this common SHARE node represents
the average current delivered by all of the paralleled converters.
Each converter monitors this average value and adjusts itself so
that its output current closely matches that of the average.
Since the SHARE pin is monitored with respect to the OUTPUT
RETURN (pin 8) by each converter, it is important to connect all of
the converters’ OUTPUT RETURN pins together through a low DC
and AC impedance. When this is done correctly, the converters
will deliver their appropriate fraction of the total load current to
within +/- 10% at full rated load.
Whether or not converters are paralleled, the voltage at the
SHARE pin could be used to monitor the approximate average
current delivered by the converter(s). A nominal voltage of 1.0V
represents zero current and a nominal voltage of 2.2V represents
the maximum rated total current, with a linear relationship in
between. The internal source resistance of a converter’s SHARE
pin signal is 2.5 kW.
During an input voltage fault or primary disable event, the SHARE
pin outputs a power failure warning pulse. The SHARE pin will
go to 3V for approximately 14ms as the output voltage falls.
During a current limit auto-restart event, the SHARE pin outputs a
startup synchronization pulse. The SHARE pin will go to 5V for
approximately 2ms before the converter restarts.
NOTE: Converters operating from separate input filters with
reverse polarity protection (such as the MQME-270-R filter) with
their outputs connected in parallel may exhibit auto-restart opera-
tion at light loads. Consult factory for details.
OUTPUT VOLTAGE TRIM: If desired, it is possible to increase
the MQFL converter’s output voltage above its nominal value. To
do this, use the +SENSE pin (pin 10) for this trim function instead
of for its normal remote sense function, as shown in Figure D.
In this case, a resistor connects the +SENSE pin to the –SENSE
pin (which should still be connected to the output return, either
remotely or locally). The value of the trim resistor should be cho-
sen according to the following equation or from Figure E:
Rtrim = 100 x Vnom
[Vout – Vnom – 0.025 ]
where:
Vnom = the converter’s nominal output voltage,
Vout = the desired output voltage (greater than Vnom), and
Rtrim is in Ohms.
As the output voltage is trimmed up, it produces a greater voltage
stress on the converter’s internal components and may cause the
converter to fail to deliver the desired output voltage at the low
end of the input voltage range at the higher end of the load cur-
rent and temperature range. Please consult the factory for details.
Factory trimmed converters are available by request.
INPUT UNDER-VOLTAGE LOCKOUT: The MQFL converter
has an under-voltage lockout feature that ensures the converter
will be off if the input voltage is too low. The threshold of input
voltage at which the converter will turn on is higher that the thresh-
old at which it will turn off. In addition, the MQFL converter will
not respond to a state of the input voltage unless it has remained
in that state for more than about 200
µ
s. This hysteresis and the
delay ensure proper operation when the source impedance is
high or in a noisy environment.
INPUT OVER-VOLTAGE SHUTDOWN: The MQFL converter
also has an over-voltage feature that ensures the converter will be
off if the input voltage is too high. It also has a hysteresis and
time delay to ensure proper operation.
CURRENT LIMIT: The converter will reduce its output voltage
in response to an overload condition, as shown in Figure 6. If
the output voltage drops to below approximately 50% of the
nominal setpoint for longer than 1 second, the auto-restart feature
will engage. The auto-restart feature will stop the converter from
delivering load current, in order to protect the converter and the
load from thermal damage. After four seconds have elapsed, the
converter will automatically restart.
In a system with multiple converters configured for load sharing
using the SHARE pin, if the auto-restart feature engages, the con-
verters will synchronize their restart using signals communicated
on the SHARE pin.
BACK-DRIVE CURRENT LIMIT: Converters that use MOSFETs as
synchronous rectifiers are capable of drawing a negative current
from the load if the load is a source of short- or long-term energy.
This negative current is referred to as a “back-drive current”.
Conditions where back-drive current might occur include paral-
leled converters that do not employ current sharing, or where the
current share feature does not adequately ensure sharing during
the startup or shutdown transitions. It can also occur when con-
verters having different output voltages are connected together
through either explicit or parasitic diodes that, while normally
off, become conductive during startup or shutdown. Finally, some
loads, such as motors, can return energy to their power rail. Even
a load capacitor is a source of back-drive energy for some period
of time during a shutdown transient.
To avoid any problems that might arise due to back-drive current,
the MQFL converters limit the negative current that the converter
can draw from its output terminals. The threshold for this back-
drive current limit is placed sufficiently below zero so that the con-
verter may operate properly down to zero load, but its absolute
value (see the Electrical Characteristics page) is small compared
to the converter’s rated output current.
THERMAL CONSIDERATIONS: Figure 5 shows the suggested
Power Derating Curves for this converter as a function of the case
temperature and the maximum desired power MOSFET junction
temperature. All other components within the converter are
cooler than its hottest MOSFET, which at full power is no more
than 20ºC higher than the case temperature directly below this
MOSFET. The Mil-HDBK-1547A component derating guideline
calls for a maximum component temperature of 105ºC. Figure
5 therefore has one power derating curve that ensures this limit
is maintained. It has been SynQor’s extensive experience that
reliable long-term converter operation can be achieved with a
maximum component temperature of 125ºC. In extreme cases,
a maximum temperature of 145ºC is permissible, but not recom-
mended for long-term operation where high reliability is required.
Derating curves for these higher temperature limits are also
included in Figure 5. The maximum case temperature at which
the converter should be operated is 135ºC.
When the converter is mounted on a metal plate, the plate will
help to make the converter’s case bottom a uniform temperature.
How well it does so depends on the thickness of the plate and
on the thermal conductance of the interface layer (e.g. thermal
grease, thermal pad, etc.) between the case and the plate. Unless
this is done very well, it is important not to mistake the plate’s
temperature for the maximum case temperature. It is easy for
them to be as much as 5-10ºC different at full power and at high
temperatures. It is suggested that a thermocouple be attached
directly to the converter’s case through a small hole in the plate
when investigating how hot the converter is getting. Care must
also be made to ensure that there is not a large thermal resistance
between the thermocouple and the case due to whatever adhe-
sive might be used to hold the thermocouple in place.
INPUT SYSTEM INSTABILITY: This
condition can occur
because any DC-DC converter appears incrementally as a
negative resistance load. A detailed application note titled
“Input System Instability” is available on the SynQor website
which provides an understanding of why this instability arises,
and shows the preferred solution for correcting it.
Figure E: Output Voltage Trim Graph
Figure D: Typical connection for output voltage trimming.
270Vdc
Load
+VIN
IN RTN
CASE
ENA 1
SYNC OUT
SYNC IN
ENA 2
SHARE
+ SNS
– SNS
OUT RTN
+VOUT
1
2
3
4
5
6
12
11
10
9
8
7
open
means
on
Rtrim
+
–
+
–
Figure B: Equivalent circuit looking into the SYNC IN pin with
respect to the IN RTN (input return) pin.
PIN 2
PIN 6
5K
5V
SYNC IN
IN RTN
TO SYNC
CIRCUITRY
5K
Figure C: Equivalent circuit looking into SYNC OUT pin with
respect to the IN RTN (input return) pin.
FROM SYNC
CIRCUITRY
5K
5V
SYNC OUT
IN RTN PIN 2
PIN 5
OPEN COLLECTOR
OUTPUT
2N3904
1N4148
250K
125K
68K
5.0V
TO ENABLE
CIRCUITRY
PIN 4
(or PIN 12)
PIN 2
(or PIN 8) IN RTN
ENABLE
Figure A: Equivalent circuit looking into either the ENA1 or ENA2
pins with respect to its corresponding return pin.
BASIC OPERATION AND FEATURES
The MQFL DC-DC converter uses a two-stage power conversion
topology. The first, or regulation, stage is a buck-converter that
keeps the output voltage constant over variations in line, load,
and temperature. The second, or isolation, stage uses transform-
ers to provide the functions of input/output isolation and voltage
transformation to achieve the output voltage required.
Both the regulation and the isolation stages switch at a fixed
frequency for predictable EMI performance. The isolation stage
switches at one half the frequency of the regulation stage, but due
to the push-pull nature of this stage it creates a ripple at double its
switching frequency. As a result, both the input and the output of
the converter have a fundamental ripple frequency of about 550
kHz in the free-running mode.
Rectification of the isolation stage’s output is accomplished with
synchronous rectifiers. These devices, which are MOSFETs with a
very low resistance, dissipate far less energy than would Schottky
diodes. This is the primary reason why the MQFL converters have
such high efficiency, particularly at low output voltages.
Besides improving efficiency, the synchronous rectifiers permit
operation down to zero load current. There is no longer a need
for a minimum load, as is typical for converters that use diodes for
rectification. The synchronous rectifiers actually permit a nega-
tive load current to flow back into the converter’s output terminals
if the load is a source of short or long term energy. The MQFL
converters employ a “back-drive current limit” to keep this nega-
tive output terminal current small.
There is a control circuit on both the input and output sides of the
MQFL converter that determines the conduction state of the power
switches. These circuits communicate with each other across the
isolation barrier through a magnetically coupled device. No
opto-isolators are used. A separate bias supply provides power
to both the input and output control circuits.
An input under-voltage lockout feature with hysteresis is provided,
as well as an input over-voltage shutdown. There is also an
output current limit that is nearly constant as the load impedance
decreases to a short circuit (i.e., there is no fold-back or fold-
forward characteristic to the output current under this condition).
When a load fault is removed, the output voltage rises exponen-
tially to its nominal value without an overshoot.
The MQFL converter’s control circuit does not implement an output
over-voltage limit or an over-temperature shutdown.
The following sections describe the use and operation of addi-
tional control features provided by the MQFL converter.
CONTROL FEATURES
ENABLE: The MQFL converter has two enable pins. Both must
have a logic high level for the converter to be enabled. A logic
low on either pin will inhibit the converter.
The ENA1 pin (pin 4) is referenced with respect to the converter’s
input return (pin 2). The ENA2 pin (pin 12) is referenced with
respect to the converter’s output return (pin 8). This permits the
converter to be inhibited from either the input or the output side.
Regardless of which pin is used to inhibit the converter, the regu-
lation and the isolation stages are turned off. However, when
the converter is inhibited through the ENA1 pin, the bias supply
is also turned off, whereas this supply remains on when the con-
verter is inhibited through the ENA2 pin. A higher input standby
current therefore results in the latter case.
Both enable pins are internally pulled high so that an open connec-
tion on both pins will enable the converter. Figure A shows the equiv-
alent circuit looking into either enable pins. It is TTL compatible.
SHUT DOWN: The MQFL converter will shut down in response
to following conditions:
- ENA1 input low
- ENA2 input low
- VIN input below under-voltage lockout threshold
- VIN input above over-voltage shutdown threshold
- Persistent current limit event lasting more than 1 second
Following a shutdown from a disable event or an input voltage
fault, there is a startup inhibit delay which will prevent the con-
verter from restarting for approximately 300ms. After the 300ms
delay elapses, if the enable inputs are high and the input voltage
is within the operating range, the converter will restart. If the VIN
input is brought down to nearly 0V and back into the operating
range, there is no startup inhibit, and the output voltage will rise
according to the “Turn-On Delay, Rising Vin” specification.
Refer to the following Current Limit section for details regarding
persistent current limit behavior.
REMOTE SENSE: The purpose of the remote sense pins is to
correct for the voltage drop along the conductors that connect the
converter’s output to the load. To achieve this goal, a separate
conductor should be used to connect the +SENSE pin (pin 10)
directly to the positive terminal of the load, as shown in the con-
nection diagram. Similarly, the –SENSE pin (pin 9) should be
connected through a separate conductor to the return terminal of
the load.
NOTE: Even if remote sensing of the load voltage is not desired,
the +SENSE and the -SENSE pins must be connected to +Vout (pin
7) and OUTPUT RETURN (pin 8), respectively, to get proper regu-
lation of the converter’s output. If they are left open, the converter
will have an output voltage that is approximately 200mV higher
than its specified value. If only the +SENSE pin is left open, the
output voltage will be approximately 25mV too high.
Inside the converter, +SENSE is connected to +Vout with a 100W
resistor and –SENSE is connected to OUTPUT RETURN with a
10W resistor.
It is also important to note that when remote sense is used, the
voltage across the converter’s output terminals (pins 7 and 8)
will be higher than the converter’s nominal output voltage due to
resistive drops along the connecting wires. This higher voltage at
the terminals produces a greater voltage stress on the converter’s
internal components and may cause the converter to fail to deliver
the desired output voltage at the low end of the input voltage
range at the higher end of the load current and temperature
range. Please consult the factory for details.
SYNCHRONIZATION: The MQFL converter’s switching fre-
quency can be synchronized to an external frequency source
that is in the 500 kHz to 700 kHz range. A pulse train at the
desired frequency should be applied to the SYNC IN pin (pin 6)
with respect to the INPUT RETURN (pin 2). This pulse train should
have a duty cycle in the 20% to 80% range. Its low value should
be below 0.8V to be guaranteed to be interpreted as a logic low,
and its high value should be above 2.0V to be guaranteed to be
interpreted as a logic high. The transition time between the two
states should be less than 300ns.
If the MQFL converter is not to be synchronized, the SYNC IN pin
should be left open circuit. The converter will then operate in its
free-running mode at a frequency of approximately 550 kHz.
If, due to a fault, the SYNC IN pin is held in either a logic low or
logic high state continuously, the MQFL converter will revert to its
free-running frequency.
The MQFL converter also has a SYNC OUT pin (pin 5). This
output can be used to drive the SYNC IN pins of as many as ten
(10) other MQFL converters. The pulse train coming out of SYNC
OUT has a duty cycle of 50% and a frequency that matches the
switching frequency of the converter with which it is associated.
This frequency is either the free-running frequency if there is no
synchronization signal at the SYNC IN pin, or the synchroniza-
tion frequency if there is.
The SYNC OUT signal is available only when the DC input volt-
age is above approximately 125V and when the converter is not
inhibited through the ENA1 pin. An inhibit through the ENA2 pin
will not turn the SYNC OUT signal off.
NOTE: An MQFL converter that has its SYNC IN pin driven by
the SYNC OUT pin of a second MQFL converter will have its start
of its switching cycle delayed approximately 180 degrees relative
to that of the second converter.
Figure B shows the equivalent circuit looking into the SYNC IN
pin. Figure C shows the equivalent circuit looking into the SYNC
OUT pin.
CURRENT SHARE: When several MQFL converters are placed
in parallel to achieve either a higher total load power or N+1
redundancy, their SHARE pins (pin 11) should be connected
together. The voltage on this common SHARE node represents
the average current delivered by all of the paralleled converters.
Each converter monitors this average value and adjusts itself so
that its output current closely matches that of the average.
Since the SHARE pin is monitored with respect to the OUTPUT
RETURN (pin 8) by each converter, it is important to connect all of
the converters’ OUTPUT RETURN pins together through a low DC
and AC impedance. When this is done correctly, the converters
will deliver their appropriate fraction of the total load current to
within +/- 10% at full rated load.
Whether or not converters are paralleled, the voltage at the
SHARE pin could be used to monitor the approximate average
current delivered by the converter(s). A nominal voltage of 1.0V
represents zero current and a nominal voltage of 2.2V represents
the maximum rated total current, with a linear relationship in
between. The internal source resistance of a converter’s SHARE
pin signal is 2.5 kW.
During an input voltage fault or primary disable event, the SHARE
pin outputs a power failure warning pulse. The SHARE pin will
go to 3V for approximately 14ms as the output voltage falls.
During a current limit auto-restart event, the SHARE pin outputs a
startup synchronization pulse. The SHARE pin will go to 5V for
approximately 2ms before the converter restarts.
NOTE: Converters operating from separate input filters with
reverse polarity protection (such as the MQME-270-R filter) with
their outputs connected in parallel may exhibit auto-restart opera-
tion at light loads. Consult factory for details.
OUTPUT VOLTAGE TRIM: If desired, it is possible to increase
the MQFL converter’s output voltage above its nominal value. To
do this, use the +SENSE pin (pin 10) for this trim function instead
of for its normal remote sense function, as shown in Figure D.
In this case, a resistor connects the +SENSE pin to the –SENSE
pin (which should still be connected to the output return, either
remotely or locally). The value of the trim resistor should be cho-
sen according to the following equation or from Figure E:
Rtrim = 100 x Vnom
[Vout – Vnom – 0.025 ]
where:
Vnom = the converter’s nominal output voltage,
Vout = the desired output voltage (greater than Vnom), and
Rtrim is in Ohms.
As the output voltage is trimmed up, it produces a greater voltage
stress on the converter’s internal components and may cause the
converter to fail to deliver the desired output voltage at the low
end of the input voltage range at the higher end of the load cur-
rent and temperature range. Please consult the factory for details.
Factory trimmed converters are available by request.
INPUT UNDER-VOLTAGE LOCKOUT: The MQFL converter
has an under-voltage lockout feature that ensures the converter
will be off if the input voltage is too low. The threshold of input
voltage at which the converter will turn on is higher that the thresh-
old at which it will turn off. In addition, the MQFL converter will
not respond to a state of the input voltage unless it has remained
in that state for more than about 200
µ
s. This hysteresis and the
delay ensure proper operation when the source impedance is
high or in a noisy environment.
INPUT OVER-VOLTAGE SHUTDOWN: The MQFL converter
also has an over-voltage feature that ensures the converter will be
off if the input voltage is too high. It also has a hysteresis and
time delay to ensure proper operation.
CURRENT LIMIT: The converter will reduce its output voltage
in response to an overload condition, as shown in Figure 6. If
the output voltage drops to below approximately 50% of the
nominal setpoint for longer than 1 second, the auto-restart feature
will engage. The auto-restart feature will stop the converter from
delivering load current, in order to protect the converter and the
load from thermal damage. After four seconds have elapsed, the
converter will automatically restart.
In a system with multiple converters configured for load sharing
using the SHARE pin, if the auto-restart feature engages, the con-
verters will synchronize their restart using signals communicated
on the SHARE pin.
BACK-DRIVE CURRENT LIMIT: Converters that use MOSFETs as
synchronous rectifiers are capable of drawing a negative current
from the load if the load is a source of short- or long-term energy.
This negative current is referred to as a “back-drive current”.
Conditions where back-drive current might occur include paral-
leled converters that do not employ current sharing, or where the
current share feature does not adequately ensure sharing during
the startup or shutdown transitions. It can also occur when con-
verters having different output voltages are connected together
through either explicit or parasitic diodes that, while normally
off, become conductive during startup or shutdown. Finally, some
loads, such as motors, can return energy to their power rail. Even
a load capacitor is a source of back-drive energy for some period
of time during a shutdown transient.
To avoid any problems that might arise due to back-drive current,
the MQFL converters limit the negative current that the converter
can draw from its output terminals. The threshold for this back-
drive current limit is placed sufficiently below zero so that the con-
verter may operate properly down to zero load, but its absolute
value (see the Electrical Characteristics page) is small compared
to the converter’s rated output current.
THERMAL CONSIDERATIONS: Figure 5 shows the suggested
Power Derating Curves for this converter as a function of the case
temperature and the maximum desired power MOSFET junction
temperature. All other components within the converter are
cooler than its hottest MOSFET, which at full power is no more
than 20ºC higher than the case temperature directly below this
MOSFET. The Mil-HDBK-1547A component derating guideline
calls for a maximum component temperature of 105ºC. Figure
5 therefore has one power derating curve that ensures this limit
is maintained. It has been SynQor’s extensive experience that
reliable long-term converter operation can be achieved with a
maximum component temperature of 125ºC. In extreme cases,
a maximum temperature of 145ºC is permissible, but not recom-
mended for long-term operation where high reliability is required.
Derating curves for these higher temperature limits are also
included in Figure 5. The maximum case temperature at which
the converter should be operated is 135ºC.
When the converter is mounted on a metal plate, the plate will
help to make the converter’s case bottom a uniform temperature.
How well it does so depends on the thickness of the plate and
on the thermal conductance of the interface layer (e.g. thermal
grease, thermal pad, etc.) between the case and the plate. Unless
this is done very well, it is important not to mistake the plate’s
temperature for the maximum case temperature. It is easy for
them to be as much as 5-10ºC different at full power and at high
temperatures. It is suggested that a thermocouple be attached
directly to the converter’s case through a small hole in the plate
when investigating how hot the converter is getting. Care must
also be made to ensure that there is not a large thermal resistance
between the thermocouple and the case due to whatever adhe-
sive might be used to hold the thermocouple in place.
INPUT SYSTEM INSTABILITY: This
condition can occur
because any DC-DC converter appears incrementally as a
negative resistance load. A detailed application note titled
“Input System Instability” is available on the SynQor website
which provides an understanding of why this instability arises,
and shows the preferred solution for correcting it.
Figure E: Output Voltage Trim Graph
Figure D: Typical connection for output voltage trimming.
270Vdc
Load
+VIN
IN RTN
CASE
ENA 1
SYNC OUT
SYNC IN
ENA 2
SHARE
+ SNS
– SNS
OUT RTN
+VOUT
1
2
3
4
5
6
12
11
10
9
8
7
open
means
on
Rtrim
+
–
+
–
Figure B: Equivalent circuit looking into the SYNC IN pin with
respect to the IN RTN (input return) pin.
PIN 2
PIN 6
5K
5V
SYNC IN
IN RTN
TO SYNC
CIRCUITRY
5K
Figure C: Equivalent circuit looking into SYNC OUT pin with
respect to the IN RTN (input return) pin.
FROM SYNC
CIRCUITRY
5K
5V
SYNC OUT
IN RTN PIN 2
PIN 5
OPEN COLLECTOR
OUTPUT
2N3904
1N4148
250K
125K
68K
5.0V
TO ENABLE
CIRCUITRY
PIN 4
(or PIN 12)
PIN 2
(or PIN 8) IN RTN
ENABLE
Figure A: Equivalent circuit looking into either the ENA1 or ENA2
pins with respect to its corresponding return pin.
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 11
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
BASIC OPERATION AND FEATURES
The MQFL DC-DC converter uses a two-stage power conversion
topology. The first, or regulation, stage is a buck-converter that
keeps the output voltage constant over variations in line, load,
and temperature. The second, or isolation, stage uses transform-
ers to provide the functions of input/output isolation and voltage
transformation to achieve the output voltage required.
Both the regulation and the isolation stages switch at a fixed
frequency for predictable EMI performance. The isolation stage
switches at one half the frequency of the regulation stage, but due
to the push-pull nature of this stage it creates a ripple at double its
switching frequency. As a result, both the input and the output of
the converter have a fundamental ripple frequency of about 550
kHz in the free-running mode.
Rectification of the isolation stage’s output is accomplished with
synchronous rectifiers. These devices, which are MOSFETs with a
very low resistance, dissipate far less energy than would Schottky
diodes. This is the primary reason why the MQFL converters have
such high efficiency, particularly at low output voltages.
Besides improving efficiency, the synchronous rectifiers permit
operation down to zero load current. There is no longer a need
for a minimum load, as is typical for converters that use diodes for
rectification. The synchronous rectifiers actually permit a nega-
tive load current to flow back into the converter’s output terminals
if the load is a source of short or long term energy. The MQFL
converters employ a “back-drive current limit” to keep this nega-
tive output terminal current small.
There is a control circuit on both the input and output sides of the
MQFL converter that determines the conduction state of the power
switches. These circuits communicate with each other across the
isolation barrier through a magnetically coupled device. No
opto-isolators are used. A separate bias supply provides power
to both the input and output control circuits.
An input under-voltage lockout feature with hysteresis is provided,
as well as an input over-voltage shutdown. There is also an
output current limit that is nearly constant as the load impedance
decreases to a short circuit (i.e., there is no fold-back or fold-
forward characteristic to the output current under this condition).
When a load fault is removed, the output voltage rises exponen-
tially to its nominal value without an overshoot.
The MQFL converter’s control circuit does not implement an output
over-voltage limit or an over-temperature shutdown.
The following sections describe the use and operation of addi-
tional control features provided by the MQFL converter.
CONTROL FEATURES
ENABLE: The MQFL converter has two enable pins. Both must
have a logic high level for the converter to be enabled. A logic
low on either pin will inhibit the converter.
The ENA1 pin (pin 4) is referenced with respect to the converter’s
input return (pin 2). The ENA2 pin (pin 12) is referenced with
respect to the converter’s output return (pin 8). This permits the
converter to be inhibited from either the input or the output side.
Regardless of which pin is used to inhibit the converter, the regu-
lation and the isolation stages are turned off. However, when
the converter is inhibited through the ENA1 pin, the bias supply
is also turned off, whereas this supply remains on when the con-
verter is inhibited through the ENA2 pin. A higher input standby
current therefore results in the latter case.
Both enable pins are internally pulled high so that an open connec-
tion on both pins will enable the converter. Figure A shows the equiv-
alent circuit looking into either enable pins. It is TTL compatible.
SHUT DOWN: The MQFL converter will shut down in response
to following conditions:
- ENA1 input low
- ENA2 input low
- VIN input below under-voltage lockout threshold
- VIN input above over-voltage shutdown threshold
- Persistent current limit event lasting more than 1 second
Following a shutdown from a disable event or an input voltage
fault, there is a startup inhibit delay which will prevent the con-
verter from restarting for approximately 300ms. After the 300ms
delay elapses, if the enable inputs are high and the input voltage
is within the operating range, the converter will restart. If the VIN
input is brought down to nearly 0V and back into the operating
range, there is no startup inhibit, and the output voltage will rise
according to the “Turn-On Delay, Rising Vin” specification.
Refer to the following Current Limit section for details regarding
persistent current limit behavior.
REMOTE SENSE: The purpose of the remote sense pins is to
correct for the voltage drop along the conductors that connect the
converter’s output to the load. To achieve this goal, a separate
conductor should be used to connect the +SENSE pin (pin 10)
directly to the positive terminal of the load, as shown in the con-
nection diagram. Similarly, the –SENSE pin (pin 9) should be
connected through a separate conductor to the return terminal of
the load.
NOTE: Even if remote sensing of the load voltage is not desired,
the +SENSE and the -SENSE pins must be connected to +Vout (pin
7) and OUTPUT RETURN (pin 8), respectively, to get proper regu-
lation of the converter’s output. If they are left open, the converter
will have an output voltage that is approximately 200mV higher
than its specified value. If only the +SENSE pin is left open, the
output voltage will be approximately 25mV too high.
Inside the converter, +SENSE is connected to +Vout with a 100W
resistor and –SENSE is connected to OUTPUT RETURN with a
10W resistor.
It is also important to note that when remote sense is used, the
voltage across the converter’s output terminals (pins 7 and 8)
will be higher than the converter’s nominal output voltage due to
resistive drops along the connecting wires. This higher voltage at
the terminals produces a greater voltage stress on the converter’s
internal components and may cause the converter to fail to deliver
the desired output voltage at the low end of the input voltage
range at the higher end of the load current and temperature
range. Please consult the factory for details.
SYNCHRONIZATION: The MQFL converter’s switching fre-
quency can be synchronized to an external frequency source
that is in the 500 kHz to 700 kHz range. A pulse train at the
desired frequency should be applied to the SYNC IN pin (pin 6)
with respect to the INPUT RETURN (pin 2). This pulse train should
have a duty cycle in the 20% to 80% range. Its low value should
be below 0.8V to be guaranteed to be interpreted as a logic low,
and its high value should be above 2.0V to be guaranteed to be
interpreted as a logic high. The transition time between the two
states should be less than 300ns.
If the MQFL converter is not to be synchronized, the SYNC IN pin
should be left open circuit. The converter will then operate in its
free-running mode at a frequency of approximately 550 kHz.
If, due to a fault, the SYNC IN pin is held in either a logic low or
logic high state continuously, the MQFL converter will revert to its
free-running frequency.
The MQFL converter also has a SYNC OUT pin (pin 5). This
output can be used to drive the SYNC IN pins of as many as ten
(10) other MQFL converters. The pulse train coming out of SYNC
OUT has a duty cycle of 50% and a frequency that matches the
switching frequency of the converter with which it is associated.
This frequency is either the free-running frequency if there is no
synchronization signal at the SYNC IN pin, or the synchroniza-
tion frequency if there is.
The SYNC OUT signal is available only when the DC input volt-
age is above approximately 125V and when the converter is not
inhibited through the ENA1 pin. An inhibit through the ENA2 pin
will not turn the SYNC OUT signal off.
NOTE: An MQFL converter that has its SYNC IN pin driven by
the SYNC OUT pin of a second MQFL converter will have its start
of its switching cycle delayed approximately 180 degrees relative
to that of the second converter.
Figure B shows the equivalent circuit looking into the SYNC IN
pin. Figure C shows the equivalent circuit looking into the SYNC
OUT pin.
CURRENT SHARE: When several MQFL converters are placed
in parallel to achieve either a higher total load power or N+1
redundancy, their SHARE pins (pin 11) should be connected
together. The voltage on this common SHARE node represents
the average current delivered by all of the paralleled converters.
Each converter monitors this average value and adjusts itself so
that its output current closely matches that of the average.
Since the SHARE pin is monitored with respect to the OUTPUT
RETURN (pin 8) by each converter, it is important to connect all of
the converters’ OUTPUT RETURN pins together through a low DC
and AC impedance. When this is done correctly, the converters
will deliver their appropriate fraction of the total load current to
within +/- 10% at full rated load.
Whether or not converters are paralleled, the voltage at the
SHARE pin could be used to monitor the approximate average
current delivered by the converter(s). A nominal voltage of 1.0V
represents zero current and a nominal voltage of 2.2V represents
the maximum rated total current, with a linear relationship in
between. The internal source resistance of a converter’s SHARE
pin signal is 2.5 kW.
During an input voltage fault or primary disable event, the SHARE
pin outputs a power failure warning pulse. The SHARE pin will
go to 3V for approximately 14ms as the output voltage falls.
During a current limit auto-restart event, the SHARE pin outputs a
startup synchronization pulse. The SHARE pin will go to 5V for
approximately 2ms before the converter restarts.
NOTE: Converters operating from separate input filters with
reverse polarity protection (such as the MQME-270-R filter) with
their outputs connected in parallel may exhibit auto-restart opera-
tion at light loads. Consult factory for details.
OUTPUT VOLTAGE TRIM: If desired, it is possible to increase
the MQFL converter’s output voltage above its nominal value. To
do this, use the +SENSE pin (pin 10) for this trim function instead
of for its normal remote sense function, as shown in Figure D.
In this case, a resistor connects the +SENSE pin to the –SENSE
pin (which should still be connected to the output return, either
remotely or locally). The value of the trim resistor should be cho-
sen according to the following equation or from Figure E:
Rtrim = 100 x Vnom
[Vout – Vnom – 0.025 ]
where:
Vnom = the converter’s nominal output voltage,
Vout = the desired output voltage (greater than Vnom), and
Rtrim is in Ohms.
As the output voltage is trimmed up, it produces a greater voltage
stress on the converter’s internal components and may cause the
converter to fail to deliver the desired output voltage at the low
end of the input voltage range at the higher end of the load cur-
rent and temperature range. Please consult the factory for details.
Factory trimmed converters are available by request.
INPUT UNDER-VOLTAGE LOCKOUT: The MQFL converter
has an under-voltage lockout feature that ensures the converter
will be off if the input voltage is too low. The threshold of input
voltage at which the converter will turn on is higher that the thresh-
old at which it will turn off. In addition, the MQFL converter will
not respond to a state of the input voltage unless it has remained
in that state for more than about 200
µ
s. This hysteresis and the
delay ensure proper operation when the source impedance is
high or in a noisy environment.
INPUT OVER-VOLTAGE SHUTDOWN: The MQFL converter
also has an over-voltage feature that ensures the converter will be
off if the input voltage is too high. It also has a hysteresis and
time delay to ensure proper operation.
CURRENT LIMIT: The converter will reduce its output voltage
in response to an overload condition, as shown in Figure 6. If
the output voltage drops to below approximately 50% of the
nominal setpoint for longer than 1 second, the auto-restart feature
will engage. The auto-restart feature will stop the converter from
delivering load current, in order to protect the converter and the
load from thermal damage. After four seconds have elapsed, the
converter will automatically restart.
In a system with multiple converters configured for load sharing
using the SHARE pin, if the auto-restart feature engages, the con-
verters will synchronize their restart using signals communicated
on the SHARE pin.
BACK-DRIVE CURRENT LIMIT: Converters that use MOSFETs as
synchronous rectifiers are capable of drawing a negative current
from the load if the load is a source of short- or long-term energy.
This negative current is referred to as a “back-drive current”.
Conditions where back-drive current might occur include paral-
leled converters that do not employ current sharing, or where the
current share feature does not adequately ensure sharing during
the startup or shutdown transitions. It can also occur when con-
verters having different output voltages are connected together
through either explicit or parasitic diodes that, while normally
off, become conductive during startup or shutdown. Finally, some
loads, such as motors, can return energy to their power rail. Even
a load capacitor is a source of back-drive energy for some period
of time during a shutdown transient.
To avoid any problems that might arise due to back-drive current,
the MQFL converters limit the negative current that the converter
can draw from its output terminals. The threshold for this back-
drive current limit is placed sufficiently below zero so that the con-
verter may operate properly down to zero load, but its absolute
value (see the Electrical Characteristics page) is small compared
to the converter’s rated output current.
THERMAL CONSIDERATIONS: Figure 5 shows the suggested
Power Derating Curves for this converter as a function of the case
temperature and the maximum desired power MOSFET junction
temperature. All other components within the converter are
cooler than its hottest MOSFET, which at full power is no more
than 20ºC higher than the case temperature directly below this
MOSFET. The Mil-HDBK-1547A component derating guideline
calls for a maximum component temperature of 105ºC. Figure
5 therefore has one power derating curve that ensures this limit
is maintained. It has been SynQor’s extensive experience that
reliable long-term converter operation can be achieved with a
maximum component temperature of 125ºC. In extreme cases,
a maximum temperature of 145ºC is permissible, but not recom-
mended for long-term operation where high reliability is required.
Derating curves for these higher temperature limits are also
included in Figure 5. The maximum case temperature at which
the converter should be operated is 135ºC.
When the converter is mounted on a metal plate, the plate will
help to make the converter’s case bottom a uniform temperature.
How well it does so depends on the thickness of the plate and
on the thermal conductance of the interface layer (e.g. thermal
grease, thermal pad, etc.) between the case and the plate. Unless
this is done very well, it is important not to mistake the plate’s
temperature for the maximum case temperature. It is easy for
them to be as much as 5-10ºC different at full power and at high
temperatures. It is suggested that a thermocouple be attached
directly to the converter’s case through a small hole in the plate
when investigating how hot the converter is getting. Care must
also be made to ensure that there is not a large thermal resistance
between the thermocouple and the case due to whatever adhe-
sive might be used to hold the thermocouple in place.
INPUT SYSTEM INSTABILITY: This
condition can occur
because any DC-DC converter appears incrementally as a
negative resistance load. A detailed application note titled
“Input System Instability” is available on the SynQor website
which provides an understanding of why this instability arises,
and shows the preferred solution for correcting it.
Figure E: Output Voltage Trim Graph
Figure D: Typical connection for output voltage trimming.
270Vdc
Load
+VIN
IN RTN
CASE
ENA 1
SYNC OUT
SYNC IN
ENA 2
SHARE
+ SNS
– SNS
OUT RTN
+VOUT
1
2
3
4
5
6
12
11
10
9
8
7
open
means
on
Rtrim
+
–
+
–
Figure B: Equivalent circuit looking into the SYNC IN pin with
respect to the IN RTN (input return) pin.
PIN 2
PIN 6
5K
5V
SYNC IN
IN RTN
TO SYNC
CIRCUITRY
5K
Figure C: Equivalent circuit looking into SYNC OUT pin with
respect to the IN RTN (input return) pin.
FROM SYNC
CIRCUITRY
5K
5V
SYNC OUT
IN RTN PIN 2
PIN 5
OPEN COLLECTOR
OUTPUT
2N3904
1N4148
250K
125K
68K
5.0V
TO ENABLE
CIRCUITRY
PIN 4
(or PIN 12)
PIN 2
(or PIN 8) IN RTN
ENABLE
Figure A: Equivalent circuit looking into either the ENA1 or ENA2
pins with respect to its corresponding return pin.
BASIC OPERATION AND FEATURES
The MQFL DC-DC converter uses a two-stage power conversion
topology. The first, or regulation, stage is a buck-converter that
keeps the output voltage constant over variations in line, load,
and temperature. The second, or isolation, stage uses transform-
ers to provide the functions of input/output isolation and voltage
transformation to achieve the output voltage required.
Both the regulation and the isolation stages switch at a fixed
frequency for predictable EMI performance. The isolation stage
switches at one half the frequency of the regulation stage, but due
to the push-pull nature of this stage it creates a ripple at double its
switching frequency. As a result, both the input and the output of
the converter have a fundamental ripple frequency of about 550
kHz in the free-running mode.
Rectification of the isolation stage’s output is accomplished with
synchronous rectifiers. These devices, which are MOSFETs with a
very low resistance, dissipate far less energy than would Schottky
diodes. This is the primary reason why the MQFL converters have
such high efficiency, particularly at low output voltages.
Besides improving efficiency, the synchronous rectifiers permit
operation down to zero load current. There is no longer a need
for a minimum load, as is typical for converters that use diodes for
rectification. The synchronous rectifiers actually permit a nega-
tive load current to flow back into the converter’s output terminals
if the load is a source of short or long term energy. The MQFL
converters employ a “back-drive current limit” to keep this nega-
tive output terminal current small.
There is a control circuit on both the input and output sides of the
MQFL converter that determines the conduction state of the power
switches. These circuits communicate with each other across the
isolation barrier through a magnetically coupled device. No
opto-isolators are used. A separate bias supply provides power
to both the input and output control circuits.
An input under-voltage lockout feature with hysteresis is provided,
as well as an input over-voltage shutdown. There is also an
output current limit that is nearly constant as the load impedance
decreases to a short circuit (i.e., there is no fold-back or fold-
forward characteristic to the output current under this condition).
When a load fault is removed, the output voltage rises exponen-
tially to its nominal value without an overshoot.
The MQFL converter’s control circuit does not implement an output
over-voltage limit or an over-temperature shutdown.
The following sections describe the use and operation of addi-
tional control features provided by the MQFL converter.
CONTROL FEATURES
ENABLE: The MQFL converter has two enable pins. Both must
have a logic high level for the converter to be enabled. A logic
low on either pin will inhibit the converter.
The ENA1 pin (pin 4) is referenced with respect to the converter’s
input return (pin 2). The ENA2 pin (pin 12) is referenced with
respect to the converter’s output return (pin 8). This permits the
converter to be inhibited from either the input or the output side.
Regardless of which pin is used to inhibit the converter, the regu-
lation and the isolation stages are turned off. However, when
the converter is inhibited through the ENA1 pin, the bias supply
is also turned off, whereas this supply remains on when the con-
verter is inhibited through the ENA2 pin. A higher input standby
current therefore results in the latter case.
Both enable pins are internally pulled high so that an open connec-
tion on both pins will enable the converter. Figure A shows the equiv-
alent circuit looking into either enable pins. It is TTL compatible.
SHUT DOWN: The MQFL converter will shut down in response
to following conditions:
- ENA1 input low
- ENA2 input low
- VIN input below under-voltage lockout threshold
- VIN input above over-voltage shutdown threshold
- Persistent current limit event lasting more than 1 second
Following a shutdown from a disable event or an input voltage
fault, there is a startup inhibit delay which will prevent the con-
verter from restarting for approximately 300ms. After the 300ms
delay elapses, if the enable inputs are high and the input voltage
is within the operating range, the converter will restart. If the VIN
input is brought down to nearly 0V and back into the operating
range, there is no startup inhibit, and the output voltage will rise
according to the “Turn-On Delay, Rising Vin” specification.
Refer to the following Current Limit section for details regarding
persistent current limit behavior.
REMOTE SENSE: The purpose of the remote sense pins is to
correct for the voltage drop along the conductors that connect the
converter’s output to the load. To achieve this goal, a separate
conductor should be used to connect the +SENSE pin (pin 10)
directly to the positive terminal of the load, as shown in the con-
nection diagram. Similarly, the –SENSE pin (pin 9) should be
connected through a separate conductor to the return terminal of
the load.
NOTE: Even if remote sensing of the load voltage is not desired,
the +SENSE and the -SENSE pins must be connected to +Vout (pin
7) and OUTPUT RETURN (pin 8), respectively, to get proper regu-
lation of the converter’s output. If they are left open, the converter
will have an output voltage that is approximately 200mV higher
than its specified value. If only the +SENSE pin is left open, the
output voltage will be approximately 25mV too high.
Inside the converter, +SENSE is connected to +Vout with a 100W
resistor and –SENSE is connected to OUTPUT RETURN with a
10W resistor.
It is also important to note that when remote sense is used, the
voltage across the converter’s output terminals (pins 7 and 8)
will be higher than the converter’s nominal output voltage due to
resistive drops along the connecting wires. This higher voltage at
the terminals produces a greater voltage stress on the converter’s
internal components and may cause the converter to fail to deliver
the desired output voltage at the low end of the input voltage
range at the higher end of the load current and temperature
range. Please consult the factory for details.
SYNCHRONIZATION: The MQFL converter’s switching fre-
quency can be synchronized to an external frequency source
that is in the 500 kHz to 700 kHz range. A pulse train at the
desired frequency should be applied to the SYNC IN pin (pin 6)
with respect to the INPUT RETURN (pin 2). This pulse train should
have a duty cycle in the 20% to 80% range. Its low value should
be below 0.8V to be guaranteed to be interpreted as a logic low,
and its high value should be above 2.0V to be guaranteed to be
interpreted as a logic high. The transition time between the two
states should be less than 300ns.
If the MQFL converter is not to be synchronized, the SYNC IN pin
should be left open circuit. The converter will then operate in its
free-running mode at a frequency of approximately 550 kHz.
If, due to a fault, the SYNC IN pin is held in either a logic low or
logic high state continuously, the MQFL converter will revert to its
free-running frequency.
The MQFL converter also has a SYNC OUT pin (pin 5). This
output can be used to drive the SYNC IN pins of as many as ten
(10) other MQFL converters. The pulse train coming out of SYNC
OUT has a duty cycle of 50% and a frequency that matches the
switching frequency of the converter with which it is associated.
This frequency is either the free-running frequency if there is no
synchronization signal at the SYNC IN pin, or the synchroniza-
tion frequency if there is.
The SYNC OUT signal is available only when the DC input volt-
age is above approximately 125V and when the converter is not
inhibited through the ENA1 pin. An inhibit through the ENA2 pin
will not turn the SYNC OUT signal off.
NOTE: An MQFL converter that has its SYNC IN pin driven by
the SYNC OUT pin of a second MQFL converter will have its start
of its switching cycle delayed approximately 180 degrees relative
to that of the second converter.
Figure B shows the equivalent circuit looking into the SYNC IN
pin. Figure C shows the equivalent circuit looking into the SYNC
OUT pin.
CURRENT SHARE: When several MQFL converters are placed
in parallel to achieve either a higher total load power or N+1
redundancy, their SHARE pins (pin 11) should be connected
together. The voltage on this common SHARE node represents
the average current delivered by all of the paralleled converters.
Each converter monitors this average value and adjusts itself so
that its output current closely matches that of the average.
Since the SHARE pin is monitored with respect to the OUTPUT
RETURN (pin 8) by each converter, it is important to connect all of
the converters’ OUTPUT RETURN pins together through a low DC
and AC impedance. When this is done correctly, the converters
will deliver their appropriate fraction of the total load current to
within +/- 10% at full rated load.
Whether or not converters are paralleled, the voltage at the
SHARE pin could be used to monitor the approximate average
current delivered by the converter(s). A nominal voltage of 1.0V
represents zero current and a nominal voltage of 2.2V represents
the maximum rated total current, with a linear relationship in
between. The internal source resistance of a converter’s SHARE
pin signal is 2.5 kW.
During an input voltage fault or primary disable event, the SHARE
pin outputs a power failure warning pulse. The SHARE pin will
go to 3V for approximately 14ms as the output voltage falls.
During a current limit auto-restart event, the SHARE pin outputs a
startup synchronization pulse. The SHARE pin will go to 5V for
approximately 2ms before the converter restarts.
NOTE: Converters operating from separate input filters with
reverse polarity protection (such as the MQME-270-R filter) with
their outputs connected in parallel may exhibit auto-restart opera-
tion at light loads. Consult factory for details.
OUTPUT VOLTAGE TRIM: If desired, it is possible to increase
the MQFL converter’s output voltage above its nominal value. To
do this, use the +SENSE pin (pin 10) for this trim function instead
of for its normal remote sense function, as shown in Figure D.
In this case, a resistor connects the +SENSE pin to the –SENSE
pin (which should still be connected to the output return, either
remotely or locally). The value of the trim resistor should be cho-
sen according to the following equation or from Figure E:
Rtrim = 100 x Vnom
[Vout – Vnom – 0.025 ]
where:
Vnom = the converter’s nominal output voltage,
Vout = the desired output voltage (greater than Vnom), and
Rtrim is in Ohms.
As the output voltage is trimmed up, it produces a greater voltage
stress on the converter’s internal components and may cause the
converter to fail to deliver the desired output voltage at the low
end of the input voltage range at the higher end of the load cur-
rent and temperature range. Please consult the factory for details.
Factory trimmed converters are available by request.
INPUT UNDER-VOLTAGE LOCKOUT: The MQFL converter
has an under-voltage lockout feature that ensures the converter
will be off if the input voltage is too low. The threshold of input
voltage at which the converter will turn on is higher that the thresh-
old at which it will turn off. In addition, the MQFL converter will
not respond to a state of the input voltage unless it has remained
in that state for more than about 200
µ
s. This hysteresis and the
delay ensure proper operation when the source impedance is
high or in a noisy environment.
INPUT OVER-VOLTAGE SHUTDOWN: The MQFL converter
also has an over-voltage feature that ensures the converter will be
off if the input voltage is too high. It also has a hysteresis and
time delay to ensure proper operation.
CURRENT LIMIT: The converter will reduce its output voltage
in response to an overload condition, as shown in Figure 6. If
the output voltage drops to below approximately 50% of the
nominal setpoint for longer than 1 second, the auto-restart feature
will engage. The auto-restart feature will stop the converter from
delivering load current, in order to protect the converter and the
load from thermal damage. After four seconds have elapsed, the
converter will automatically restart.
In a system with multiple converters configured for load sharing
using the SHARE pin, if the auto-restart feature engages, the con-
verters will synchronize their restart using signals communicated
on the SHARE pin.
BACK-DRIVE CURRENT LIMIT: Converters that use MOSFETs as
synchronous rectifiers are capable of drawing a negative current
from the load if the load is a source of short- or long-term energy.
This negative current is referred to as a “back-drive current”.
Conditions where back-drive current might occur include paral-
leled converters that do not employ current sharing, or where the
current share feature does not adequately ensure sharing during
the startup or shutdown transitions. It can also occur when con-
verters having different output voltages are connected together
through either explicit or parasitic diodes that, while normally
off, become conductive during startup or shutdown. Finally, some
loads, such as motors, can return energy to their power rail. Even
a load capacitor is a source of back-drive energy for some period
of time during a shutdown transient.
To avoid any problems that might arise due to back-drive current,
the MQFL converters limit the negative current that the converter
can draw from its output terminals. The threshold for this back-
drive current limit is placed sufficiently below zero so that the con-
verter may operate properly down to zero load, but its absolute
value (see the Electrical Characteristics page) is small compared
to the converter’s rated output current.
THERMAL CONSIDERATIONS: Figure 5 shows the suggested
Power Derating Curves for this converter as a function of the case
temperature and the maximum desired power MOSFET junction
temperature. All other components within the converter are
cooler than its hottest MOSFET, which at full power is no more
than 20ºC higher than the case temperature directly below this
MOSFET. The Mil-HDBK-1547A component derating guideline
calls for a maximum component temperature of 105ºC. Figure
5 therefore has one power derating curve that ensures this limit
is maintained. It has been SynQor’s extensive experience that
reliable long-term converter operation can be achieved with a
maximum component temperature of 125ºC. In extreme cases,
a maximum temperature of 145ºC is permissible, but not recom-
mended for long-term operation where high reliability is required.
Derating curves for these higher temperature limits are also
included in Figure 5. The maximum case temperature at which
the converter should be operated is 135ºC.
When the converter is mounted on a metal plate, the plate will
help to make the converter’s case bottom a uniform temperature.
How well it does so depends on the thickness of the plate and
on the thermal conductance of the interface layer (e.g. thermal
grease, thermal pad, etc.) between the case and the plate. Unless
this is done very well, it is important not to mistake the plate’s
temperature for the maximum case temperature. It is easy for
them to be as much as 5-10ºC different at full power and at high
temperatures. It is suggested that a thermocouple be attached
directly to the converter’s case through a small hole in the plate
when investigating how hot the converter is getting. Care must
also be made to ensure that there is not a large thermal resistance
between the thermocouple and the case due to whatever adhe-
sive might be used to hold the thermocouple in place.
INPUT SYSTEM INSTABILITY: This
condition can occur
because any DC-DC converter appears incrementally as a
negative resistance load. A detailed application note titled
“Input System Instability” is available on the SynQor website
which provides an understanding of why this instability arises,
and shows the preferred solution for correcting it.
Figure E: Output Voltage Trim Graph
Figure D: Typical connection for output voltage trimming.
270Vdc
Load
+VIN
IN RTN
CASE
ENA 1
SYNC OUT
SYNC IN
ENA 2
SHARE
+ SNS
– SNS
OUT RTN
+VOUT
1
2
3
4
5
6
12
11
10
9
8
7
open
means
on
Rtrim
+
–
+
–
Figure B: Equivalent circuit looking into the SYNC IN pin with
respect to the IN RTN (input return) pin.
PIN 2
PIN 6
5K
5V
SYNC IN
IN RTN
TO SYNC
CIRCUITRY
5K
Figure C: Equivalent circuit looking into SYNC OUT pin with
respect to the IN RTN (input return) pin.
FROM SYNC
CIRCUITRY
5K
5V
SYNC OUT
IN RTN PIN 2
PIN 5
OPEN COLLECTOR
OUTPUT
2N3904
1N4148
250K
125K
68K
5.0V
TO ENABLE
CIRCUITRY
PIN 4
(or PIN 12)
PIN 2
(or PIN 8) IN RTN
ENABLE
Figure A: Equivalent circuit looking into either the ENA1 or ENA2
pins with respect to its corresponding return pin.
100
1,000
10,000
100,000
00.5 11.5 22.5 3
Increase in Vout (V)
Trim Resistance (ohms)
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 12
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
BASIC OPERATION AND FEATURES
The MQFL DC-DC converter uses a two-stage power conversion
topology. The first, or regulation, stage is a buck-converter that
keeps the output voltage constant over variations in line, load,
and temperature. The second, or isolation, stage uses transform-
ers to provide the functions of input/output isolation and voltage
transformation to achieve the output voltage required.
Both the regulation and the isolation stages switch at a fixed
frequency for predictable EMI performance. The isolation stage
switches at one half the frequency of the regulation stage, but due
to the push-pull nature of this stage it creates a ripple at double its
switching frequency. As a result, both the input and the output of
the converter have a fundamental ripple frequency of about 550
kHz in the free-running mode.
Rectification of the isolation stage’s output is accomplished with
synchronous rectifiers. These devices, which are MOSFETs with a
very low resistance, dissipate far less energy than would Schottky
diodes. This is the primary reason why the MQFL converters have
such high efficiency, particularly at low output voltages.
Besides improving efficiency, the synchronous rectifiers permit
operation down to zero load current. There is no longer a need
for a minimum load, as is typical for converters that use diodes for
rectification. The synchronous rectifiers actually permit a nega-
tive load current to flow back into the converter’s output terminals
if the load is a source of short or long term energy. The MQFL
converters employ a “back-drive current limit” to keep this nega-
tive output terminal current small.
There is a control circuit on both the input and output sides of the
MQFL converter that determines the conduction state of the power
switches. These circuits communicate with each other across the
isolation barrier through a magnetically coupled device. No
opto-isolators are used. A separate bias supply provides power
to both the input and output control circuits.
An input under-voltage lockout feature with hysteresis is provided,
as well as an input over-voltage shutdown. There is also an
output current limit that is nearly constant as the load impedance
decreases to a short circuit (i.e., there is no fold-back or fold-
forward characteristic to the output current under this condition).
When a load fault is removed, the output voltage rises exponen-
tially to its nominal value without an overshoot.
The MQFL converter’s control circuit does not implement an output
over-voltage limit or an over-temperature shutdown.
The following sections describe the use and operation of addi-
tional control features provided by the MQFL converter.
CONTROL FEATURES
ENABLE: The MQFL converter has two enable pins. Both must
have a logic high level for the converter to be enabled. A logic
low on either pin will inhibit the converter.
The ENA1 pin (pin 4) is referenced with respect to the converter’s
input return (pin 2). The ENA2 pin (pin 12) is referenced with
respect to the converter’s output return (pin 8). This permits the
converter to be inhibited from either the input or the output side.
Regardless of which pin is used to inhibit the converter, the regu-
lation and the isolation stages are turned off. However, when
the converter is inhibited through the ENA1 pin, the bias supply
is also turned off, whereas this supply remains on when the con-
verter is inhibited through the ENA2 pin. A higher input standby
current therefore results in the latter case.
Both enable pins are internally pulled high so that an open connec-
tion on both pins will enable the converter. Figure A shows the equiv-
alent circuit looking into either enable pins. It is TTL compatible.
SHUT DOWN: The MQFL converter will shut down in response
to following conditions:
- ENA1 input low
- ENA2 input low
- VIN input below under-voltage lockout threshold
- VIN input above over-voltage shutdown threshold
- Persistent current limit event lasting more than 1 second
Following a shutdown from a disable event or an input voltage
fault, there is a startup inhibit delay which will prevent the con-
verter from restarting for approximately 300ms. After the 300ms
delay elapses, if the enable inputs are high and the input voltage
is within the operating range, the converter will restart. If the VIN
input is brought down to nearly 0V and back into the operating
range, there is no startup inhibit, and the output voltage will rise
according to the “Turn-On Delay, Rising Vin” specification.
Refer to the following Current Limit section for details regarding
persistent current limit behavior.
REMOTE SENSE: The purpose of the remote sense pins is to
correct for the voltage drop along the conductors that connect the
converter’s output to the load. To achieve this goal, a separate
conductor should be used to connect the +SENSE pin (pin 10)
directly to the positive terminal of the load, as shown in the con-
nection diagram. Similarly, the –SENSE pin (pin 9) should be
connected through a separate conductor to the return terminal of
the load.
NOTE: Even if remote sensing of the load voltage is not desired,
the +SENSE and the -SENSE pins must be connected to +Vout (pin
7) and OUTPUT RETURN (pin 8), respectively, to get proper regu-
lation of the converter’s output. If they are left open, the converter
will have an output voltage that is approximately 200mV higher
than its specified value. If only the +SENSE pin is left open, the
output voltage will be approximately 25mV too high.
Inside the converter, +SENSE is connected to +Vout with a 100W
resistor and –SENSE is connected to OUTPUT RETURN with a
10W resistor.
It is also important to note that when remote sense is used, the
voltage across the converter’s output terminals (pins 7 and 8)
will be higher than the converter’s nominal output voltage due to
resistive drops along the connecting wires. This higher voltage at
the terminals produces a greater voltage stress on the converter’s
internal components and may cause the converter to fail to deliver
the desired output voltage at the low end of the input voltage
range at the higher end of the load current and temperature
range. Please consult the factory for details.
SYNCHRONIZATION: The MQFL converter’s switching fre-
quency can be synchronized to an external frequency source
that is in the 500 kHz to 700 kHz range. A pulse train at the
desired frequency should be applied to the SYNC IN pin (pin 6)
with respect to the INPUT RETURN (pin 2). This pulse train should
have a duty cycle in the 20% to 80% range. Its low value should
be below 0.8V to be guaranteed to be interpreted as a logic low,
and its high value should be above 2.0V to be guaranteed to be
interpreted as a logic high. The transition time between the two
states should be less than 300ns.
If the MQFL converter is not to be synchronized, the SYNC IN pin
should be left open circuit. The converter will then operate in its
free-running mode at a frequency of approximately 550 kHz.
If, due to a fault, the SYNC IN pin is held in either a logic low or
logic high state continuously, the MQFL converter will revert to its
free-running frequency.
The MQFL converter also has a SYNC OUT pin (pin 5). This
output can be used to drive the SYNC IN pins of as many as ten
(10) other MQFL converters. The pulse train coming out of SYNC
OUT has a duty cycle of 50% and a frequency that matches the
switching frequency of the converter with which it is associated.
This frequency is either the free-running frequency if there is no
synchronization signal at the SYNC IN pin, or the synchroniza-
tion frequency if there is.
The SYNC OUT signal is available only when the DC input volt-
age is above approximately 125V and when the converter is not
inhibited through the ENA1 pin. An inhibit through the ENA2 pin
will not turn the SYNC OUT signal off.
NOTE: An MQFL converter that has its SYNC IN pin driven by
the SYNC OUT pin of a second MQFL converter will have its start
of its switching cycle delayed approximately 180 degrees relative
to that of the second converter.
Figure B shows the equivalent circuit looking into the SYNC IN
pin. Figure C shows the equivalent circuit looking into the SYNC
OUT pin.
CURRENT SHARE: When several MQFL converters are placed
in parallel to achieve either a higher total load power or N+1
redundancy, their SHARE pins (pin 11) should be connected
together. The voltage on this common SHARE node represents
the average current delivered by all of the paralleled converters.
Each converter monitors this average value and adjusts itself so
that its output current closely matches that of the average.
Since the SHARE pin is monitored with respect to the OUTPUT
RETURN (pin 8) by each converter, it is important to connect all of
the converters’ OUTPUT RETURN pins together through a low DC
and AC impedance. When this is done correctly, the converters
will deliver their appropriate fraction of the total load current to
within +/- 10% at full rated load.
Whether or not converters are paralleled, the voltage at the
SHARE pin could be used to monitor the approximate average
current delivered by the converter(s). A nominal voltage of 1.0V
represents zero current and a nominal voltage of 2.2V represents
the maximum rated total current, with a linear relationship in
between. The internal source resistance of a converter’s SHARE
pin signal is 2.5 kW.
During an input voltage fault or primary disable event, the SHARE
pin outputs a power failure warning pulse. The SHARE pin will
go to 3V for approximately 14ms as the output voltage falls.
During a current limit auto-restart event, the SHARE pin outputs a
startup synchronization pulse. The SHARE pin will go to 5V for
approximately 2ms before the converter restarts.
NOTE: Converters operating from separate input filters with
reverse polarity protection (such as the MQME-270-R filter) with
their outputs connected in parallel may exhibit auto-restart opera-
tion at light loads. Consult factory for details.
OUTPUT VOLTAGE TRIM: If desired, it is possible to increase
the MQFL converter’s output voltage above its nominal value. To
do this, use the +SENSE pin (pin 10) for this trim function instead
of for its normal remote sense function, as shown in Figure D.
In this case, a resistor connects the +SENSE pin to the –SENSE
pin (which should still be connected to the output return, either
remotely or locally). The value of the trim resistor should be cho-
sen according to the following equation or from Figure E:
Rtrim = 100 x Vnom
[Vout – Vnom – 0.025 ]
where:
Vnom = the converter’s nominal output voltage,
Vout = the desired output voltage (greater than Vnom), and
Rtrim is in Ohms.
As the output voltage is trimmed up, it produces a greater voltage
stress on the converter’s internal components and may cause the
converter to fail to deliver the desired output voltage at the low
end of the input voltage range at the higher end of the load cur-
rent and temperature range. Please consult the factory for details.
Factory trimmed converters are available by request.
INPUT UNDER-VOLTAGE LOCKOUT: The MQFL converter
has an under-voltage lockout feature that ensures the converter
will be off if the input voltage is too low. The threshold of input
voltage at which the converter will turn on is higher that the thresh-
old at which it will turn off. In addition, the MQFL converter will
not respond to a state of the input voltage unless it has remained
in that state for more than about 200
µ
s. This hysteresis and the
delay ensure proper operation when the source impedance is
high or in a noisy environment.
INPUT OVER-VOLTAGE SHUTDOWN: The MQFL converter
also has an over-voltage feature that ensures the converter will be
off if the input voltage is too high. It also has a hysteresis and
time delay to ensure proper operation.
CURRENT LIMIT: The converter will reduce its output voltage
in response to an overload condition, as shown in Figure 6. If
the output voltage drops to below approximately 50% of the
nominal setpoint for longer than 1 second, the auto-restart feature
will engage. The auto-restart feature will stop the converter from
delivering load current, in order to protect the converter and the
load from thermal damage. After four seconds have elapsed, the
converter will automatically restart.
In a system with multiple converters configured for load sharing
using the SHARE pin, if the auto-restart feature engages, the con-
verters will synchronize their restart using signals communicated
on the SHARE pin.
BACK-DRIVE CURRENT LIMIT: Converters that use MOSFETs as
synchronous rectifiers are capable of drawing a negative current
from the load if the load is a source of short- or long-term energy.
This negative current is referred to as a “back-drive current”.
Conditions where back-drive current might occur include paral-
leled converters that do not employ current sharing, or where the
current share feature does not adequately ensure sharing during
the startup or shutdown transitions. It can also occur when con-
verters having different output voltages are connected together
through either explicit or parasitic diodes that, while normally
off, become conductive during startup or shutdown. Finally, some
loads, such as motors, can return energy to their power rail. Even
a load capacitor is a source of back-drive energy for some period
of time during a shutdown transient.
To avoid any problems that might arise due to back-drive current,
the MQFL converters limit the negative current that the converter
can draw from its output terminals. The threshold for this back-
drive current limit is placed sufficiently below zero so that the con-
verter may operate properly down to zero load, but its absolute
value (see the Electrical Characteristics page) is small compared
to the converter’s rated output current.
THERMAL CONSIDERATIONS: Figure 5 shows the suggested
Power Derating Curves for this converter as a function of the case
temperature and the maximum desired power MOSFET junction
temperature. All other components within the converter are
cooler than its hottest MOSFET, which at full power is no more
than 20ºC higher than the case temperature directly below this
MOSFET. The Mil-HDBK-1547A component derating guideline
calls for a maximum component temperature of 105ºC. Figure
5 therefore has one power derating curve that ensures this limit
is maintained. It has been SynQor’s extensive experience that
reliable long-term converter operation can be achieved with a
maximum component temperature of 125ºC. In extreme cases,
a maximum temperature of 145ºC is permissible, but not recom-
mended for long-term operation where high reliability is required.
Derating curves for these higher temperature limits are also
included in Figure 5. The maximum case temperature at which
the converter should be operated is 135ºC.
When the converter is mounted on a metal plate, the plate will
help to make the converter’s case bottom a uniform temperature.
How well it does so depends on the thickness of the plate and
on the thermal conductance of the interface layer (e.g. thermal
grease, thermal pad, etc.) between the case and the plate. Unless
this is done very well, it is important not to mistake the plate’s
temperature for the maximum case temperature. It is easy for
them to be as much as 5-10ºC different at full power and at high
temperatures. It is suggested that a thermocouple be attached
directly to the converter’s case through a small hole in the plate
when investigating how hot the converter is getting. Care must
also be made to ensure that there is not a large thermal resistance
between the thermocouple and the case due to whatever adhe-
sive might be used to hold the thermocouple in place.
INPUT SYSTEM INSTABILITY: This
condition can occur
because any DC-DC converter appears incrementally as a
negative resistance load. A detailed application note titled
“Input System Instability” is available on the SynQor website
which provides an understanding of why this instability arises,
and shows the preferred solution for correcting it.
Figure E: Output Voltage Trim Graph
Figure D: Typical connection for output voltage trimming.
270Vdc
Load
+VIN
IN RTN
CASE
ENA 1
SYNC OUT
SYNC IN
ENA 2
SHARE
+ SNS
– SNS
OUT RTN
+VOUT
1
2
3
4
5
6
12
11
10
9
8
7
open
means
on
Rtrim
+
–
+
–
Figure B: Equivalent circuit looking into the SYNC IN pin with
respect to the IN RTN (input return) pin.
PIN 2
PIN 6
5K
5V
SYNC IN
IN RTN
TO SYNC
CIRCUITRY
5K
Figure C: Equivalent circuit looking into SYNC OUT pin with
respect to the IN RTN (input return) pin.
FROM SYNC
CIRCUITRY
5K
5V
SYNC OUT
IN RTN PIN 2
PIN 5
OPEN COLLECTOR
OUTPUT
2N3904
1N4148
250K
125K
68K
5.0V
TO ENABLE
CIRCUITRY
PIN 4
(or PIN 12)
PIN 2
(or PIN 8) IN RTN
ENABLE
Figure A: Equivalent circuit looking into either the ENA1 or ENA2
pins with respect to its corresponding return pin.
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 13
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
CONSTRUCTION AND ENVIRONMENTAL STRESS SCREENING OPTIONS
MilQor converters and filters are offered in four variations of construction technique and environmental stress screening options. The
three highest grades, C, ES, and HB, all use SynQor’s proprietary QorSeal™ Hi-Rel assembly process that includes a Parylene-C coating
of the circuit, a high performance thermal compound filler, and a nickel barrier gold plated aluminum case. The B-grade version uses
a ruggedized assembly process that includes a medium performance thermal compound filler and a black anodized aluminum case†.
Each successively higher grade has more stringent mechanical and electrical testing, as well as a longer burn-in cycle. The ES- and
HB-Grades are also constructed of components that have been procured through an element evaluation process that pre-qualifies each
new batch of devices.
† Note: Since the surface of the black anodized case is not guaranteed to be electrically conductive, a star washer or similar device
should be used to cut through the surface oxide if electrical connection to the case is desired.
Screening Consistent with
MIL-STD-883F B-Grade
(-40 ºC to +85 ºC) C-Grade
(-40 ºC to +100 ºC)
ES-Grade
(-55 ºC to +125 ºC)
(Element Evaluation)
HB-Grade
(-55 ºC to +125 ºC)
(Element Evaluation)
Internal Visual *Yes Yes Yes Yes
Temperature Cycle Method 1010 No No Condition B
(-55 ºC to +125 ºC) Condition C
(-65 ºC to +150 ºC)
Constant
Acceleration Method 2001
(Y1 Direction) No No 500g Condition A
(5000g)
Burn-in
Method 1015
Load Cycled
• 10s period
• 2s @ 100% Load
• 8s @ 0% Load
12 Hrs @ +100 ºC 24 Hrs @ +125 ºC 96 Hrs @ +125 ºC 160 Hrs @ +125 ºC
Final Electrical Test Method 5005
(Group A) +25 ºC +25 ºC -45, +25, +100 ºC -55, +25, +125 ºC
Mechanical Seal,
Thermal, and Coating
Process Anodized Package Full QorSeal Full QorSeal Full QorSeal
External Visual 2009 * * Yes Yes
Construction Process Ruggedized QorSeal QorSeal QorSeal
* Per IPC-A-610 (Rev. D) Class 3
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 14
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
1
2
3
4
5
6
12
11
10
9
8
71.750
[44.45]
1.50
[38.10]
0.228 [5.79]
0.300 [7.62]
0.140 [3.56]
0.220 [5.59]
0.050 [1.27]
0.040 [1.02]
PIN
0.200 [5.08]
TYP. NON-CUM.
0.250 [6.35]
0.250 [6.35]
TYP
0.375 [9.52]
2.50 [63.50]
2.96 [75.2]
0.390 [9.91]
2.00
[50.80]
1.15 [29.21]
1.750 [44.45]
+VIN
IN RTN
CASE
ENA 1
SHARE
ENA 2
+SNS
-SNS
+VOUT
OUT RTN
SYNC OUT
SYNC IN S/N 0000000 D/C 3205-301 CAGE 1WX10
1
2
3
4
5
6
12
11
10
9
8
7
1.260
[32.00]
1.50 [32.10]
0.28 [3.25]
0.228 [5.79]
0.093
[2.36]
0.220 [5.59]
0.050 [1.27]
0.220 [5.59]
PIN
0.200 [5.08]
TYP. NON-CUM.
0.250 [6.35]
0.390 [9.91]
2.50 [63.50]
2.76 [70.10]
3.00 [76.20]
2.96 [75.2]
+VIN
IN RTN
CASE
ENA 1
SHARE
ENA 2
+SNS
-SNS
+VOUT
OUT RTN
SYNC OUT
SYNC IN S/N 0000000 D/C 3205-301 CAGE 1WX10
Pin # Function
1 POSITIVE INPUT
2 INPUT RETURN
3 CASE
4 ENABLE 1
5 SYNC OUTPUT
6 SYNC INPUT
7 POSITIVE OUTPUT
8 OUTPUT RETURN
9 - SENSE
10 + SENSE
11 SHARE
12 ENABLE 2
PACKAGE PINOUTS
NOTES
1) Case: Aluminum with gold over
nickel plate finish for the C-, ES-, and
HB-Grade products.
Aluminum with black anodized finish
for the B-Grade products.
2) Pins: Diameter: 0.040” (1.02mm)
Material: Copper
Finish: Gold over Nickel plate
3) All dimensions as inches (mm)
4) Tolerances: a) x.xx +0.02”
(x.x +0.5mm)
b) x.xxx +0.010”
(x.xx +0.25mm)
5) Weight: 2.8 oz. (79 g) typical
6) Workmanship: Meets or exceeds
IPC-A-610C Class III
0.390
[9.91]
0.050 [1.27] 0.050 [1.27]
0.250 [6.35]
0.220 [5.59]
0.420 [10.7]
2.80 [71.1]
0.525
[13.33]
0.040 [1.02]
PIN
0.200 [5.08]
TYP. NON-CUM.
0.390 [9.91]
0.050 [1.27]
0.250 [6.35]
0.220 [5.59]
0.420 [10.7]
2.80 [71.1]
0.525 [13.33]
0.040 [1.02]
PIN
0.200 [5.08]
TYP. NON-CUM.
Case X
Case Y
Case Z (variant of Y)Case W (variant of Y)
MQFL-270-28S-X-HB
DC-DC CONVERTER
270Vin 28.0 Vout @ 4 A
MQFL-270-28S-X-HB
DC-DC CONVERTER
270Vin 28.0 Vout @ 4 A
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 15
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
PART NUMBERING SYSTEM
The part numbering system for SynQor’s MilQor DC-DC converters follows the format shown in the table below.
APPLICATION NOTES
A variety of application notes and technical white papers can be downloaded in pdf format from the SynQor website.
PATENTS
SynQor holds the following patents, one or more of which might apply to this product:
5,999,417 6,222,742 6,545,890 6,577,109 6,594,159 6,731,520 6,894,468 6,896,526
6,927,987 7,050,309 7,072,190 7,085,146 7,119,524 7,269,034 7,272,021 7,272,023
Warranty
SynQor offers a two (2) year limited warranty. Complete warranty
information is listed on our website or is available upon request from
SynQor.
Information furnished by SynQor is believed to be accurate and reliable.
However, no responsibility is assumed by SynQor for its use, nor for any
infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any
patent or patent rights of SynQor.
Contact SynQor for further information:
Phone: 978-849-0600
Toll Free: 888-567-9596
Fax: 978-849-0602
E-mail: power@synqor.com
Web: www.synqor.com
Address: 155 Swanson Road
Boxborough, MA 01719
USA
†80% of total output current available on
any one output.
*Converters may be operated continuously at the highest transient input voltage, but some
component electrical and thermal stresses would be beyond MIL-HDBK-1547A guidelines.
Model
Name
Input
Voltage
Range
Output Voltage(s) Package Outline/
Pin Confi guration
Screening
Grade
Single
Output Dual
Output Triple
Output
MQFL
28
28E
28V
28VE
270
270E
270L
1R5S
1R8S
2R5S
3R3S
05S
06S
7R5S
09S
12S
15S
28S
05D
12D
15D
3R312T
3R315T
0512T
0515T
3015T
X
Y
W
Z
B
C
ES
HB
MilQor MQFL FAMILY MATRIX
The tables below show the array of MQFL converters available. When ordering SynQor converters, please ensure that you use
the complete part number according to the table in the last page. Contact the factory for other requirements.
Single Output 1.5V 1.8V 2.5V 3.3V 5V 6V 7.5V 9V 12V 15V 28V
(1R5S) (1R8S) (2R5S) (3R3S) (05S) (06S) (7R5S) (09S) (12S) (15S) (28S)
MQFL-28 40A 40A 40A 30A 24A 20A 16A 13A 10A 8A 4A
16-40Vin Cont.
16-50Vin 1s Trans.*
Absolute Max Vin = 60V
MQFL-28E 40A 40A 40A 30A 24A 20A 16A 13A 10A 8A 4A
16-70Vin Cont.
16-80Vin 1s Trans.*
Absolute Max Vin =100V
MQFL-28V 40A 40A 40A 30A 20A 17A 13A 11A 8A 6.5A 3.3A
16-40Vin Cont.
5.5-50Vin 1s Trans.*
Absolute Max Vin = 60V
MQFL-28VE 40A 40A 40A 30A 24A 17A 13A 11A 8A 6.5A 4A
16-70Vin Cont.
5.5-80Vin 1s Trans.*
Absolute Max Vin = 100V
MQFL-270 40A 40A 40A 30A 24A 20A 16A 13A 10A 8A 4A
155-400Vin Cont.
155-475Vin 0.1s Trans.*
Absolute Max Vin = 550V
MQFL-270E 40A 40A 40A 30A 20A 17A 13A 11A 8A 6.5A 3.3A
130-475Vin Cont.
130-520Vin 0.1s Trans.*
Absolute Max Vin = 600V
MQFL-270L 40A 40A 30A 22A 15A 12A 10A 8A 6A 5A 2.7A
65-350Vin Cont.
65-475Vin 0.1s Trans.*
Absolute Max Vin = 550V
Dual Output 5V 12V 15V
(05D) (12D) (15D)
MQFL-28 24A Total10A Total 8A
Total
16-40Vin Cont.
16-50Vin 1s Trans.*
Absolute Max Vin = 60V
MQFL-28E 24A Total 10A Total 8A
Total
16-70Vin Cont.
16-80Vin 1s Trans.*
Absolute Max Vin =100V
MQFL-28V 20A Total 8A
Total 6.5A
Total
16-40Vin Cont.
5.5-50Vin 1s Trans.*
Absolute Max Vin = 60V
MQFL-28VE 20A Total 8A
Total 6.5A
Total
16-70Vin Cont.
5.5-80Vin 1s Trans.*
Absolute Max Vin = 100V
MQFL-270 24A Total10A Total 8A Total
155-400Vin Cont.
155-475Vin 0.1s Trans.*
Absolute Max Vin = 550V
MQFL-270E 20A Total 8A
Total 6.5A
Total
130-475Vin Cont.
130-520Vin 0.1s Trans.*
Absolute Max Vin = 600V
MQFL-270L 15A
Total 6A
Total 5A
Total
65-350Vin Cont.
65-475Vin 0.1s Trans.*
Absolute Max Vin = 550V
Triple Output 3.3V/±12V 3.3V/±15V 5V/±12V 5V/±15V 30V/±15V
(3R312T) (3R315T) (0512T) (0515T) (3015T)
MQFL-28 22A/
±1A 22A/
±0.8A 15A/
±1A 15A/
±0.8A 2.5A/
±0.8A
16-40Vin Cont.
16-50Vin 1s Trans.*
Absolute Max Vin = 60V
MQFL-28E 22A/
±1A 22A/
±0.8A 15A/
±1A 15A/
±0.8A 2.5A/
±0.8A
16-70Vin Cont.
16-80Vin 1s Trans.*
Absolute Max Vin =100V
MQFL-28V 22A/
±1A 22A/
±0.8A 15A/
±1A 15A/
±0.8A 2.5A/
±0.8A
16-40Vin Cont.
5.5-50Vin 1s Trans.*
Absolute Max Vin = 60V
MQFL-28VE 22A/
±1A 22A/
±0.8A 15A/
±1A 15A/
±0.8A 2.5A/
±0.8A
16-70Vin Cont.
5.5-80Vin 1s Trans.*
Absolute Max Vin = 100V
MQFL-270 22A/
±1A 22A/
±0.8A 15A/
±1A 15A/
±0.8A 2.5A/
±0.8A
155-400Vin Cont.
155-475Vin 0.1s Trans.*
Absolute Max Vin = 550V
MQFL-270E 22A/
±1A 22A/
±0.8A 15A/
±1A 15A/
±0.8A 2.5A/
±0.8A
130-475Vin Cont.
130-520Vin 0.1s Trans.*
Absolute Max Vin = 600V
MQFL-270L 22A/
±1A 22A/
±0.8A 15A/
±1A 15A/
±0.8A 2.5A/
±0.8A
65-350Vin Cont.
65-475Vin 0.1s Trans.*
Absolute Max Vin = 550V (75Wmax Total Output Power)
Product # MQFL-270-28S Phone 1-888-567-9596 www.synqor.com Doc.# 005-MQ2728S Rev. B 09/16/08 Page 16
Output:
Current:
28.0 V
4 A
MQFL-270-28S
Technical Specification
PART NUMBERING SYSTEM
The part numbering system for SynQor’s MilQor DC-DC converters follows the format shown in the table below.
APPLICATION NOTES
A variety of application notes and technical white papers can be downloaded in pdf format from the SynQor website.
PATENTS
SynQor holds the following patents, one or more of which might apply to this product:
5,999,417 6,222,742 6,545,890 6,577,109 6,594,159 6,731,520 6,894,468 6,896,526
6,927,987 7,050,309 7,072,190 7,085,146 7,119,524 7,269,034 7,272,021 7,272,023
Warranty
SynQor offers a two (2) year limited warranty. Complete warranty
information is listed on our website or is available upon request from
SynQor.
Information furnished by SynQor is believed to be accurate and reliable.
However, no responsibility is assumed by SynQor for its use, nor for any
infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any
patent or patent rights of SynQor.
Contact SynQor for further information:
Phone: 978-849-0600
Toll Free: 888-567-9596
Fax: 978-849-0602
E-mail: power@synqor.com
Web: www.synqor.com
Address: 155 Swanson Road
Boxborough, MA 01719
USA
†80% of total output current available on
any one output.
*Converters may be operated continuously at the highest transient input voltage, but some
component electrical and thermal stresses would be beyond MIL-HDBK-1547A guidelines.
Model
Name
Input
Voltage
Range
Output Voltage(s) Package Outline/
Pin Confi guration
Screening
Grade
Single
Output Dual
Output Triple
Output
MQFL
28
28E
28V
28VE
270
270E
270L
1R5S
1R8S
2R5S
3R3S
05S
06S
7R5S
09S
12S
15S
28S
05D
12D
15D
3R312T
3R315T
0512T
0515T
3015T
X
Y
W
Z
B
C
ES
HB
MilQor MQFL FAMILY MATRIX
The tables below show the array of MQFL converters available. When ordering SynQor converters, please ensure that you use
the complete part number according to the table in the last page. Contact the factory for other requirements.
Single Output 1.5V 1.8V 2.5V 3.3V 5V 6V 7.5V 9V 12V 15V 28V
(1R5S) (1R8S) (2R5S) (3R3S) (05S) (06S) (7R5S) (09S) (12S) (15S) (28S)
MQFL-28 40A 40A 40A 30A 24A 20A 16A 13A 10A 8A 4A
16-40Vin Cont.
16-50Vin 1s Trans.*
Absolute Max Vin = 60V
MQFL-28E 40A 40A 40A 30A 24A 20A 16A 13A 10A 8A 4A
16-70Vin Cont.
16-80Vin 1s Trans.*
Absolute Max Vin =100V
MQFL-28V 40A 40A 40A 30A 20A 17A 13A 11A 8A 6.5A 3.3A
16-40Vin Cont.
5.5-50Vin 1s Trans.*
Absolute Max Vin = 60V
MQFL-28VE 40A 40A 40A 30A 24A 17A 13A 11A 8A 6.5A 4A
16-70Vin Cont.
5.5-80Vin 1s Trans.*
Absolute Max Vin = 100V
MQFL-270 40A 40A 40A 30A 24A 20A 16A 13A 10A 8A 4A
155-400Vin Cont.
155-475Vin 0.1s Trans.*
Absolute Max Vin = 550V
MQFL-270E 40A 40A 40A 30A 20A 17A 13A 11A 8A 6.5A 3.3A
130-475Vin Cont.
130-520Vin 0.1s Trans.*
Absolute Max Vin = 600V
MQFL-270L 40A 40A 30A 22A 15A 12A 10A 8A 6A 5A 2.7A
65-350Vin Cont.
65-475Vin 0.1s Trans.*
Absolute Max Vin = 550V
Dual Output 5V 12V 15V
(05D) (12D) (15D)
MQFL-28 24A Total10A Total 8A
Total
16-40Vin Cont.
16-50Vin 1s Trans.*
Absolute Max Vin = 60V
MQFL-28E 24A Total 10A Total 8A
Total
16-70Vin Cont.
16-80Vin 1s Trans.*
Absolute Max Vin =100V
MQFL-28V 20A Total 8A
Total 6.5A
Total
16-40Vin Cont.
5.5-50Vin 1s Trans.*
Absolute Max Vin = 60V
MQFL-28VE 20A Total 8A
Total 6.5A
Total
16-70Vin Cont.
5.5-80Vin 1s Trans.*
Absolute Max Vin = 100V
MQFL-270 24A Total10A Total 8A Total
155-400Vin Cont.
155-475Vin 0.1s Trans.*
Absolute Max Vin = 550V
MQFL-270E 20A Total 8A
Total 6.5A
Total
130-475Vin Cont.
130-520Vin 0.1s Trans.*
Absolute Max Vin = 600V
MQFL-270L 15A
Total 6A
Total 5A
Total
65-350Vin Cont.
65-475Vin 0.1s Trans.*
Absolute Max Vin = 550V
Triple Output 3.3V/±12V 3.3V/±15V 5V/±12V 5V/±15V 30V/±15V
(3R312T) (3R315T) (0512T) (0515T) (3015T)
MQFL-28 22A/
±1A 22A/
±0.8A 15A/
±1A 15A/
±0.8A 2.5A/
±0.8A
16-40Vin Cont.
16-50Vin 1s Trans.*
Absolute Max Vin = 60V
MQFL-28E 22A/
±1A 22A/
±0.8A 15A/
±1A 15A/
±0.8A 2.5A/
±0.8A
16-70Vin Cont.
16-80Vin 1s Trans.*
Absolute Max Vin =100V
MQFL-28V 22A/
±1A 22A/
±0.8A 15A/
±1A 15A/
±0.8A 2.5A/
±0.8A
16-40Vin Cont.
5.5-50Vin 1s Trans.*
Absolute Max Vin = 60V
MQFL-28VE 22A/
±1A 22A/
±0.8A 15A/
±1A 15A/
±0.8A 2.5A/
±0.8A
16-70Vin Cont.
5.5-80Vin 1s Trans.*
Absolute Max Vin = 100V
MQFL-270 22A/
±1A 22A/
±0.8A 15A/
±1A 15A/
±0.8A 2.5A/
±0.8A
155-400Vin Cont.
155-475Vin 0.1s Trans.*
Absolute Max Vin = 550V
MQFL-270E 22A/
±1A 22A/
±0.8A 15A/
±1A 15A/
±0.8A 2.5A/
±0.8A
130-475Vin Cont.
130-520Vin 0.1s Trans.*
Absolute Max Vin = 600V
MQFL-270L 22A/
±1A 22A/
±0.8A 15A/
±1A 15A/
±0.8A 2.5A/
±0.8A
65-350Vin Cont.
65-475Vin 0.1s Trans.*
Absolute Max Vin = 550V (75Wmax Total Output Power)
Example: MQFL – 270 – 28S – Y – ES