LH53V32500
FEATURES
•• 4,194 ,304 w ords × 8 bit o rganizatio n
(Byte mo de)
2,097 ,152 w ords × 16 b it orga niza tion
(Word mod e)
•• Access time: 150 n s (MAX.)
•• Powe r consu mption :
Ope rating : 126 mW (MAX.)
Stan db y: 108 µW (MAX.)
•• Static operation
•• Th ree-state o utputs
•• Low pow er supp ly: 2 .7 V to 3 .6 V
•• Packages:
4 4-pi n , 600 -mil SOP
4 8-pi n , 12 × 18 mm2 TSOP (Type I )
DESCRIPTION
The LH53V32500 is a 32M-bit mask-programmable
R OM organized a s 4 ,194,304 × 8 bi ts (By te mode) or
2,097,152 × 16 bits (Word mode) that can be selected
by a BYTE input pin. It is fabricated using silicon-gate
C MOS p ro cess technolog y.
PIN CONNECTIONS
53V32500-1
TOP VIEW
2
3
4
5
8
9A2
A5 39
38
37
36
35
34
31
28
A7
A6 6
7
A3
A4
33
32
A10
A11
A13
A15
BYTE
GND
D14
10
11
12
41
40
A9
A1
13
30
D15/A-1 (LSB)
29
D7
OE
A0
CE
A12
44-PIN SOP
14
15
16
17
18
19
20
21 25
27
26
24
23
D13
D5
D12
D4
D2
D10
D9
GND
D8
D1
D0
D3
D11 VCC
A8
A14
A16
D6
42
1
A18
NC
22
44
43
A17
A19
A20
Figure 1. Pin Connections f or SO P Package
CMOS 32M (4M × 8/2 M × 16 )
3 V-Drive Mask-Programmable ROM
5-330
53V32500-2
TOP VIEW
2
3
4
5
8
9
A
10
A
13
45
44
43
42
41
40
37
34
A
15
A
14
6
7
A
11
A
12
39
38
D
7
D
3
10
11
12
47
46 D
15
/A
-1
A
9
13 36
35
A
8
48-PIN TSOP (Type I)
14
15
16
17
18
19
20
21
31
28
33
32
30
29
D
2
D
9
D
1
D
8
OE
D
10
GND
48
1
A
16
BYTE
22 27
D
0
GND
23 26
V
CC
24 25
GND
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
CE
GND
D
14
D
13
D
5
D
12
D
4
D
6
V
CC
GND
D
11
GND
A
19
A
20
A
18
A
17
NOTE: Reverse bend available on request.
Fi gur e 2. Pin Connecti ons for TSO P Package
CMOS 32M Mask-Programmable ROM L H53V32500
5-331
NOTE:
1. The D15/A–1 p in becomes LSB address i nput (A–1) when t he B YT E pin is set to be LOW in byte m ode, and data output (D15) when set t o
be HIG H in word m ode.
53V32500-3
A
3
A
2
A
1
A
12
A
11
A
10
A
9
A
8
31
38
39
40
41
5
8
9
10
A
7
A
6
V
CC
A
4
MEMORY
MATRIX
(4,194,302 x 8)
(2,097,152 x 16)
SENSE AMPLIFIER
4
GND
7
42
A
5
6
A
13
37
ADDRESS BUFFER
A
0
11
ADDRESS DECODER
COLUMN SELECTOR
CE
BUFFER
A
14
36
A
15
35
12 TIMING
GENERATOR
A
16
34
A
-1
D
3
D
2
D
1
D
12
D
11
D
10
D
9
D
8
D
7
D
6
D
4
D
5
D
13
D
0
D
14
D
15
DATA SELECTOR/OUTPUT BUFFER
23 32
OE
BUFFER
ADDRESS
BUFFER
BYTE/WORD
SWITCHOVER
CIRCUIT
33
OE
CE
BYTE
22
20
18
16
26
19
17
15
21
30
24
25
27
29
31
14
A
17
3
A
19
43
28
A
18
2
13
A
20
44
NOTE: Pin numbers apply to the 44-pin SOP.
Figure 3. LH53V32500 Block Diagram
PIN DESCRIP TI ON
SIG NA L PIN N AM E NO TE
A–1 – A20 A ddr ess in put 1
D0 – D15 D ata ou tput 1
BYTE B yte /wo rd m ode sw itc h 1
CE C hip En abl e i npu t
SI G NA L P IN N AM E NO TE
OE Ou tpu t E nab le inp ut
VCC Po wer su ppl y ( 2.7 V t o 3 .6 V)
GND Ground
NC No co nne cti on
LH 53V325 00 CM OS 32M Mask-Programmable ROM
5-332
53V32500-4
A
3
A
2
A
1
A
12
A
11
A
10
A
9
A
8
46
6
7
8
9
17
20
21
22
A
7
A
6
V
CC
A
4
MEMORY
MATRIX
(4,194,302 x 8)
(2,097,152 x 16)
SENSE AMPLIFIER
16
GND
19
10
A
5
18
A
13
5
ADDRESS BUFFER
A
0
23
ADDRESS DECODER
COLUMN SELECTOR
CE
BUFFER
A
14
4
A
15
3
24 TIMING
GENERATOR
A
16
2
A
-1
D
3
D
2
D
1
D
12
D
11
D
10
D
9
D
8
D
7
D
6
D
4
D
5
D
13
D
0
D
14
D
15
DATA SELECTOR/OUTPUT BUFFER
38 25
OE
BUFFER
ADDRESS
BUFFER
BYTE/WORD
SWITCHOVER
CIRCUIT
1
OE
CE
BYTE
35
33
31
29
41
32
30
28
34
45
39
40
42
44
46
27
A
17
15
A
19
11
43
A
18
14
12
A
20
13
26 36 47 4837
NOTE: Pin numbers apply to the 48-pin TSOP (Type I).
Figure 4. LH53V32500 Block Diagram
CMOS 32M Mask-Programmable ROM L H53V32500
5-333
TRUT H TABLE
CE OE BYTE A–1
(D15)DATA OUTPUT ADDRESS INPUT SUPPLY
CURRENT
D0 – D 7D8 – D15 LSB MSB
H X X X High-Z High-Z – – Standby (ISB)
L H X X High-Z High-Z – – Operating (ICC)
LL H – D
0
– D7D8 - D15 A0A20 Operating (ICC)
LL L L D
0
– D7High-Z A–1 A20 Operating (ICC)
LL L H D
8 – D15 High-Z A–1 A20 Operating (ICC)
NOTE:
X = H or L; High-Z = High- impedance
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL RATING UNIT
Sup pl y v olt age VCC –0.3 to +4.6 V
Input voltage VIN –0.3 to VCC + 0.3 V
Out put vo lta ge VOUT –0.3 to VCC + 0.3 V
Operating temperature Topr 0 to +70 °C
Sto rag e t emp era ture Tstg –65 to +150 °C
RECOMM E NDED OPERATING CO N DITIO NS (TA = 0°C to +70°C)
PARAMETER SYMBOL MIN. TYP. MAX. UNIT
Sup pl y v olt age VCC 2.7 3.6 V
DC CHARACTERIS TICS (VCC = 2.7 V to 3.6 V, TA = 0°C to +70°C)
PARAMETER SYMBOL CONDITIONS MIN. MAX. UNIT NOTE
Input ‘High’ voltage VIH 0.7 VCC VCC +0.3 V
Input ‘Low’ voltage VIL –0.3 0.2 VCC V
Out put ‘H igh ’ vol tag e VOH IOH = –400 µAV
CC – 0.4 V V
Out put ‘L ow’ v olt age VOL IOL = 1 .6 mA 0.4 V
Input leakage current | ILI |V
IN = 0 V to VCC 5µA
Out put le aka ge cur ren t | ILO |V
OUT = 0 V to VCC 5µA1
Ope rat ing cu rre nt ICC1 tRC = 15 0 n s 35 mA 2
Sta ndb y c urr ent ISB1 CE = VIH 1mA
I
SB2 CE = VCC – 0.2 V 30 µA
Input capacitance CIN f = 1 MHz
TA = 25°C10 pF
Out put ca pac ita nce COUT 10 pF
NOTES:
1. CE/OE = V IH
2. VIN = VIH or VIL, CE = VIL, outputs ope n
LH 53V32500 C MOS 32M Mask-Programmable ROM
5-334
AC CHARACTERIS TICS (VCC = 2.7 V to 3.6 V, TA = 0°C to +70°C)
PARAMETER SYMBOL MIN. MAX. UNIT NOTE
Rea d c yc le t ime tRC 150 ns
Add res s a cc ess ti me tAA 150 ns
Chi p e nab le acc es s ti me tACE 150 ns
Out put en abl e d ela y t ime tOE 70 ns
Out put ho ld time tOH 5ns
CE to out put in Hig h-Z tCHZ 60 ns 1
OE to out put in Hig h-Z tOHZ 60 ns
NOTE:
1. T his is t he time re quired f or t he outputs to become high-impedance.
AC TEST CON DITIONS
PARAMETER RATING
Input voltage amplitude 0.2 V to 0.7 V
Input rise/fall time 10 ns
Input reference level 1.4 V
Out put re fere nc e le ve l 1.4 V
Output load condition 1TTL + 100 pF
CAUTION
To stabi li ze the pow e r suppl y, i t is recommended that a high-frequency byp ass capaci tor be connecte d betwe en
the VCC pin and the GND pi n.
CMOS 32M Mask-Programmable ROM L H53V32500
5-335
t
OE
D
0
- D
7
t
OHZ
t
CHZ
t
RC
CE
t
OH
DATA VALID
t
ACE
t
AA 
OE
A
-1
- A
20
NOTE: The output data becomes valid when the last
intervals, t
AA
, t
ACE
, or t
OE
,
have concluded.
(NOTE)
(NOTE)
(NOTE)
53V32500-5
Figure 5. Byte M o de (BYTE = VIL)
t
OE
D
0
- D
15
t
OHZ
t
CHZ
t
RC
CE
t
OH
DATA VALID
t
ACE
t
AA 
OE
A
0
- A
20
NOTE: The output data becomes valid when the last
intervals, t
AA
, t
ACE
, or t
OE
,
have concluded.
53V32500-6
(NOTE)
(NOTE)
(NOTE)
Figure 6. Word M od e ( BYTE = VIH)
LH 53V325 00 CMOS 32M Mask-Programmable ROM
5-336
PACKAGE DIAGRAMS
DIMENSIONS IN MM [INCHES] MAXIMUM LIMIT
MINIMUM LIMIT
44SOP (SOP044-P-0600)
16.40 [0.646]
15.60 [0.614]
13.40 [0.528]
13.00 [0.512] 14.40 [0.567]
28.40 [1.118]
28.00 [1.102]
0.15 [0.006]
1.275 [0.050]
0.25 [0.010]
0.05 [0.002]
1.275 [0.050]
2.9 [0.114]
2.5 [0.098]
0.20 [0.008]
0.10 [0.004]
0.50 [0.020]
0.30 [0.012]
1.27 [0.050]
TYP.
44 23
221
3.25 [0.128]
2.45 [0.096]
44SOP
2.9 [0.114]
2.5 [0.098]
1.275 [0.050]
0.25 [0.010]
0.05 [0.002]
0.80 [0.031]
0 - 10°
SEE
DETAIL
DETAIL
44-pin, 600-mil S OP
CMOS 32M Mask-Programmable ROM L H53V32500
5-337
N 44-pin, 600-mil SOP (SOP044-P-0600)
T 48-pin, 12 x 18 mm
2
TSOP (Type I) (TSOP048-P-1218)
TR 48-pin, 12 x 18 mm
2
TSOP (Type I) Reverse bend (TSOP048-P-1218) 
LH53V32500
Device Type X
Package
53V32500-7
Example: LH53V32500N (CMOS 32M (4M x 8 or 2M x 16) Mask-Programmable ROM,
Low-Voltage Operation, 44-pin, 600-mil SOP)
CMOS 32M (4M x 8 or 2M x 16) Mask-Programmable ROM,
Low-Voltage Operation
ORDERIN G INFOR MATION
DIMENSIONS IN MM [INCHES] MAXIMUM LIMIT
MINIMUM LIMIT
48TSOP (TSOP048-P-1218)
18.40 [0.724]
17.60 [0.693]
16.60 [0.654]
16.20 [0.638] 17.00 [0.669]
12.20 [0.480]
11.80 [0.465] 0.15 [0.006]
0.425 [0.017]
0.20 [0.008]
0.00 [0.000]
1.20 [0.047]
MAX.
1.10 [0.043]
0.90 [0.035]
0.20 [0.008]
0.10 [0.004]
0.30 [0.012]
0.10 [0.004]
48 25
241
0.425 [0.017]
48TSOP
0.50 [0.020]
TYP.
48-pin, 12 × 18 mm2 TSOP (Type I)
LH53V32500 CMOS 32M Mask-Programmable ROM
5-338