Evaluates: MAX3535E
MAX3535E Evaluation Kit
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Quick Start
Required Equipment
• One 5V, 1A current-limited power supply with built-in
current meter
• One voltmeter
• One logic signal generator
• One oscilloscope
Procedure
The MAX3535E EV kit is fully assembled and tested.
Follow the steps below to verify board operation.
Caution: Do not turn on the power supply until all con-
nections are completed.
1) Connect a voltmeter to the VCC2 and SGND PC
pads.
2) Verify that a shunt is installed across pins 2-3 of
jumper JU1 (receiver enabled).
3) Verify that a shunt is not installed across the pins of
jumper JU2 (fast slew rate).
4) Verify that a shunt is installed across the pins of
jumpers JU3 and JU4 (half duplex).
5) Connect the +5V power supply to the VCC1 pad.
Connect the power supply’s ground to the GND
pad.
6) Turn on the power supply and verify that the volt-
meter at VCC2 reads over +5V.
7) Apply a logic signal to the DI PCB pad and GND.
Using an oscilloscope, verify the signal at the A-B,
RO2, and RO1 output pads.
The +5V supply powering the MAX3535E EV kit must
be current limited at 1A.
Detailed Description
The EV kit features a MAX3535E IC in a 28-pin wide SO
surface-mount package and demonstrates the
MAX3535E 2500VRMS isolated RS-485/RS-422 trans-
ceiver with ESD protection. The circuit’s differential dri-
ver and receiver are configurable for full- or half-duplex
operation and can communicate up to 1000kbps. The
circuit is a 1/8 unit load on the receiver’s bus.
The EV kit features PCB pads to ease interfacing with
logic signals for the driver and receiver signals. On the
nonisolated side, the DI pad is the driver input pad and
the RO1 pad is the receiver-signal output pad. Resistor
R3 pulls the DI pad up to VCC1, and resistor R4 pulls
the DE pad up to VCC1. On the isolated side, the RO2
pad is the receiver output.
The MAX3535E fail-safe circuitry signals are also provid-
ed on the RO1 (receiver output) and RO2 (isolated receiv-
er output) PC pads. Either pad gives a logic-high if A-B is
> -10mV, or if A-B floats or shorts. A logic-low is given if
A-B is < -200mV. Refer to the
Fail Safe
section and
Table
3
in the MAX3535E IC data sheet for additional informa-
tion on the fail-safe circuitry and operation.
The circuit’s input power is typically a +5VDC source,
or is operated from a +3V to +5.5VDC source with a
corresponding reduction in the output voltage on the
isolated side. The EV kit circuit’s DC source must pro-
vide at least 350mA of current, but can also be operat-
ed at lower voltages consistent with the UVLO limit.
The MAX3535E integrates a primary-side controller and
H-bridge drivers. The device contains an on-board
oscillator, protection circuitry, and internal FET drivers
to provide up to 500mW of power to the primary of
transformer T1.
The MAX3535E driver slew rate is reconfigured using
jumper JU2 on the EV kit. The slew rate can be config-
ured for 400kbps (slow) operation to minimize EMI radi-
ation or 1000kbps (fast). See the
Slew-Rate Selection
section for configuring the slew rate.
The circuit’s H-bridge DC-DC converter powers the
MAX3535E isolated section of the circuit. One of the
benefits of the easy-to-use H-bridge DC-DC converter
topology is minimized input ripple current, and radiated
noise by the inherent balanced nature of the design,
with no interruption in the input current. UVLO and ther-
mal shutdown provide for a robust isolated supply.
Thermal-shutdown circuitry provides additional protec-
tion against damage due to overtemperature condi-
tions. The MAX3535E IC’s UVLO provides controlled
turn-on while powering up and during brownouts.
The surface-mount transformer provides up to
2500VRMS galvanic isolation and the output is powered
from a center-tapped, full-wave rectifier circuit to
reduce output voltage ripple. The isolated H-bridge
DC-DC converter operation at 420kHz allows the use of
ceramic-only output capacitors and a small trans-
former. The switching-frequency duty cycle is fixed at
50% to control energy transfer to the isolated output
and to prevent DC current flow in the transformer.
The PCB is designed for 2500V isolation with 300 mils
spacing between the GND and SGND planes. Test
points TP1 (GND) and TP2 (SGND) are provided on the
PCB for probing the respective ground plane, or to con-
nect the GND to SGND planes for nonisolated evalua-
tion of the circuit.