L9638 LIN BUS TRANSCEIVER 1 FEATURES Single-wire transceiver for LIN-protocol Transmission rate up to 20 kbaud Operating power supply voltage range 6V Vs 26V (40V for transients) Low quiescent current in sleep mode (typ.10A) Wake-up through LIN-bus, Enable input (from C CMOS compatible) or Wake-up input (edge driven) SO-8 Table 1. Order Codes Part Number Package L9638D SO-8 L9638D013TR Tape & Reel Wide input and output range -24V VLIN Vs Integrated pull/down/up resistors for LIN, TxD, RxD, EN, INH 2 Inhibit output with low resistance (<40) versus Vs and short circuit protection CMOS compatible TxD, RxD Interface The L9638 is a monolithic integrated circuit for LIN-bus interface function between the protocol handler in the controller and the physical bus in automotive applications. EMI robustness optimised Thermal shutdown and LIN short circuit protection DESCRIPTION As well as it can be used in standard ISO 9141 systems. Figure 1. Block Diagram VS Int.5V RxD Internal Voltage Regulator VS_D LIN Glitch Filter TxD VS_D EN Control Logic INH Protection WUP Glitch Filter October 2004 GND Rev. 4 1/14 L9638 Table 2. Pin Description Pin No. Pin Name Function 1 RxD Receive data Output 2 EN Enable Input Digital control signal for low power modes 3 WUP Wake-Up Input Local wake-up from sleep mode sensitive to positive and negative edges 4 TxD Transmit data Input 5 GND Ground 6 LIN Bidirectional I/O 7 Vs Supply voltage 8 INH Inhibit Output, battery related high side switch for controlling external Voltage Regulator Figure 2. Pin Connection RxD 1 8 INH EN 2 7 Vs WUP 3 6 LIN TxD 4 5 GND D04AT514 Table 3. Absolute Maximum Ratings Symbol Value Unit Supply Voltage -0.3 to 40 V VLIM Pin Voltage -24 to 40 V VINH ,WUP Pin Voltage -0.3 to 40 V VRxD ,TxD, EN Pin Voltage -0.3 to 6 V VS VESD Parameter HBM: all pins withstand 2KV; pin 6 (LIN) is able to withstand 8kV versus GND and +8/-5kV versus VS Table 4. Thermal Data Symbol TJ_OP Rth j-amb TJ_SD Tstg 2/14 Parameter Operating junction temperature Thermal steady state junction to ambient resistance Thermal shutdown temperature Storage temperature Value Unit -40 to150 C 145 K/W 170 20 C -55 to 150 C L9638 Table 5. Electrical Characteristics (VS = 6V to 26V; TJ = -40 to 150 C unless otherwise specified) Item 1 Symbol Parameter Test Condition Min. Typ. Max. Unit 26 V 10 30 A 150 500 1700 A Supplies 1.1 VS 1.2 ISleep Supply Vs Curent in sleep mode VEN = VEN low 1.3 IShort Supply Vs Curent with bus short circuit VEN = VEN low 1.4 IDStand-by Supply Vs Current in Stand- VLIN = VLINHigh by Mode with bus recessive VEN = VENLow VTxD = VTxDHigh 30 100 200 A 1.5 IDStand-by Supply Vs Current in Stand- VLIN = VLINLow by Mode with bus dominant VEN = VENLow (Receive only Mode) 0.5 1.1 2.5 mA 1.6 IsNormal Supply Vs Current in Normal Mode with bus recessive VEN = VENHigh VLIN = VLINHigh VTxD = VTxDHigh 300 500 700 A 1.7 IsNormal Supply Vs Current in Normal Mode with bus dominant VEN = VENHigh VLIN = VLINLow VTxD = VTxDLow 0.9 1.8 3.5 mA 2 Supply Voltage 6 LIN Bus Interface 2.1 VBUSDom Receive Threshold Voltage recessive to dominant state VLIN<18V 0.4 0.45 0.5 Vs 2.2 VBUSRec Receive Threshold Voltage dominant to recessive state VLIN 8V 0.5 0.55 0.6 Vs 2.3 VHYS Receive Threshold Hysteresis VBUSRec-VBUSDom 0.05 0.1 0.17 Vs 2.4 VBUScnt Tolerance centre value of Receiver (VBUSRec+VBUSDom)/2 0.475 0.5 0.525 Vs 2.5 ILINON Input Current dominant state VTxD = VTxDLow VLIN = VS 40 100 160 mA 2.5.1 ILINOff Input Current recessive state VTxD = VTxDHigh VLIN = Vs -10 10 A 2.5.2 ILINOff Input Current recessive state VTxD = VTxDHigh; VS = 12V; VLIN = 0V (Bus dominant ) -1 2.6 VLINDom Drive Voltage dominant state VTxD = VTxDLow ILIN = 40mA 2.7 RLIN Output pull up resistor 2.8 fLIN-RxD Transmission Frequency RVs-LIN =1100 CLIN-GND =10nF 20 2.9 dVLIN/dt Slew rate rising edge From 10% to 90% of VLIN 1 20 mA 30 1.2 V 47 k kHz 2 3 V/s 3/14 L9638 Table 5. Electrical Characteristics (continued) (VS = 6V to 26V; TJ = -40 to 150 C unless otherwise specified) Item Symbol 2.10 dVLIN/dt 2.11 Parameter Test Condition Min. Typ. Max. Unit -2 -1 V/s -5 s Slew rate falling edge From 90% to 10% of VLIN -3 tsym Rising/ Falling edge symmetry tsym= tslope_fall - tslope_rise -5 2.12 ttrans_pd Propagation delay of transmitter See Fig.2 ttrans_pd = max (ttrans_pdr, trans_pdf) 4 s 2.13 trec_pd Propagation delay of receiver See Fig.2 trec_pd = max (trec_pdr, trec_pdf) 6 s 2.14 trec_sym Symmetry of receiver propagation delay rising edge w.r.t. falling edge See Fig.2 trec_sym= (trec_pdf -trec_pdr) -2 2 s 2.15 ttrans_sym Symmetry of transmitter propagation delay rising edge w.r.t. falling edge See Fig.2 ttrans_sym = (ttrans_pdf -ttrans_pdr) -2 2 s 2.16 tLINgs Bus wake-up glitch suppression time See Fig.3 VLIN = VLINLow 100 s 1.5 V 3 Transmission Input TxD 3.1 VTxDLow Input Voltage dominant state 3.2 VTxDHigh Input Voltage recessive state 3.3 RTxD 4 3.5 TxD pull up resistor 5 VRxDLow Output Voltage dominant state IRxD = 2mA 4.2 VRxDHigh Output Voltage recessive state IRxD10A 4.3 RRxD RxD pull up resistor 25 K 1.5 V V 10 25 k 20 40 15 30 50 mA 5 10 25 k 1.5 V Vs+0. 3 V Inhibit Output INH RON(INH) Switch on resistance between Vs and INH IINH=-15mA; Vs=13.5V 5.2 ION(INH) INH output current Normal or stand-by mode 5.3 ROFF(INH) Switch off INH pull down resistor Wake Up Input WUP 6.1 VWUPLow Low level input voltage 6.2 VWUPHigh High level input voltage 4/14 10 4.5 5 5.1 6 V Receive Output RxD 4.1 5 40 3.5 L9638 Table 5. Electrical Characteristics (continued) (VS = 6V to 26V; TJ = -40 to 150 C unless otherwise specified) Item Symbol 6.3 tWUPgs 7 Parameter Min. Remote wake-up delay time Transitioning on WUP VENLow Low level input voltage 7.2 VENHigh High level input voltage 7.3 REN EN pull down resistor 7.4 tgts Go to sleep delay time 7.5 tENgs EN wake-up glitch suppression time 5 40 100 s 1.5 V V 25 K VEN = VENlow 40 100 s VEN = VENhigh 40 100 s AC Timing Parameters Duty Cycle 1 THRec(max) = 0.744 x VSUP; THDom(max) = 0.581 x VSUP; Vsup = 7.0 to 18V; tbit = 50s; D1 = tBus_rec(min)/2 x tBit (CBUS; RBUS) 1nF; 1k/6.8nF; 660/10nF; 500 8.2 D2 Duty Cycle 2 THRec(min) = 0.284 x VSUP; THDom(min) = 0.422 x VSUP; Vsup = 7.6 to 18V; tbit = 50s; D2 = tBus_rec(min)/2 x tBit (CBUS; RBUS) 1nF; 1k/6.8nF; 660/10nF; 500 8.3 D3 Duty Cycle 3 THRec(max) = 0.778 x VSUP; THDom(max) = 0.616 x VSUP; Vsup = 7.0 to 18V; tbit = 96s; D3 = tBus_rec(min)/2 x tBit (CBUS; RBUS) 1nF; 1k/6.8nF; 660/10nF; 500 8.4 D4 Duty Cycle 4 THRec(min) = 0.251 x VSUP; THDom(min) = 0.389 x VSUP; Vsup = 7.6 to 18V; tbit = 96s; D4 = tBus_rec(min)/2 x tBit (CBUS; RBUS) 1nF; 1k/6.8nF; 660/10nF; 500 9.2 Unit 10 D1 9.1 Max. 3.5 8.1 9 Typ. Enable Input EN 7.1 8 Test Condition 0.396 0.581 0.417 0.591 Fault Conditions ILIN_NO_GND ILIN_NO_Vs -1 LIN current with GND disconnected GND = Vs = 12V 0V< VLIM < 18V LIN current with VS grounded V = GND, 0V < VLIN < 18V 1 mA 100 A (1) (1) Note: 1. Room temperature evaluated - no 100% tested 5/14 L9638 3 TIMING DIAGRAM Figure 3. Definition of Bus Timing Parameters 6/14 L9638 Figure 4. Typical Bus Timing VTxD t ttrans_pdf ttrans_pdr VLIN 90% Receive Recessive Threshold Receive Dominant Threshold 10% t trec_pdr trec_pdf VRxD t Figure 5. Typical Wake-up Timing VLIN t t<tLINgs gstLIN VRxD t VINH t 7/14 L9638 4 FUNCTIONAL DESCRIPTION The L9638 is a monolithic bus driver designed to provide bidirectional serial communication in Local Interconnect Network (LIN). In addition to the integrated physical layer (specified in LIN specification rev. 2.0), further control in- and output functions simplify various system requirements like controlled power saving modes or additional external wake up capability. 4.1 Operating modes There are four possible modes of operation: normal, standby, sleep and short circuit. The transitions between the various operation modes are described in the diagram. 4.2 Standby mode This mode is reached after power up the system or due to a received wake-up condition from sleep mode. The device is able to receive at RxD, but could not transmit any data. This prevents the disturbance of the LIN bus line due to a not correctly working C. Entering the standby mode, the INH output will set to HIGH by simultaneous switching off the internal pull down resistor to reduce the current consumption. This allows the control of connected power supply devices. Therefore for systems, that will be controlled only by the LIN bus line (particular ECUs, that works as slave node) a power management can easy build up on that function. It is recommended to power up the system before the communication will start, otherwise additional delay times have to be regarded. Because of integrated filtering of external WUP input, the INH output can alternatively be used to simplify a software filtering procedure to detect an external edge sensitive signal by connecting INH versus a series resistor to an interrupt capable input of the C. 4.3 Normal mode This mode can only be reached from standby or sleep mode by setting the EN input to HIGH. Transmission and receiving of data stream via the LIN line is possible. An integrated pull up resistor in series with a diode at LIN provides either required recessive state (HIGH) as well as a protection against reverse power supply. In master node application, a LOW ohmic resistor in series with a diode has to be connected externally between LIN and battery to allow the maximum transmission rate. The receiver converts the battery supply related signal at LIN to a logic supply compatible output at RxD. Integrated filter in addition with the supply voltage related threshold and hysteresis provide optimal noise suppression. The transmitter shifts the logic supply related data stream at TxD to battery level at LIN. A read back function is possible by evaluating the mirrored state from the LIN line at the output RxD. 4.4 Short circuit mode The L9638 provides a special operation mode for shorted LIN bus lines to ground. In that case, the whole LIN network is blocked. If the protocol handler in the C detects a "time out" condition, that could be unambiguously identified as a short to ground condition in the bus line, the whole LIN node could be disconnected from the network by setting EN input to LOW. This will switch INH output from active HIGH to LOW. Additionally RxD output, that remains in the dominant state and maybe block the C will set to HIGH ohmic state. The L9638 won't accept any transition at TxD. This short circuit mode will be stable until the dominant state on LIN will be cleared. In that case, the device will switch to the sleep mode. According to that, the current consumption of a blocked LIN network will be reduced to the resulting short circuit current in the LIN line. Especially for sporadically happening shorts due to damaged cable isolation, the LIN network will be automatically reset. Therefore no special power up procedure is required. 8/14 L9638 4.5 Sleep mode This mode allows the lowest current consumption of the transceiver. It'll be reached either by setting the EN input to LOW (assuming no occurring wake-up event) while being in the normal mode or in case of a removed short to ground at LIN while being in the short circuit mode. The INH output will be switched from HIGH to LOW. A further transmission via TxD is prevented. The device is waiting on any wake-up requests either by LIN (dominant level) or WUP (rising or falling edge). This will set the device from sleep mode to standby mode. An implemented filter prevents unwished wake-ups due to occurring glitches or EMI at LIN or WUP. 4.6 Wake-up The L9638 provides several wake-up conditions from sleep mode: - Remote wake-up by a dominant level at LIN - Local wake-up by a falling or rising edge at WUP - Mode change by setting EN to HIGH The INH output will be set from LOW to HIGH after each kind of valid wake-up conditions. For remote wake-up via LIN, RxD will be activated and set as well to a dominant state. This allows fast reaction for powered C with connected interrupt capable receive inputs. 4.7 Fail-safe features To prevent possible states, that will block the communication line in case of a failed C operation, the L9638 has implemented some special fail-safe features: - After detected a clear short to ground state at the LIN pin by the protocol handler in the C, the transceiver or the complete power supply of the ECU control logic could be switched off by setting the EN input from HIGH to LOW. The device will stay in that special short circuit mode until the state of the LIN bus will switch back from dominant to recessive. No power up or special reset procedures are required to clear that fail-safe state. L9638 could be reactivated with the usual wake-up signals. - The TxD and EN inputs support default recessive bus states by internal pull up or down sources - The output stage of the transmitter is current limited to protect against a shorten LIN to battery - A thermal shutdown protects the device against over temperature caused destruction. In case of a permanent overload condition, the output stage will be switched off after reaching the shut down temperature and reactivated after cooling down to the switch on temperature. - Defined output status in under voltage, loss of Vs or GND condition with no impact to the bus line or the connected C 9/14 L9638 Figure 6. State Diagram NORMAL EN TxD RxD WUP LIN EN INH 1 Vs TX mode 0 1 1 float 1 1 Vs RX mode 1 0 float 0 1 Vs 1 1 float 1 1 Vs 0 float 0 Power -up EN EN STANDBY (with LIN=1) if t (EN=0 after ->0) 1 >t gts and no wake up event (with LIN=0) if t(EN=0 after ->0) 1 >t gts TxD RxD WUP LIN EN INH float 0 float 0 0 Vs float 1 float 1 0 Vs SHORT CIRCUIT TxD RxD WUP LIN HiZ HiZ X 0 EN INH 0 0 LIN EN if (LIN=1) if t(EN=1 after ->1) 0 >t ENgs SLEEP TxD RxD WUP LIN EN INH 0 0 if t (LIN=0 after ->0) 1 >t LINgs W UP W UP HiZ HiZ X 1 t delay=t W UPgs X 10/14 don't care, input signal is stable high or low HiZ internal pull up is switched off; TxD input signal may be high or low or transitioning RxD output signal is high impedance. float input signal may be high or low or transitioning L9638 Figure 7. Typical Application Circuit VS VBAT CS RS RLIN EXTERNAL SWITCH 3 WUP VS 8 4 CTR EN RES VCR GND 2 WD Vo VCW 6 WD 7 5 C VCC CO RES RXD TXD GND EN 1 4 2 RXD TXD EN L9638D 3 L4979D 1 VS 7 GND LIN LIN 6 BUS CLIN INH 8 5 CTW Suggested Values CS =100 nF CTW = 47 nF CLIN_MASTER = 1 nF RS = 100 k CTR = 1 nF CO = 10 F CLIN_SLAVE = 220 pF RLIN = 1 k 11/14 L9638 mm inch DIM. MIN. TYP. MAX. MIN. TYP. MAX. A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 A2 1.10 1.65 0.043 0.065 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D (1) 4.80 5.00 0.189 0.197 E 3.80 4.00 0.15 0.157 e 1.27 0.050 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 k ddd Note: OUTLINE AND MECHANICAL DATA 0 (min.), 8 (max.) 0.10 0.004 (1) Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs shall not exceed 0.15mm (.006inch) in total (both side). SO-8 0016023 C 12/14 L9638 Table 6. Revision History Date Revision Description of Changes April 2004 1 First Issue April 2004 2 Changed maturity from Product Preview in Final; Corrected Order Codes; Changed min. value of the item 1.4 of the Table 4 in the page 3. October 2004 3 Add VESD in table 3; Changed numbers item of the table 5 and add item 9 October 2004 4 Updated figure 7 on page11/14. 13/14 L9638 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 14/14