1. General description
The 74AHC1GU04 is a high-speed Si-gate CMOS device. It provides an inverting single
stage function.
2. Features
nSymmetrical output impedance
nHigh noise immunity
nLow power dissipation
nBalanced propagation delays
nESD protection:
uHBM JESD22-A114E: exceeds 2000 V
uMM JESD22-A115-A: exceeds 200 V
uCDM JESD22-C101C: exceeds 1000 V
nSpecified from −40 °C to +125 °C
3. Ordering information
4. Marking
74AHC1GU04
Inverter
Rev. 05 — 10 July 2007 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74AHC1GU04GW −40 °C to +125 °C TSSOP5 plastic thin shrink small outline package;
5 leads; body width 1.25 mm SOT353-1
74AHC1GU04GV −40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads SOT753
Table 2. Marking codes
Type number Marking
74AHC1GU04GW AD
74AHC1GU04GV AU4
74AHC1GU04_5 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 05 — 10 July 2007 2 of 12
NXP Semiconductors 74AHC1GU04
Inverter
5. Functional diagram
6. Pinning information
6.1 Pinning
6.2 Pin description
7. Functional description
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram
mna043
AY
24214
mna044 mna045
AY
Fig 4. Pin configuration
74AHC1GU04
n.c. VCC
A
GND Y
001aaf099
1
2
3
5
4
Table 3. Pin description
Symbol Pin Description
n.c. 1 not connected
A 2 data input
GND 3 ground (0 V)
Y 4 data output
VCC 5 supply voltage
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level
Input Output
A Y
LH
HL
74AHC1GU04_5 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 05 — 10 July 2007 3 of 12
NXP Semiconductors 74AHC1GU04
Inverter
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For both TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
9. Recommended operating conditions
10. Static characteristics
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage −0.5 +7.0 V
IIK input clamping current VI<−0.5 V −20 - mA
VIinput voltage [1] −0.5 +7.0 V
IOK output clamping current VO < −0.5 V or VO>V
CC + 0.5 V - ±20 mA
IOoutput current −0.5 V < VO < VCC + 0.5 V - ±25 mA
ICC supply current - 75 mA
IGND ground current −75 - mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation Tamb = −40 °C to +125 °C[2] - 250 mW
Table 6. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 2.0 5.0 5.5 V
VIinput voltage 0 - 5.5 V
VOoutput voltage 0 - VCC V
Tamb ambient temperature −40 +25 +125 °C
∆t/∆V input transition rise and fall rate VCC = 3.3 V ± 0.3 V - - 100 ns/V
VCC = 5.0 V ± 0.5 V - - 20 ns/V
Table 7. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 °C−40 °C to +85 °C−40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
VIH HIGH-level
input voltage VCC = 2.0 V 1.7 - - 1.7 - 1.7 - V
VCC = 3.0 V 2.4 - - 2.4 - 2.4 - V
VCC = 5.5 V 4.4 - - 4.4 - 4.4 - V
VIL LOW-level
input voltage VCC = 2.0V - - 0.3 - 0.3 - 0.3 V
VCC = 3.0 V - - 0.6 - 0.6 - 0.6 V
VCC = 5.5 V - - 1.1 - 1.1 - 1.1 V
74AHC1GU04_5 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 05 — 10 July 2007 4 of 12
NXP Semiconductors 74AHC1GU04
Inverter
11. Dynamic characteristics
[1] tpd is the same as tPLH and tPHL.
[2] Typical values are measured at VCC = 3.3 V.
[3] Typical values are measured at VCC = 5.0 V.
[4] CPD is used to determine the dynamic power dissipation PD(µW).
PD=C
PD ×VCC2×fi+∑(CL×VCC2×fo) where:
fi= input frequency in MHz;
VOH HIGH-level
output voltage VI= VIH or VIL
IO=−50 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO=−50 µA; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V
IO=−50 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO=−4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V
IO=−8.0 mA; VCC = 4.5 V 3.94 - - 3.8 - 3.70 - V
VOL LOW-level
output voltage VI= VIH or VIL
IO= 50 µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO= 50 µA; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V
IO= 50 µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO= 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V
IO= 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V
IIinput leakage
current VI= 5.5 Vor GND;
VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 µA
ICC supply current VI=V
CC or GND; IO=0A;
VCC = 5.5 V - - 1.0 - 10 - 40 µA
CIinput
capacitance - 1.5 10 - 10 - 10 pF
Table 7. Static characteristics
…continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 °C−40 °C to +85 °C−40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
Table 8. Dynamic characteristics
GND = 0 V; t
r
= t
f
=
≤
3.0 ns. For test circuit see Figure 6.
Symbol Parameter Conditions 25 °C−40 °C to +85 °C−40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
tpd propagation
delay A to Y; see Figure 5 [1]
VCC = 3.0 V to 3.6 V [2]
CL= 15 pF - 3.4 7.1 1.0 8.5 1.0 10.0 ns
CL= 50 pF - 4.9 10.6 1.0 12.0 1.0 13.5 ns
VCC = 4.5 V to 5.5 V [3]
CL= 15 pF - 2.6 5.5 1.0 6.0 1.0 7.0 ns
CL= 50 pF - 3.6 7.0 1.0 8.0 1.0 9.0 ns
CPD power
dissipation
capacitance
per buffer;
VI= GND to VCC
[4] -14- - - - - pF
74AHC1GU04_5 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 05 — 10 July 2007 5 of 12
NXP Semiconductors 74AHC1GU04
Inverter
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in Volts.
12. Waveforms
13. Typical transfer characteristics
VM = 0.5 ×VCC; VI = GND to VCC. Test data is given in Table 8.
Definitions for test circuit:
CL = Load capacitance including jig and probe
capacitance.
RT = Termination resistance should be equal to
output impedance Zo of the pulse generator.
Fig 5. The input (A) to output (Y) propagation delay
times Fig 6. Load circuitry for switching times
mna046
A input
Y output
tPHL tPLH
VM(1)
VM(1) VCC
VIVO
mna034
DUT
CL
50 pF
RT
PULSE
GENERATOR
Fig 7. VCC = 2.0 V; IO= 0 A Fig 8. VCC = 3.0 V; IO=0 A
2.00.4 0.8 1.2 1.6
0
1.0
0
0.6
0.2
0.8
0.4
2.0
0
1.2
0.4
1.6
0.8
mna397
VO
(V) ICC
(mA)
VI (V)
VO
ID (drain current)
01 3
3.0
0
mna398
2
1.5
10
0
6
2
8
4
VO
(V)
ICC
(mA)
VO
ID (drain current)
VI (V)
74AHC1GU04_5 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 05 — 10 July 2007 6 of 12
NXP Semiconductors 74AHC1GU04
Inverter
14. Application information
Some applications are:
•Linear amplifier (see Figure 12)
•In crystal oscillator design (see Figure 13)
Remark: All values given are typical unless otherwise specified.
Fig 9. VCC = 5.5 V; IO= 0 A Fig 10. Test set-up for measuring forward
transconductance gfs =∆IO/∆VI at VO is
constant
02 6
6
0
3
50
0
30
10
40
20
mna399
4
VO
(V) VO
ICC
(mA)
VI (V)
ID (drain current)
mna050
VCC
Rbias = 560 kΩ
input
0.47 µF100 µF
output
A
GND
IO
VI
(f = 1 kHz)
Fig 11. Typical forward transconductance gfs as a function of the supply voltage at Tamb =25°C
0246
40
30
10
0
20
mna400
VCC (V)
gfs
(mA/V)
74AHC1GU04_5 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 05 — 10 July 2007 7 of 12
NXP Semiconductors 74AHC1GU04
Inverter
Maximum Vo(p-p) =V
CC −1.5 V centered at
0.5 ×VCC.
Gol = open loop gain
Gv= voltage gain
R1 ≥3kΩ,R2≤1MΩ
ZL>10kΩ; Gol = 20 (typ.)
Typical unity gain bandwidth product is 5 MHz.
C1 = 47 pF (typ.)
C2 = 22 pF (typ.)
R1 = 1 MΩ to 10 MΩ (typ.)
R2 optimum value depends on the frequency and
required stability against changes in VCC or average
minimum ICC (ICC is typically 2 mA at VCC = 3 V and
f = 1 MHz).
Fig 12. Used as a linear amplifier Fig 13. Crystal oscillator configuration
U04
R1
R2
VCC
ZL
mna052
1 µF
mna053
U04
out
R2
R1
C1 C2
GvGol
1R1
R2
-------1G
ol
+()+
---------------------------------------
–=
Table 9. External components for resonator (f < 1 MHz)
All values given are typical and must be used as an initial set-up.
Frequency R1 R2 C1 C2
10 kHz to 15.9 kHz 22 MΩ220 kΩ56 pF 20 pF
16 kHz to 24.9 kHz 22 MΩ220 kΩ56 pF 10 pF
25 kHz to 54.9 kHz 22 MΩ100 kΩ56 pF 10 pF
55 kHz to 129.9 kHz 22 MΩ100 kΩ47 pF 5 pF
130 kHz to 199.9 kHz 22 MΩ47 kΩ47 pF 5 pF
200 kHz to 349.9 kHz 22 MΩ47 kΩ47 pF 5 pF
350 kHz to 600 kHz 22 MΩ47 kΩ47 pF 5 pF
Table 10. Optimum value for R2
Frequency R2 Optimum for
3 kHz 2.0 kΩminimum required ICC
8.0 kΩminimum influence due to change in VCC
6 kHz 1.0 kΩminimum required ICC
4.7 kΩminimum influence by VCC
10 kHz 0.5 kΩminimum required ICC
2.0 kΩminimum influence by VCC
14 kHz 0.5 kΩminimum required ICC
1.0 kΩminimum influence by VCC
>14 kHz - replace R2 by C3 with a typical value of 35 pF
74AHC1GU04_5 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 05 — 10 July 2007 8 of 12
NXP Semiconductors 74AHC1GU04
Inverter
15. Package outline
Fig 14. Package outline SOT353-1 (TSSOP5)
UNIT A1
A
max. A2A3bpLHELpwyv
ceD(1) E(1) Z(1) θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.1
01.0
0.8 0.30
0.15 0.25
0.08 2.25
1.85 1.35
1.15 0.65
e1
1.3 2.25
2.0 0.60
0.15 7°
0°
0.1 0.10.30.425
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
0.46
0.21
SOT353-1 MO-203 SC-88A 00-09-01
03-02-19
wM
bp
D
Z
e
e1
0.15
13
54
θ
A
A2
A1
Lp
(A3)
detail X
L
HE
E
c
vMA
X
A
y
1.5 3 mm0
scale
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1
1.1
74AHC1GU04_5 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 05 — 10 July 2007 9 of 12
NXP Semiconductors 74AHC1GU04
Inverter
Fig 15. Package outline SOT753 (SC-74A)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT753 SC-74A
wBM
bp
D
e
A
A1
Lp
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
132
45
Plastic surface-mounted package; 5 leads SOT753
UNIT A1bpcDEHELpQywv
mm 0.100
0.013 0.40
0.25 3.1
2.7
0.26
0.10 1.7
1.3
e
0.95 3.0
2.5 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.6
0.2 0.33
0.23
A
1.1
0.9
02-04-16
06-03-16
74AHC1GU04_5 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 05 — 10 July 2007 10 of 12
NXP Semiconductors 74AHC1GU04
Inverter
16. Abbreviations
17. Revision history
Table 11. Abbreviations
Acronym Description
CDM Charged Device Model
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
Table 12. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74AHC1GU04_5 20070710 Product data sheet - 74AHC1GU04_4
Modifications: •The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate.
•Package SOT353 changed to SOT353-1 in Section 3 and Section 15.
•Quick reference data and Soldering sections removed.
74AHC1GU04_4 20020528 Product specification - 74AHC1GU04_3
74AHC1GU04_3 20020215 Product specification - 74AHC1GU04_2
74AHC1GU04_2 20010427 Product specification - 74AHC1GU04_1
74AHC1GU04_1 19990519 Product specification - -
74AHC1GU04_5 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 05 — 10 July 2007 11 of 12
NXP Semiconductors 74AHC1GU04
Inverter
18. Legal information
18.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
18.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
19. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors 74AHC1GU04
Inverter
© NXP B.V. 2007. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 10 July 2007
Document identifier: 74AHC1GU04_5
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
20. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
7 Functional description . . . . . . . . . . . . . . . . . . . 2
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
9 Recommended operating conditions. . . . . . . . 3
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 3
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 4
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
13 Typical transfer characteristics . . . . . . . . . . . . 5
14 Application information. . . . . . . . . . . . . . . . . . . 6
15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
16 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 10
17 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
18 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11
18.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11
18.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
18.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
18.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
19 Contact information. . . . . . . . . . . . . . . . . . . . . 11
20 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
