TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Trimmed Offset Voltage:
TLC27L7 . . . 500 µV Max at 25°C,
VDD = 5 V
D
Input Offset Voltage Drift . . . Typically
0.1 µV/Month, Including the First 30 Days
D
Wide Range of Supply Voltages Over
Specified Temperature Range:
0°C to 70°C...3 V to 16 V
–40°C to 85°C...4 V to 16 V
–55°C to 125°C...4 V to 16 V
D
Single-Supply Operation
D
Common-Mode Input Voltage Range
Extends Below the Negative Rail (C-Suffix,
I-Suffix Types)
D
Ultra-Low Power ...Typically 95 µW
at 25°C, VDD = 5 V
D
Output Voltage Range Includes Negative
Rail
D
High Input Impedance ...10
12 Ω Typ
D
ESD-Protection Circuitry
D
Small-Outline Package Option Also
Available in Tape and Reel
D
Designed-In Latch-Up immunity
description
The TLC27L2 and TLC27L7 dual operational
amplifiers combine a wide range of input offset
voltage grades with low offset voltage drift, high
input impedance, extremely low power, and high
gain.
AVAILABLE OPTIONS
PACKAGE
TAVIOmax
AT 25°CSMALL
OUTLINE
(D)
CHIP
CARRIER
(FK)
CERAMIC
DIP
(JG)
PLASTIC
DIP
(P)
0°C
500 µV
TLC27L7CD
TLC27L7CP
0°C
to
500
µV
2 mV
TLC27L7CD
TLC27L2BCD
TLC27L7CP
TLC27L2BCP
to
70
°
C
5 mV TLC27L2ACD — — TLC27L2ACP
70 C
10 mV TLC27L2CD TLC27L2CP
40°C
500 µV
TLC27L7ID
TLC27L7IP
–40°C
to
500
µV
2 mV
TLC27L7ID
TLC27L2BID
TLC27L7IP
TLC27L2BIP
to
85
°
C
5 mV TLC27L2AID — — TLC27L2AIP
85 C
10 mV TLC27L2ID TLC27L2IP
–55°C
to
500 µV TLC27L7MD TLC27L7MFK TLC27L7MJG TLC27L7MP
to
125°C
µ
10 mV TLC27L2MD TLC27L2MFK TLC27L2MJG TLC27L2MP
The D package is available taped and reeled. Add R suffix to the device type
(e.g., TLC27L7CDR).
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
LinCMOS is a trademark of Texas Instruments.
–800
Percentage of Units – %
VIO – Input Offset Voltage – µV
30
800
0–400 0 400
5
10
15
20
25
DISTRIBUTION OF TLC27L7
INPUT OFFSET VOLTAGE
1
2
3
4
8
7
6
5
1OUT
1IN–
1IN+
GND
VDD
2OUT
2IN–
2IN+
D, JG, OR P PACKAGE
(TOP VIEW)
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
NC
2OUT
NC
2IN–
NC
NC
1IN–
NC
1IN+
NC
FK PACKAGE
(TOP VIEW)
NC
1OUT
NC
NC NC
NC
GND
NC
NC – No internal connection
2IN + DD
V
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
335 Units Tested From 2 Wafer Lots
VDD = 5 V
TA = 25°C
P Package
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
These devices use Texas Instruments silicon-gate LinCMOS technology, which provides offset voltage
stability far exceeding the stability available with conventional metal-gate processes.
The extremely high input impedance, low bias currents, and low power consumption make these cost-effective
devices ideal for high gain, low frequency, low power applications. Four offset voltage grades are available
(C-suffix and I-suffix types), ranging from the low-cost TLC27L2 (10 mV) to the high-precision TLC27L7
(500 µV). These advantages, in combination with good common-mode rejection and supply voltage rejection,
make these devices a good choice for new state-of-the-art designs as well as for upgrading existing designs.
In general, many features associated with bipolar technology are available in LinCMOS operational amplifiers,
without the power penalties of bipolar technology. General applications such as transducer interfacing, analog
calculations, amplifier blocks, active filters, and signal buffering are easily designed with the TLC27L2 and
TLC27L7. The devices also exhibit low voltage single-supply operation and ultra-low power consumption,
making them ideally suited for remote and inaccessible battery-powered applications. The common-mode input
voltage range includes the negative rail.
A wide range of packaging options is available, including small-outline and chip-carrier versions for high-density
system applications.
The device inputs and outputs are designed to withstand –100-mA surge currents without sustaining latch-up.
The TLC27L2 and TLC27L7 incorporate internal ESD-protection circuits that prevent functional failures at
voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2; however, care should be exercised in
handling these devices as exposure to ESD may result in the degradation of the device parametric performance.
The C-Suffix devices are characterized for operation from 0°C to 70°C. The I-suf fix devices are characterized
for operation from –40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of –55°C to 125°C.
equivalent schematic (each amplifier)
P5 P6
OUT
N7N6
R7
N4
C1
R5
N3
GND
N2 D2R4D1R3
N1
IN+
IN–
P1
R1
P2
R2 N5
R6
P3 P4
VDD
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD (see Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage (see Note 2) ±VDD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (any input) –0.3 V to VDD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current, II ±5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current, IO (each output) ±30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total current into VDD 45 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total current out of GND 45 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duration of short-circuit current at (or below) 25°C (see Note 3) Unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature, TA: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I suffix –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M suffix –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package 260°C. . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package 300°C. . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at IN+ with respect to IN–.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded (see application section).
DISSIPATION RATING TABLE
PACKAGE
T
A
≤ 25°CDERATING F ACTOR T
A
= 70°C T
A
= 85°C T
A
= 125°C
PACKAGE
A
POWER RATING ABOVE TA = 25°C
A
POWER RATING
A
POWER RATING
A
POWER RATING
D725 mW 5.8 mW/°C464 mW 377 mW —
FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW
P1000 mW 8.0 mW/°C640 mW 520 mW —
recommended operating conditions
C SUFFIX I SUFFIX M SUFFIX
UNIT
MIN MAX MIN MAX MIN MAX
UNIT
Supply voltage, VDD 3 16 4 16 4 16 V
Common mode in
p
ut voltage VIC
VDD = 5 V –0.2 3.5 –0.2 3.5 0 3.5
V
Common
-
mode
input
voltage
,
V
IC VDD = 10 V –0.2 8.5 –0.2 8.5 0 8.5
V
Operating free-air temperature, TA0 70 –40 85 –55 125 °C
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA
†
TLC27L2C
TLC27L2AC
TLC27L2BC
TLC27L7C UNIT
MIN TYP MAX
TLC27L2C
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
TLC27L2C
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 12
mV
TLC27L2AC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.9 5
mV
VIO
In
p
ut offset voltage
TLC27L2AC
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 6.5
V
IO
Input
offset
voltage
TLC27L2BC
V
O
= 1.4 V, V
IC
= 0, 25°C 204 2000
TLC27L2BC
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 3000
µV
TLC27L7C
V
O
= 1.4 V, V
IC
= 0, 25°C 170 500 µ
V
TLC27L7C
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 1500
αVIO
Avera
g
e temperature coefficient of input 25°C to
11
µV/°C
αVIO
g
offset voltage 70°C
1
.
1
µ
V/°C
IIO
In
p
ut offset current (see Note 4)
VO=25V
VIC =25V
25°C 0.1 60 p
A
I
IO
Input
offset
current
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
70°C 7 300
pA
IIB
In
p
ut bias current (see Note 4)
VO=25V
VIC =25V
25°C 0.6 60 p
A
I
IB
Input
bias
current
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
70°C 50 600
pA
–0.2 –0.3
25°C
0.2
to
0.3
to V
VICR
Common-mode input volta
g
e ran
g
e4 4.2
V
ICR
gg
(see Note 5) –0.2
Full range
0.2
to V
g
3.5
25°C 3.2 4.1
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ0°C3 4.1 V
70°C 3 4.2
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 0°C0 50 mV
70°C 0 50
L i l diff ti l lt
25°C 50 700
AVD Large-signal differential voltage
am
p
lification
VO = 0.25 V to 2 V, RL = 1 MΩ0°C50 700 V/mV
am lification
70°C 50 380
25°C 65 94
CMRR Common-mode rejection ratio VIC = VICRmin 0°C 60 95 dB
70°C 60 95
S l lt j ti ti
25°C 70 97
kSVR Supply-voltage rejection ratio
(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V 0°C60 97 dB
(∆VDD/∆VIO)
70°C 60 98
V25V
V25V
25°C 20 34
IDD Supply current (two amplifiers)
V
O =
2
.
5
V
,
No load
V
IC =
2
.
5
V
,0°C24 42 µA
No
load
70°C 16 28
†Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA
†
TLC27L2C
TLC27L2AC
TLC27L2BC
TLC27L7C UNIT
MIN TYP MAX
TLC27L2C
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
TLC27L2C
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 12
mV
TLC27L2AC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.9 5
mV
VIO
In
p
ut offset voltage
TLC27L2AC
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 6.5
V
IO
Input
offset
voltage
TLC27L2BC
V
O
= 1.4 V, V
IC
= 0, 25°C 235 2000
TLC27L2BC
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 3000 µV
TLC27L7C
V
O
= 1.4 V, V
IC
= 0, 25°C 190 800
TLC27L7C
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 1900
αVIO Average temperature coef ficient of input
offset voltage 25°C to
70°C1µV/°C
IIO
In
p
ut offset current (see Note 4)
VO=5V
VIC =5V
25°C 0.1 60 p
A
I
IO
Input
offset
current
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
70°C 8 300
pA
IIB
In
p
ut bias current (see Note 4)
VO=5V
VIC =5V
25°C 0.7 60 p
A
I
IB
Input
bias
current
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
70°C 50 600
pA
–0.2 –0.3
25°C
0.2
to
0.3
to V
VICR
Common-mode input volta
g
e ran
g
e9 9.2
V
ICR
gg
(see Note 5) –0.2
Full range
0.2
to V
g
8.5
25°C 8 8.9
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ0°C7.8 8.9 V
70°C 7.8 8.9
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 0°C0 50 mV
70°C 0 50
L i l diff ti l lt
25°C 50 860
AVD Large-signal differential voltage
am
p
lification
VO = 1 V to 6 V, RL = 1 MΩ0°C50 1025 V/mV
am lification
70°C 50 660
25°C 65 97
CMRR Common-mode rejection ratio VIC = VICRmin 0°C 60 97 dB
70°C 60 97
S l lt j ti ti
25°C 70 97
kSVR Supply-voltage rejection ratio
(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V 0°C60 97 dB
(∆VDD/∆VIO)
70°C 60 98
V5V
V5V
25°C 29 46
IDD Supply current (two amplifiers)
V
O =
5
V
,
No load
V
IC =
5
V
, 0°C36 66 µA
No
load
70°C 22 40
†Full range is 0°C to 70°C.
NOTES: 4 The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5 This range also applies to each input individually.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA
†
TLC27L2I
TLC27L2AI
TLC27L2BI
TLC27L7I UNIT
MIN TYP MAX
TLC27L2I
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
TLC27L2I
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 13
mV
TLC27L2AI
V
O
= 1.4 V, V
IC
= 0, 25°C 0.9 5
mV
VIO
In
p
ut offset voltage
TLC27L2AI
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 7
V
IO
Input
offset
voltage
TLC27L2BI
V
O
= 1.4 V, V
IC
= 0, 25°C 240 2000
TLC27L2BI
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 3500
µV
TLC27L7I
V
O
= 1.4 V, V
IC
= 0, 25°C 170 500 µ
V
TLC27L7I
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 2000
αVIO
Avera
g
e temperature coefficient of 25°C to
11
µV/°C
αVIO
g
input offset voltage 85°C
1
.
1
µ
V/°C
IIO
In
p
ut offset current (see Note 4)
VO=25V
VIC =25V
25°C 0.1 60 p
A
I
IO
Input
offset
current
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
85°C 24 1000
pA
IIB
In
p
ut bias current (see Note 4)
VO=25V
VIC =25V
25°C 0.6 60 p
A
I
IB
Input
bias
current
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
85°C 200 2000
pA
–0.2 –0.3
25°C
0.2
to
0.3
to V
VICR
Common-mode input volta
g
e ran
g
e4 4.2
V
ICR
gg
(see Note 5) –0.2
Full range
0.2
to V
g
3.5
25°C 3.2 4.1
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ–40°C3 4.1 V
85°C 3 4.2
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 –40°C0 50 mV
85°C 0 50
L i l diff ti l
25°C 50 480
AVD Large-signal differential
voltage am
p
lification
VO = 0.25 V to 2 V, RL = 1 MΩ–40°C50 900 V/mV
voltage
am lification
85°C 50 330
25°C 65 94
CMRR Common-mode rejection ratio VIC = VICRmin –40°C 60 95 dB
85°C 60 95
S l lt j ti ti
25°C 70 97
kSVR Supply-voltage rejection ratio
(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V –40°C60 97 dB
(∆VDD/∆VIO)
85°C 60 98
V25V
V25V
25°C 20 34
IDD Supply current (two amplifiers)
V
O =
2
.
5
V
,
No load
V
IC =
2
.
5
V
, –40°C31 54 µA
No
load
85°C 15 26
†Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA
†
TLC27L2I
TLC27L2AI
TLC27L2BI
TLC27L7I UNIT
MIN TYP MAX
TLC27L2I
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
TLC27L2I
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 13
mV
TLC27L2AI
V
O
= 1.4 V, V
IC
= 0, 25°C 0.9 5
mV
VIO
In
p
ut offset voltage
TLC27L2AI
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 7
V
IO
Input
offset
voltage
TLC27L2BI
V
O
= 1.4 V, V
IC
= 0, 25°C 235 2000
TLC27L2BI
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 3500
µV
TLC27L7I
V
O
= 1.4 V, V
IC
= 0, 25°C 190 800 µ
V
TLC27L7I
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 2900
αVIO
Avera
g
e temperature coefficient of input 25°C to
1
µV/°C
αVIO
g
offset voltage 85°C
1
µ
V/°C
IIO
In
p
ut offset current (see Note 4)
VO=5V
VIC =5V
25°C 0.1 60 p
A
I
IO
Input
offset
current
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
85°C 26 1000
pA
IIB
In
p
ut bias current (see Note 4)
VO=5V
VIC =5V
25°C 0.7 60 p
A
I
IB
Input
bias
current
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
85°C 220 2000
pA
–0.2 –0.3
25°C
0.2
to
0.3
to V
VICR
Common-mode input volta
g
e ran
g
e9 9.2
V
ICR
gg
(see Note 5) –0.2
Full range
0.2
to V
g
8.5
25°C 8 8.9
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ–40°C7.8 8.9 V
85°C 7.8 8.9
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 –40°C0 50 mV
85°C 0 50
L i l diff ti l lt
25°C 50 860
AVD Large-signal differential voltage
am
p
lification
VO = 1 V to 6 V, RL = 1 MΩ–40°C50 1550 V/mV
am lification
85°C 50 585
25°C 65 97
CMRR Common-mode rejection ratio VIC = VICRmin –40°C 60 97 dB
85°C 60 98
S l lt j ti ti
25°C 70 97
kSVR Supply-voltage rejection ratio
(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V –40°C60 97 dB
(∆VDD/∆VIO)
85°C 60 98
V5V
V5V
25°C 29 46
IDD Supply current (two amplifiers)
V
O =
5
V
,
No load
V
IC =
5
V
, –40°C49 86 µA
No
load
85°C 20 36
†Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS T
A†
TLC27L2M
TLC27L7M UNIT
A
MIN TYP MAX
TLC27L2M
VO = 1.4 V, VIC = 0, 25°C 1.1 10
mV
VIO
In
p
ut offset voltage
TLC27L2M
O
RS = 50 Ω,
IC
RL = 1 MΩFull range 12
mV
V
IO
Input
offset
voltage
TLC27L7M
VO = 1.4 V, VIC = 0, 25°C 170 500
µV
TLC27L7M
O
RS = 50 Ω,
IC
RL = 1 MΩFull range 3750 µ
V
αVIO
Average temperature coef ficient of 25°C to
14
µV/°C
αVIO
g
input offset voltage 125°C
1
.
4
µ
V/°C
IIO
In
p
ut offset current (see Note 4)
VO=25V
VIC =25V
25°C 0.1 60 pA
I
IO
Input
offset
current
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
125°C 1.4 15 nA
IIB
In
p
ut bias current (see Note 4)
VO=25V
VIC =25V
25°C 0.6 60 pA
I
IB
Input
bias
current
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
125°C 9 35 nA
0–0.3
25°Cto to V
VICR
Common-mode input voltage range 4 4.2
V
ICR
gg
(see Note 5) 0
Full range to V
g
3.5
25°C 3.2 4.1
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ–55°C 3 4.1 V
125°C 3 4.2
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 –55°C 0 50 mV
125°C 0 50
Large signal differential voltage
25°C 50 500
AVD
L
arge-s
i
gna
l
diff
eren
ti
a
l
vo
lt
age
am
p
lification
VO = 0.25 V to 2 V, RL = 1 MΩ–55°C 25 1000 V/mV
am lification
125°C 25 200
25°C 65 94
CMRR Common-mode rejection ratio VIC = VICRmin –55°C 60 95 dB
125°C 60 85
Supply voltage rejection ratio
25°C 70 97
kSVR
S
upp
l
y-vo
lt
age re
j
ec
ti
on ra
ti
o
(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V –55°C 60 97 dB
(∆VDD/∆VIO)
125°C 60 98
VO=25V
VIC =25V
25°C 20 34
IDD Supply current (two amplifiers)
V
O =
2
.
5
V
,
No load
V
IC =
2
.
5
V
, –55°C35 60 µA
No
load
125°C 14 24
†Full range is –55°C to 125°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)
PARAMETER TEST CONDITIONS T
A†
TLC27L2M
TLC27L7M UNIT
A
MIN TYP MAX
TLC27L2M
VO = 1.4 V, VIC = 0, 25°C 1.1 10
mV
VIO
In
p
ut offset voltage
TLC27L2M
O
RS = 50 Ω,
IC
RL = 1 MΩFull range 12
mV
V
IO
Input
offset
voltage
TLC27L7M
VO = 1.4 V, VIC = 0, 25°C 190 800
µV
TLC27L7M
O
RS = 50 Ω,
IC
RL = 1 MΩFull range 4300 µ
V
αVIO
Average temperature coef ficient of 25°C to
14
µV/°C
αVIO
g
input offset voltage 125°C
1
.
4
µ
V/°C
IIO
In
p
ut offset current (see Note 4)
VO=5V
VIC =5V
25°C 0.1 60 pA
I
IO
Input
offset
current
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
125°C 1.8 15 nA
IIB
In
p
ut bias current (see Note 4)
VO=5V
VIC =5V
25°C 0.7 60 pA
I
IB
Input
bias
current
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
125°C 10 35 nA
0–0.3
25°Cto to V
VICR
Common-mode input voltage range 9 9.2
V
ICR
gg
(see Note 5) 0
Full range to V
g
8.5
25°C 8 8.9
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ–55°C 7.8 8.8 V
125°C 7.8 9
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 –55°C 0 50 mV
125°C 0 50
Large signal differential voltage
25°C 50 860
AVD
L
arge-s
i
gna
l
diff
eren
ti
a
l
vo
lt
age
am
p
lification
VO = 1 V to 6 V, RL = 1 MΩ–55°C 25 1750 V/mV
am lification
125°C 25 380
25°C 65 97
CMRR Common-mode rejection ratio VIC = VICRmin –55°C 60 97 dB
125°C 60 91
Supply voltage rejection ratio
25°C 70 97
kSVR
S
upp
l
y-vo
lt
age re
j
ec
ti
on ra
ti
o
(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V –55°C 60 97 dB
(∆VDD/∆VIO)
125°C 60 98
VO=5V
VIC =5V
25°C 29 46
IDD Supply current (two amplifiers)
V
O =
5
V
,
No load
V
IC =
5
V
, –55°C56 96 µA
No
load
125°C 18 30
†Full range is –55 °C to 125°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics, VDD = 5 V
PARAMETER TEST CONDITIONS TA
TLC27L2C
TLC27L2AC
TLC27L2BC
TLC27L7C UNIT
MIN TYP MAX
25°C 0.03
VI
(
PP
)
= 1 V 0°C 0.04
SR
Slew rate at unity gain
RL = 1 MΩ,
CL20
p
F
()
70°C 0.03
V/µs
SR
Slew
rate
at
unity
gain
C
L =
20
p
F
,
See
Fi
gu
r
e
1 25°C 0.03
V/
µ
s
See
Figure
1
VI
(
PP
)
= 2.5 V 0°C 0.03
()
70°C 0.02
V
Equivalent in
p
ut noise voltage
f = 1 kHz, R
S
= 20 Ω,
25°C
68
nV/√H
V
n
Equivalent
input
noise
voltage
,
See Figure 2
S,
25°C
68
n
V/√H
z
VV
C20F
25°C 5
BOM Maximum output-swing bandwidth VO = VOH,
RL=1MΩ
CL = 20 pF,
See Figure 1
0°C 6 kHz
RL
=
1
MΩ
,
See
Figure
1
70°C 4.5
V10V
C20F
25°C 85
B1Unity-gain bandwidth VI = 10 mV,
See Figure 3
CL = 20 pF, 0°C100 kHz
See
Figure
3
70°C 65
V10mV
fB
25°C 34°
φmPhase margin
V
I =
10
m
V
,
CL
=
20
p
F,
f
=
B
1,
See Figure 3
0°C 36°
CL
=
20
F
,
See
Figure
3
70°C 30°
operating characteristics, VDD = 10 V
PARAMETER TEST CONDITIONS TA
TLC27L2C
TLC27L2AC
TLC27L2BC
TLC27L7C UNIT
MIN TYP MAX
25°C 0.05
VI
(
PP
)
= 1 V 0°C 0.05
SR
Slew rate at unity gain
RL = 1 MΩ,
CL20
p
F
()
70°C 0.04
V/µs
SR
Slew
rate
at
unity
gain
C
L =
20
p
F
,
See
Fi
gu
r
e
1 25°C 0.04
V/
µ
s
See
Figure
1
VI
(
PP
)
= 5.5 V 0°C 0.05
()
70°C 0.04
V
Equivalent in
p
ut noise voltage
f = 1 kHz, R
S
= 20 Ω,
25°C
68
nV/√H
V
n
Equivalent
input
noise
voltage
,
See Figure 2
S,
25°C
68
n
V/√H
z
VV
C20F
25°C 1
BOM Maximum output-swing bandwidth VO = VOH,
RL=1MΩ
CL = 20 pF,
See Figure 1
0°C 1.3 kHz
RL
=
1
MΩ
,
See
Figure
1
70°C 0.9
V10V
C20F
25°C110
B1Unity-gain bandwidth VI = 10 mV,
See Figure 3
CL = 20 pF, 0°C125 kHz
See
Figure
3
70°C 90
V10mV
fB
25°C 38°
φmPhase margin
V
I =
10
m
V
,
CL
=
20
p
F,
f
=
B
1,
See Figure 3
0°C 40°
CL
=
20
F
,
See
Figure
3
70°C 34°
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics, VDD = 5 V
PARAMETER TEST CONDITIONS TA
TLC27L2I
TLC27L2AI
TLC27L2BI
TLC27L7I UNIT
MIN TYP MAX
25°C 0.03
VI
(
PP
)
= 1 V –40°C 0.04
SR
Slew rate at unity gain
RL = 1 MΩ,
CL20
p
F
()
85°C 0.03
V/µs
SR
Slew
rate
at
unity
gain
C
L =
20
p
F
,
See
Fi
gu
r
e
1 25°C 0.03
V/
µ
s
See
Figure
1
VI
(
PP
)
= 2.5 V –40°C 0.04
()
85°C 0.02
V
Equivalent in
p
ut noise voltage
f = 1 kHz, R
S
= 20 Ω,
25°C
68
nV/√H
V
n
Equivalent
input
noise
voltage
,
See Figure 2
S,
25°C
68
n
V/√H
z
VV
C20F
25°C 5
BOM Maximum output-swing bandwidth VO = VOH,
RL=1MΩ
CL = 20 pF,
See Figure 1
–40°C 7 kHz
RL
=
1
MΩ
,
See
Figure
1
85°C 4
V10V
C20F
25°C 85
B1Unity-gain bandwidth VI = 10 mV,
See Figure 3
CL = 20 pF, –40°C130 kHz
See
Figure
3
85°C 55
V10mV
fB
25°C 34°
φmPhase margin
V
I =
10
m
V
,
CL
=
20
p
F,
f
=
B
1,
See Figure 3
–40°C 38°
CL
=
20
F
,
See
Figure
3
85°C 29°
operating characteristics, VDD = 10 V
PARAMETER TEST CONDITIONS TA
TLC27L2I
TLC27L2AI
TLC27L2BI
TLC27L7I UNIT
MIN TYP MAX
25°C 0.05
VI
(
PP
)
= 1 V –40°C 0.06
SR
Slew rate at unity gain
RL = 1 MΩ,
CL20
p
F
()
85°C 0.03
V/µs
SR
Slew
rate
at
unity
gain
C
L =
20
p
F
,
See
Fi
gu
r
e
1 25°C 0.04
V/
µ
s
See
Figure
1
VI
(
PP
)
= 5.5 V –40°C 0.05
()
85°C 0.03
V
Equivalent in
p
ut noise voltage
f = 1 kHz, R
S
= 20 Ω,
25°C
68
nV/√H
V
n
Equivalent
input
noise
voltage
,
See Figure 2
S,
25°C
68
n
V/√H
z
VV
C20F
25°C 1
BOM Maximum output-swing bandwidth VO = VOH,
RL=1MΩ
CL = 20 pF,
See Figure 1
–40°C 1.4 kHz
RL
=
1
MΩ
,
See
Figure
1
85°C 0.8
V10V
C20F
25°C110
B1Unity-gain bandwidth VI = 10 mV,
See Figure 3
CL = 20 pF, –40°C155 kHz
See
Figure
3
85°C 80
V10mV
fB
25°C 38°
φmPhase margin
V
I =
10
m
V
,
CL
=
20
p
F,
f
=
B
1,
See Figure 3
–40°C 42°
CL
=
20
F
,
See
Figure
3
85°C 32°
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics, VDD = 5 V
PARAMETER TEST CONDITIONS T
A
TLC27L2M
TLC27L7M UNIT
A
MIN TYP MAX
25°C 0.03
VI
(
PP
)
= 1 V –55°C 0.04
SR
Slew rate at unity gain
RL = 1 MΩ,
CL=20
p
F
()
125°C 0.02
V/µs
SR
Slew
rate
at
unity
gain
C
L =
20
pF
,
See Fi
g
ure 1 25°C 0.03
V/
µ
s
See
Figure
1
VI
(
PP
)
= 2.5 V –55°C 0.04
()
125°C 0.02
V
Equivalent in
p
ut noise voltage
f = 1 kHz, R
S
= 20 Ω,
25°C
68
nV/√H
V
n
Equivalent
input
noise
voltage
,
See Figure 2
S,
25°C
68
n
V/√H
z
VV
C20F
25°C 5
BOM Maximum output-swing bandwidth VO = VOH,
RL=1MΩ
CL = 20 pF,
See Figure 1
–55°C 8 kHz
RL
=
1
MΩ
,
See
Figure
1
125°C 3
V10V
C20F
25°C 85
B1Unity-gain bandwidth VI = 10 mV,
See Figure 3
CL = 20 pF, –55°C140 kHz
See
Figure
3
125°C 45
V10mV
fB
25°C 34°
φmPhase margin
V
I =
10
m
V
,
CL=20
p
F
f
=
B
1,
See Figure 3
–55°C 39°
CL
=
20
F
,
See
Figure
3
125°C 25°
operating characteristics, VDD = 10 V
PARAMETER TEST CONDITIONS T
A
TLC27L2M
TLC27L7M UNIT
A
MIN TYP MAX
25°C 0.05
VI(PP) = 1 V –55°C 0.06
SR
Slew rate at unity gain
RL = 1 MΩ,
CL=20
p
F
()
125°C 0.03
V/µs
SR
Slew
rate
at
unity
gain
C
L =
20
pF
,
See Fi
g
ure 1 25°C 0.04
V/
µ
s
See
Figure
1
VI
(
PP
)
= 5.5 V –55°C 0.06
()
125°C 0.03
V
Equivalent in
p
ut noise voltage
f = 1 kHz, R
S
= 20 Ω,
25
°
C
68
nV/√Hz
V
n
Equivalent
input
noise
voltage
,
See Figure 2
S,
25°C
68
n
V/√H
z
VV
C20F
25°C 1
BOM Maximum output-swing bandwidth VO = VOH,
RL=1MΩ
CL = 20 pF,
See Figure 1
–55°C 1.5 kHz
RL
=
1
MΩ
,
See
Figure
1
125°C 0.7
V10V
C20F
25°C110
B1Unity-gain bandwidth VI = 10 mV,
See Figure 3
CL = 20 pF, –55°C165 kHz
See
Figure
3
125°C 70
V10mV
fB
25°C 38°
φmPhase margin
V
I =
10
m
V
,
CL=20
p
F
f
=
B
1,
See Figure 3
–55°C 43°
CL
=
20
F
,
See
Figure
3
125°C 29°
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
single-supply versus split-supply test circuits
Because the TLC27L2 and TLC27L7 are optimized for single-supply operation, circuit configurations used for
the various tests often present some inconvenience since the input signal, in many cases, must be offset from
ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to
the negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either
circuit gives the same result.
VDD–
VDD+
–
+
CLRL
VO
VI
VI
VO
RL
CL
VDD
–
+
(a) SINGLE SUPPLY (b) SPLIT SUPPLY
Figure 1. Unity-Gain Amplifier
VO
2 kΩ
20 Ω20 Ω
VDD–
20 Ω
2 kΩ
VO
20 Ω
1/2 VDD
–
+
VDD+
–
+
VDD
(b) SPLIT SUPPLY(a) SINGLE SUPPLY
Figure 2. Noise-Test Circuit
VDD–
VDD+
–
+
10 kΩ
VO
100 Ω
CL
VI
VI
1/2 VDD CL
100 Ω
VO
10 kΩ
–
+
VDD
(a) SINGLE SUPPLY (b) SPLIT SUPPLY
Figure 3. Gain-of-100 Inverting Amplifier
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
input bias current
Because of the high input impedance of the TLC27L2 and TLC27L7 operational amplifiers, attempts to measure
the input bias current can result in erroneous readings. The bias current at normal room ambient temperature
is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket. T wo suggestions are
offered to avoid erroneous measurements:
1. Isolate the device from other potential leakage sources.Use a grounded shield around and between the
device inputs (see Figure 4). Leakages that would otherwise flow to the inputs are shunted away.
2. Compensate for the leakage of the test socket by actually performing an input bias current test (using
a picoammeter) with no device in the test socket. The actual input bias current can then be calculated
by subtracting the open-socket leakage readings from the readings obtained with a device in the test
socket.
One word of caution: many automatic testers as well as some bench-top operational amplifier testers use the
servo-loop technique with a resistor in series with the device input to measure the input bias current (the voltage
drop across the series resistor is measured and the bias current is calculated). This method requires that a
device be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is not
feasible using this method.
85
14
V = VIC
Figure 4. Isolation Metal Around Device Inputs
(JG and P packages)
low-level output voltage
To obtain low-supply-voltage operation, some compromise was necessary in the input stage. This compromise
results in the device low-level output being dependent on both the common-mode input voltage level as well
as the differential input voltage level. When attempting to correlate low-level output readings with those quoted
in the electrical specifications, these two conditions should be observed. If conditions other than these are to
be used, please refer to Figures 14 through 19 in the Typical Characteristics of this data sheet.
input offset voltage temperature coefficient
Erroneous readings often result from attempts to measure temperature coefficient of input of fset voltage. This
parameter is actually a calculation using input offset voltage measurements obtained at two different
temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device
and the test socket. This moisture results in leakage and contact resistance, which can cause erroneous input
offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the
moisture also covers the isolation metal itself, thereby rendering it useless. It is suggested that these
measurements be performed at temperatures above freezing to minimize error.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
full-power response
Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage
swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is
generally measured by monitoring the distortion level of the output while increasing the frequency of a sinusoidal
input signal until the maximum frequency is found above which the output contains significant distortion. The
full-peak response is defined as the maximum output frequency, without regard to distortion, above which full
peak-to-peak output swing cannot be maintained.
Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified
in this data sheet and is measured using the circuit of Figure 1. The initial setup involves the use of a sinusoidal
input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is
increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same
amplitude. The frequency is then increased until the maximum peak-to-peak output can no longer be maintained
(Figure 5). A square wave is used to allow a more accurate determination of the point at which the maximum
peak-to-peak output is reached.
(d) f > BOM
(c) f = BOM
(b) BOM > f > 100 kHz(a) f = 100 kHz
Figure 5. Full-Power-Response Output Signal
test time
Inadequate test time is a frequent problem, especially when testing CMOS high-volume, short-test-time
environment. Internal capacitances are inherently higher in CMOS devices and require longer test times than
their bipolar and BiFET counterparts. The problem becomes more pronounced with reduced supply levels and
lower temperatures.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO Input offset voltage Distribution 6, 7
αVIO Temperature coef ficient of input offset voltage Distribution 8, 9
vs Hi
g
h-level output current 10
,
11
VOH High-level output voltage
vs
High level
out ut
current
vs Supply voltage
10,
11
12
OH
gg
yg
vs Free-air temperature 13
vs Differential in
p
ut voltage
14 16
VOL
Low level out
p
ut voltage
vs
Differential
in ut
voltage
vs Free air tem
p
erature
14
,
16
15 17
V
OL
Low
-
level
output
voltage
vs
F
ree-a
i
r
t
empera
t
ure
Llltt t
15
,
17
18 19
vs Low-level output current 18, 19
vs Suppl
y
volta
g
e 20
AVD Large-signal differential voltage amplification
vs
Su ly
voltage
vs Free-air temperature
20
21
VD
gg g
vs Frequency 32, 33
IIB Input bias current vs Free-air temperature 22
IIO Input offset current vs Free-air temperature 22
VIC Common-mode input voltage vs Supply voltage 23
IDD
Su
pp
ly current
vs Suppl
y
volta
g
e 24
I
DD
Supply
current
yg
vs Free-air temperature 25
SR
Slew rate
vs Suppl
y
volta
g
e 26
SR
Slew
rate
yg
vs Free-air temperature 27
Normalized slew rate vs Free-air temperature 28
VO(PP) Maximum peak-to-peak output voltage vs Frequency 29
B1
Unity gain bandwidth
vs Free-air temperature 30
B
1
Unity
-
gain
bandwidth
vs Supply voltage 31
vs Suppl
y
volta
g
e 34
φmPhase margin
vs
Su ly
voltage
vs Free-air temperature
34
35
φm
g
vs Capacitive Load 36
VnEquivalent input noise voltage vs Frequency 37
Phase shift vs Frequency 32, 33
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 6
60
50
40
30
20
10
43210–1–2–3–4
70
5
VIO – Input Offset Voltage – mV
Percentage of Units – %
0–5
DISTRIBUTION OF TLC27L2
INPUT OFFSET VOLTAGE
P Package
TA = 25°C
VDD = 5 V
905 Amplifiers Tested From 6 Wafer Lots
Figure 7
–5
0
Percentage of Units – %
VIO – Input Offset Voltage – mV 5
70
–4–3–2–101234
10
20
30
40
50
60
DISTRIBUTION OF TLC27L2
INPUT OFFSET VOLTAGE
905 Amplifiers Tested From 6 Wafer Lots
VDD = 10 V
TA = 25°C
P Package
Figure 8
–10
0
Percentage of Units – %
αVIO – Temperature Coefficient – µV/°C10
70
–8–6–4–202468
10
20
30
40
50
60
DISTRIBUTION OF TLC27LC AND TLC27L7
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
356 Amplifiers Tested From 8 Wafer Lots
VDD = 5 V
TA = 25°C to 125°C
P Package
Outliers:
(1) 19.2 µV/°C
(1) 12.1 µV/°C
Figure 9
60
50
40
30
20
10
86420–2–4–6–8
70
10
αVIO – Temperature Coefficient – µV/°C
Percentage of Units – %
0
–10
DISTRIBUTION OF TLC27LC AND TLC27L7
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
(1) 11.6 µV/°C
(1) 18.7 µV/°C
Outliers:
P Package
TA = 25°C to 125°C
VDD = 10 V
356 Amplifiers Tested From 8 Wafer Lots
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 10
VDD = 3 V
VDD = 4 V
VDD = 5 V
4
3
2
1
–8–6–4–2
5
–10
IOH – High-Level Output Current – mA
VOH – High-Level Output Voltage – V
00
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
ÁÁ
ÁÁ
ÁÁ
VOH
TA = 25°C
VID = 100 mV
Figure 11
TA = 25°C
VID = 100 mV
VDD = 10 V
14
12
10
8
6
4
2
–30–20–10
16
–4
0
IOH – High-Level Output Current – mA
00
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
VOH – High-Level Output Voltage – V
ÁÁ
ÁÁ
ÁÁ
VOH
–5–15 –25 –35
ÎÎÎÎÎ
ÎÎÎÎÎ
VDD = 16 V
Figure 12
ÎÎÎÎÎ
ÎÎÎÎÎ
TA = 25°C
ÎÎÎÎÎÎ
RL = 10 kΩ
ÎÎÎÎÎ
VID = 100 mV
0
16
2
4
6
8
10
12
14
1412108642 16
VDD – Supply Voltage – V
0
HIGH-LEVEL OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
VOH – High-Level Output Voltage – V
ÁÁ
ÁÁ
ÁÁ
VOH
Figure 13
VDD = 10 V
VDD = 5 V
–75
–2.4
TA – Free-Air Temperature – °C125
VDD –1.6
–50 –25 0 20 50 75 100
–2.3
–2.2
–2.1
–2
–1.9
–1.8
–1.7
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
VOH – High-Level Output Voltage – V
ÁÁ
ÁÁ
ÁÁ
VOH
ÁÁÁÁÁ
ÁÁÁÁÁ
VID = 100 mA
IOH = –5 mA
†Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 14
VID = –1 V
VID = –100 mV
VDD = 5 V
IOL = 5 mA
TA = 25°C
600
500
400
321
700
4
VIC – Common-Mode Input Voltage – V
VOL – Low-Level Output Voltage – mV
300 0
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
0.5 1.5 2.5 3.3
ÁÁ
ÁÁ
VOL
Figure 15
VID = –100 mV
VID = –2.5 V
VID = –1 V
TA = 25°C
IOL = 5 mA
VDD = 10 V
108642
500
450
400
350
300
VIC – Common-Mode Input Voltage – V
0
250
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
VOL – Low-Level Output Voltage – mV
ÁÁ
ÁÁ
VOL
13 579
Figure 16
TA = 25°C
VIC = |VID/2|
IOL = 5 mA
0
100
200
300
400
500
600
700
800
–8–6–4–2–10
VID – Differential Input Voltage – V
0
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
–1–3–5–7–9
VOL – Low-Level Output Voltage – mV
ÁÁ
ÁÁ
VOL
ÎÎÎÎÎ
ÎÎÎÎÎ
VDD = 10 V
ÎÎÎÎ
ÎÎÎÎ
VDD = 5 V
Figure 17
VDD = 5 V
800
700
600
500
400
300
200
100
1007550250–25–50
900
125
TA – Free-Air Temperature – °C
0–75
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
VOL – Low-Level Output Voltage – mV
ÁÁÁ
ÁÁÁ
VOL
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
IOL = 5 mA
VID = –1 V
VIC = 0.5 V
ÎÎÎÎÎ
ÎÎÎÎÎ
VDD = 10 V
†Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 18
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
VDD = 4 V
VDD = 3 V
ÎÎÎÎÎ
TA = 25°C
ÎÎÎÎÎ
ÎÎÎÎÎ
VIC = 0.5 V
ÎÎÎÎÎ
ÎÎÎÎÎ
VID = –1 V
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
7654321
08
1
IOL – Low-Level Output Current – mA
0
VOL – Low-Level Output Voltage – V
ÁÁ
ÁÁ
ÁÁ
VOL
ÎÎÎÎÎ
VDD = 5 V
Figure 19
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
VDD = 16 V
VDD = 10 V
ÎÎÎÎÎÎ
VID = –1 V
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
VIC = 0.5 V
ÎÎÎÎÎ
ÎÎÎÎÎ
TA = 25°C
2.5
2
1.5
1
0.5
252015105
030
3
IOL – Low-Level Output Current – mA
0
VOL – Low-Level Output Voltage – V
ÁÁ
ÁÁ
ÁÁ
VOL
Figure 20
0VDD – Supply Voltage – V
2000
16
02 4 6 8 10 12 14
200
400
600
800
1000
1200
1400
1600
1800 RL = 1 MΩTA = –55°C
–40°C
TA = 0°C
ÎÎ
ÎÎ
70°C
ÎÎ
85°C
125°C
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
SUPPLY VOLTAGE
ÎÎ
25°C
AVD – Large-Signal Differential
Á
Á
Á
AVD
V oltage Amplification – V/mV
Figure 21
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
1007550250–25–50
0125
TA – Free-Air Temperature – °C
–75
RL = 1 MΩ
VDD = 5 V
VDD = 10 V
1800
1600
1400
1200
1000
800
600
400
200
2000
AVD – Large-Signal Differential
ÁÁ
ÁÁ
ÁÁ
AVD
V oltage Amplification – V/mV
†Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 22
0.1 125
10000
45 65 85 105
1
10
100
1000
25
IIB and IIO – Input Bias and Offset Currents – pA
TA – Free-Air Temperature – °C
INPUT BIAS CURRENT AND INPUT OFFSET CURREN
T
vs
FREE-AIR TEMPERATURE
IB
IIIO
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
VDD = 10 V
VIC = 5 V
See Note A
ÎÎ
IIB
ÎÎ
IIO
NOTE A: The typical values of input bias current and input offset
current below 5 pA were determined mathematically. Figure 23
COMMON-MODE
INPUT VOLTAGE POSITIVE LIMIT
vs
SUPPLY VOLTAGE
0
VI – Common-Mode Input Voltage – V
VDD – Supply Voltage – V
16
16
0246 8 10 12 14
2
4
6
8
10
12
14 TA = 25°C
ÁÁ
ÁÁ
VIC
Figure 24
No Load
VO = VDD/2
0°C
–40°C
80
70
60
50
40
30
20
10
1412108642
016
90
VDD – Supply Voltage – V
IDD – Supply Current – mA
0
125°C
70°C
25°C
TA = –55°C
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
ÁÁ
ÁÁ
DD
IAµ
Figure 25
50
40
30
20
10
1007550250–25–50
0125
60
TA – Free-Air Temperature – °C
–75
VDD = 5 V
VDD = 10 V
No Load
VO = VDD/2
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
IDD – Supply Current – mA
ÁÁ
ÁÁ
DD
IAµ
†Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 26
See Figure 1
TA = 25°C
0
SR – Slew Rate – V/s
VDD – Supply Voltage – V
0.07
16
0.00 2 4 6 8 10 12 14
0.01
0.02
0.03
0.04
0.05
0.06
SLEW RATE
vs
SUPPLY VOLTAGE
CL = 20 pF
RL =1 MΩ
VI(PP) = 1 V
AV = 1
sµ
Figure 27
VI(PP) = 5.5 V
VDD = 10 V
–75 TA – Free-Air Temperature – °C
0.07
125
0.00 –50 –25 0 25 50 75 100
0.01
0.02
0.03
0.04
0.05
0.06
SLEW RATE
vs
FREE-AIR TEMPERATURE
RL =1 MΩ
CL = 20 pF
AV = 1
See Figure 1
VI(PP) = 1 V
VDD = 10 V
VI(PP) = 1 V
VDD = 5 V
VI(PP) = 2.5 V
VDD = 5 V
SR – Slew Rate – V/s sµ
Figure 28
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
1007550250–25–50 125
TA – Free-Air Temperature – °C
Normalized Slew Rate
–75
NORMALIZED SLEW RATE
vs
FREE-AIR TEMPERATURE
CL = 20 pF
RL =1 MΩ
VIPP = 1 V
AV = 1
ÎÎÎÎÎ
ÎÎÎÎÎ
VDD = 10 V
ÎÎÎÎ
VDD = 5 V
Figure 29
101
9
8
7
6
5
4
3
2
1
0100
10
f – Frequency – kHz
0.1
MAXIMUM-PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
ÁÁ
ÁÁ
ÁÁ
RL = 1 MΩ
See Figure 1
ÎÎÎÎ
ÎÎÎÎ
VDD = 5 V
TA = –55°C
TA = 25°C
TA = 125°C
ÎÎÎÎ
ÎÎÎÎ
VDD = 10 V
– Maximum Peak-to-Peak Output Voltage – V
VO(PP)
†Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 30
VDD = 5 V
VI = 10 mV
CL = 20 pF
See Figure 3
–75
B1 – Unity-Gain Bandwidth – kHz
TA – Free-Air Temperature – °C
150
125
30 –50 –25 0 25 50 75 100
50
70
90
110
130
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
B1
Figure 31
0VDD – Supply Voltage – V
140
16
50 2 4 6 8 10 12 14
60
70
80
90
100
110
120
130
See Figure 3
TA = 25°C
CL = 20 pF
VI = 10 mV
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
B1 – Unity-Gain Bandwidth – kHz
B1
1f – Frequency – Hz 1 M10 100 1 k 10 k 100 k
Phase Shift
AVD
ÎÎÎÎÎ
Phase Shift
180°
0°
30°
60°
90°
120°
150°
107
106
0.1
1
105
104
103
102
101
VDD = 10 V
RL = 1 MΩ
TA = 25°C
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
AVD – Large-Signal Differential
ÁÁ
ÁÁ
ÁÁ
AVD V oltage Amplification
Figure 32
†Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
ÎÎÎÎÎ
ÎÎÎÎÎ
Phase Shift
AVD
VDD = 10 V
RL = 1 MΩ
TA = 25°C
Phase Shift
180°
0°
30°
60°
90°
120°
150°
100 k10 k1 k10010 1 M
f – Frequency – Hz
1
10 7
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
10 6
0.1
1
10 5
10 4
10 3
10 2
10 1
AVD – Large-Signal Differential
ÁÁ
ÁÁ
ÁÁ
AVD V oltage Amplification
Figure 33
Figure 34
0
m – Phase Margin
VDD – Supply Voltage – V
42°
16
30°2 4 6 8 10 12 14
32°
34°
36°
38°
40°
See Figure 3
VI = 10 mV
TA = 25°C
CL = 20 pF
Á
Á
m
φ
PHASE MARGIN
vs
SUPPLY VOLTAGE
Figure 35
See Figure 3
VI = 10 mV
CL = 20 pF
VDD = 5 mV
–75
TA – Free-Air Temperature – °C
40°
125
20°–50 –25 0 25 50 75 100
24°
28°
32°
36°
m – Phase Margin
ÁÁ
ÁÁ
m
φ
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
†Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 36
VDD = 5 mV
TA = 25°C
See Figure 3
VI = 10 mV
0CL – Capacitive Load – pF
37°
100
25°20 40 60 80
27°
29°
31°
33°
35°
PHASE MARGIN
vs
CAPACITIVE LOAD
m – Phase Margin
ÁÁ
ÁÁ
m
φ
10 30 50 70 90
Figure 37
See Figure 2
RS = 20 Ω
VDD = 5 V
1
VN – Equivalent Input Noise Voltage – nV/Hz
f – Frequency – Hz 100
0
10 100
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
TA = 25°C
200
175
150
125
100
75
50
25
0
Vn
ÁÁ
ÁÁ
ÁÁ
ÁÁ
nV/ Hz
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
single-supply operation
While the TLC27L2 and TLC27L7 perform well using dual power supplies (also called balanced or split
supplies), the design is optimized for single-supply operation. This design includes an input common-mode
voltage range that encompasses ground as well as an output voltage range that pulls down to ground. The
supply voltage range extends down to 3 V (C-suffix types), thus allowing operation with supply levels commonly
available for TTL and HCMOS; however, for maximum dynamic range, 16-V single-supply operation is
recommended.
Many single-supply applications require that a voltage be applied to one input to establish a reference level that
is above ground. A resistive voltage divider is usually sufficient to establish this reference level (see Figure 38).
The low input bias current of the TLC27L2 and TLC27L7 permits the use of very large resistive values to
implement the voltage divider, thus minimizing power consumption.
The TLC27L2 and TLC27L7 work well in conjunction with digital logic; however, when powering both linear
devices and digital logic from the same power supply, the following precautions are recommended:
1. Power the linear devices from separate bypassed supply lines (see Figure 39); otherwise, the linear
device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital
logic.
2. Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive
decoupling is often adequate; however, high-frequency applications may require RC decoupling.
–
+
0.01 µF
C
R3
VREF
VI
R1 R2
VDD
VO
R4
VREF
+
VDD R3
R1
)
R3
VO
+ǒ
VREF –VI
Ǔ
R4
R2
)
VREF
Figure 38. Inverting Amplifier With Voltage Reference
(b) SEPARATE BYPASSED SUPPLY RAILS (preferred)
(a) COMMON SUPPLY RAILS
–
+
–
+
Logic Logic Logic
Supply
Power
LogicLogicLogic
Supply
Power
VO
VO
Figure 39. Common Versus Separate Supply Rails
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
input characteristics
The TLC27L2 and TLC27L7 are specified with a minimum and a maximum input voltage that, if exceeded at
either input, could cause the device to malfunction. Exceeding this specified range is a common problem,
especially in single-supply operation. Note that the lower range limit includes the negative rail, while the upper
range limit is specified at VDD –1 V at TA = 25°C and at VDD –1.5 V at all other temperatures.
The use of the polysilicon-gate process and the careful input circuit design gives the TLC27L2 and TLC27L7
very good input offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltage
drift in CMOS devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus
dopant implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate)
alleviates the polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude.
The offset voltage drift with time has been calculated to be typically 0.1 µV/month, including the first month of
operation.
Because of the extremely high input impedance and resulting low bias current requirements, the TLC27L2 and
TLC27L7 are well suited for low-level signal processing; however, leakage currents on printed circuit boards
and sockets can easily exceed bias current requirements and cause a degradation in device performance. It
is good practice to include guard rings around inputs (similar to those of Figure 4 in the Parameter Measurement
Information section). These guards should be driven from a low-impedance source at the same voltage level
as the common-mode input (see Figure 40).
Unused amplifiers should be connected as grounded unity-gain followers to avoid possible oscillation.
noise performance
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage
differential amplifier . The low input bias current requirements of the TLC27L2 and TLC27L7 result in a very low
noise current, which is insignificant in most applications. This feature makes the devices especially favorable
over bipolar devices when using values of circuit impedance greater than 50 kΩ, since bipolar devices exhibit
greater noise currents.
VI
–
+
–
+
VI
(b) INVERTING AMPLIFIER
–
+
(c) UNITY-GAIN AMPLIFIER(a) NONINVERTING AMPLIFIER
VI
VOVOVO
Figure 40. Guard-Ring Schemes
output characteristics
The output stage of the TLC27L2 and TLC27L7 is designed to sink and source relatively high amounts of current
(see typical characteristics). If the output is subjected to a short-circuit condition, this high current capability can
cause device damage under certain conditions. Output current capability increases with supply voltage.
All operating characteristics of the TLC27L2 and TLC27L7 were measured using a 20-pF load. The devices
drive higher capacitive loads; however, as output load capacitance increases, the resulting response pole
occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation (see Figure 41). In many
cases, adding a small amount of resistance in series with the load capacitance alleviates the problem.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
output characteristics (continued)
(b) CL = 260 pF, RL = NO LOAD(a) CL = 20 pF, RL = NO LOAD
VI
–2.5 V
CL
VO
2.5 V
–
+
TA = 25°C
f = 1 kHz
VI(PP) = 1 V
(d) TEST CIRCUIT
(c) CL = 310 pF, RL = NO LOAD
Figure 41. Effect of Capacitive Loads and Test Circuit
Although the TLC27L2 and TLC27L7 possess excellent high-level output voltage and current capability,
methods for boosting this capability are available, if needed. The simplest method involves the use of a pullup
resistor (RP) connected from the output to the positive supply rail (see Figure 42). There are two disadvantages
to the use of this circuit. First, the NMOS pulldown transistor N4 (see equivalent schematic) must sink a
comparatively large amount of current. In this circuit, N4 behaves like a linear resistor with an on-resistance
between approximately 60 Ω and 180 Ω, depending on how hard the operational amplifier input is driven. With
very low values of RP, a voltage offset from 0 V at the output occurs. Second, pullup resistor RP acts as a
drain load to N4 and the gain of the operational amplifier is reduced at output voltage levels where N5 is not
supplying the output current.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
29
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
output characteristics (continued)
Figure 42. Resistive Pullup to Increase VOH
IL
IF
IP
RL
R1 R2
VO
RP
VDD
VI
–
+
RP
+
VDD–VO
IF
)
IL
)
IP
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
IP = Pullup current required
by the operational amplifier
(typically 500 µA)
Figure 43. Compensation for
Input Capacitance
C
–
+
VO
feedback
Operational amplifier circuits nearly always employ feedback, and since feedback is the first prerequisite for
oscillation, some caution is appropriate. Most oscillation problems result from driving capacitive loads
(discussed previously) and ignoring stray input capacitance. A small-value capacitor connected in parallel with
the feedback resistor is an effective remedy (see Figure 43). The value of this capacitor is optimized empirically .
electrostatic discharge protection
The TLC27L2 and TLC27L7 incorporate an internal electrostatic discharge (ESD) protection circuit that
prevents functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care
should be exercised, however, when handling these devices, as exposure to ESD may result in the degradation
of the device parametric performance. The protection circuit also causes the input bias currents to be
temperature dependent and have the characteristics of a reverse-biased diode.
latch-up
Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC27L2 and
TLC27L7 inputs and outputs were designed to withstand –100-mA surge currents without sustaining latch-up;
however, techniques should be used to reduce the chance of latch-up whenever possible. Internal protection
diodes should not, by design, be forward biased. Applied input and output voltage should not exceed the supply
voltage by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators.
Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the
supply rails as close to the device as possible.
The current path established if latch-up occurs is usually between the positive supply rail and ground and can
be triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply
voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the
forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of
latch-up occurring increases with increasing temperature and supply voltages.
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
–
+
–
+
500 kΩ
500 kΩ
5 V
500 kΩ
0.1 µF
500 kΩ
VO2
VO1
1/2
TLC27L2
TLC27L2
1/2
Figure 44. Multivibrator
Reset
Set
TLC27L2
1/2
–
+
100 kΩ
VDD
33 kΩ
100 kΩ
100 kΩ
NOTE: VDD = 5 V to 16 V
Figure 45. Set/Reset Flip-Flop
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
31
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
–
+
VDD
VO
90 kΩ
9 kΩ
X1
11B
TLC4066
VDD
VI
S1
S2
C
A
C
A2
X2 2B
1 kΩ
Analog
Switch
1/2
TLC27L7
SELECT: S1S2
AV10 100
NOTE: VDD = 5 V to 12 V
Figure 46. Amplifier With Digital Gain Selection
–
+
10 kΩ
VO
100 kΩ
VDD
20 kΩ
VI
1/2
TLC27L2
NOTE: VDD = 5 V to 16 V
Figure 47. Full-Wave Rectifier
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
32 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
TLC27L2
1/2
VI
0.016 µF
VO
10 kΩ
5 V
–
+
10 kΩ
0.016 µF
NOTE: Normalized to fc = 1 kHz and RL = 10 kΩ
Figure 48. Two-Pole Low-Pass Butterworth Filter
–
+
VO
1/2
TLC27L7
R2
100 kΩ
R1
10 kΩ
100 kΩ
R2
VIB
VDD
VIA
R1
10 kΩ
NOTE: VDD = 5 V to 16 V
VO
+
R2
R1
ǒ
VIB –VIA
Ǔ
Figure 49. Difference Amplifier
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
5962-89494032A OBSOLETE LCCC FK 20 None Call TI Call TI
5962-8949403PA OBSOLETE CDIP JG 8 None Call TI Call TI
5962-89494042A OBSOLETE LCCC FK 20 None Call TI Call TI
5962-8949404PA OBSOLETE CDIP JG 8 None Call TI Call TI
TLC27L2ACD ACTIVE SOIC D 8 75 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L2ACDR ACTIVE SOIC D 8 2500 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L2ACP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU Level-NC-NC-NC
TLC27L2ACPSLE OBSOLETE SO PS 8 None Call TI Call TI
TLC27L2ACPSR ACTIVE SO PS 8 2000 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2AID ACTIVE SOIC D 8 75 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L2AIDR ACTIVE SOIC D 8 2500 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L2AIP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU Level-NC-NC-NC
TLC27L2AMFKB OBSOLETE LCCC FK 20 None Call TI Call TI
TLC27L2AMJG OBSOLETE CDIP JG 8 None Call TI Call TI
TLC27L2AMJGB OBSOLETE CDIP JG 8 None Call TI Call TI
TLC27L2BCD ACTIVE SOIC D 8 75 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L2BCDR ACTIVE SOIC D 8 2500 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L2BCP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU Level-NC-NC-NC
TLC27L2BID ACTIVE SOIC D 8 75 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L2BIDR ACTIVE SOIC D 8 2500 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L2BIP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU Level-NC-NC-NC
TLC27L2CD ACTIVE SOIC D 8 75 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L2CDR ACTIVE SOIC D 8 2500 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L2CP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU Level-NC-NC-NC
TLC27L2CPSR ACTIVE SO PS 8 2000 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2CPW ACTIVE TSSOP PW 8 150 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2CPWLE OBSOLETE TSSOP PW 8 None Call TI Call TI
TLC27L2CPWR ACTIVE TSSOP PW 8 2000 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2ID ACTIVE SOIC D 8 75 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L2IDR ACTIVE SOIC D 8 2500 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 22-Feb-2005
Addendum-Page 1
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TLC27L2IP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU Level-NC-NC-NC
TLC27L2IPW ACTIVE TSSOP PW 8 150 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2IPWLE OBSOLETE TSSOP PW 8 None Call TI Call TI
TLC27L2IPWR ACTIVE TSSOP PW 8 2000 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2MD ACTIVE SOIC D 8 75 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2MDR ACTIVE SOIC D 8 2500 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2MFKB OBSOLETE LCCC FK 20 None Call TI Call TI
TLC27L2MJG OBSOLETE CDIP JG 8 None Call TI Call TI
TLC27L2MJGB OBSOLETE CDIP JG 8 None Call TI Call TI
TLC27L7CD ACTIVE SOIC D 8 75 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L7CDR ACTIVE SOIC D 8 2500 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L7CP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU Level-NC-NC-NC
TLC27L7CPSR ACTIVE SO PS 8 2000 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L7ID ACTIVE SOIC D 8 75 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L7IDR ACTIVE SOIC D 8 2500 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC27L7IP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU Level-NC-NC-NC
TLC27L7MFKB OBSOLETE LCCC FK 20 None Call TI Call TI
TLC27L7MJG OBSOLETE CDIP JG 8 None Call TI Call TI
TLC27L7MJGB OBSOLETE CDIP JG 8 None Call TI Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
PACKAGE OPTION ADDENDUM
www.ti.com 22-Feb-2005
Addendum-Page 2
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 22-Feb-2005
Addendum-Page 3
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