HIP1030 1A High Side Driver with Overload Protection December 1997 Features Description * Over Operating Temperature Range . . -40oC to 125oC - Max VSAT at 1A . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1V - Current Switching Capability . . . . . . . . . . . . . . . . .1A - Power Supply Range . . . . . . . . . . . . . . . . 4.5V to 25V The HIP1030 is a High Side Driver Power Integrated Circuit designed to switch power supply voltage to an output load. It is the equivalent of a PNP pass transistor operated as a protected high side current switch in the saturated ON state with low forward voltage drop at the maximum rated current. The HIP1030 has low output leakage and low idle current in the OFF state. * Over-Voltage Shutdown Protected * Over-Current Limiting The Functional Block Diagram for the HIP1030 shows the protection control circuit functions of over-current, overvoltage and over-temperature. A small metal resistor senses overcurrent in the power supply path of the pass transistor and load. Overvoltage detection and shutdown of the output driver occurs when a comparator determines that the supply voltage has exceeded a comparator reference level. Over-temperature is sensed from a VBE differential sense element that is thermally close to the output drive transistor. In addition to the input detected overvoltage protection, negative peak voltage of a switched inductive load is clamped with an internal zener diode. An internal bandgap voltage source provides a stable voltage reference over the operating temperature range, providing bias and reference control for the protection circuits. * Thermal Limiting Protection * Negative Output Voltage Clamp * CMOS/TTL Logic Level Control Input * Load Dump . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60VPEAK * Reverse Battery Protection to -16V Applications * Motor Driver/Controller * Driver for Solenoids, Relays and Lamps * MOSFET and IGBT Driver The HIP1030 is particularly well suited for driving lamps, relays, and solenoids in automotive and industrial control applications where voltage and current overload protection at high temperatures is required. The HIP1030 is supplied in a 5 lead TS-001AA Power SIP package. * Driver for Temperature Controller Ordering Information PART NUMBER HIP1030AS TEMP. RANGE (oC) -40 to 125 PKG. NO. PACKAGE 5 Ld TS-001AA SIP Z5.067C Pinout Functional Block Diagram HIP1030 (SIP) TOP VIEW VCC VOUT RS 2 1 VBATT SUPPLY OVERVOLTAGE SHUTDOWN CURRENT LIMIT THERMAL LIMIT NEG. CLAMP ZENER CONTROL CIRCUIT LOAD 5 VIN (CONTROL) 4 GND 3 TAB GND 2 VOUT (LOAD) 1 VCC (SUPPLY) VIN 5 HIP1030 CONTROL 3 GND CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 1 TAB 4 GND File Number 2788.7 HIP1030 Absolute Maximum Ratings Thermal Information Maximum Supply Voltage VCC . . . See O.V. Shutdown Limit, VOVSD Input Voltage, VIN (Note 1) . . . . . . . . . . . . . . . . . -1V to (VCC - 0.5V) Load Current, IOUT . . . . . . . . . . . . . . . . . . . . . . . . . Internal Limiting Load Dump (Survival) . . . . . . . . . . . . . . . . . . . . . . . . . . 60VPEAK Reverse Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -16V Thermal Resistance (Typical, Note 2) JA (oC/W) JC (oC/W) Plastic SIP Package . . . . . . . . . . . . . . 50 4 Maximum Power Dissipation (Note 3) At TA = 125oC, Infinite Heat Sink. . . . . . . . . . . . . . . . . . . . . 6.25W Maximum Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-40oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (Lead Tips Only) Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 125oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. The Input Control Voltage, VIN shall not be greater than (VCC - 0.5V) and shall not exceed +7V when VCC is greater than 7.5V. 2. JA is measured with the component mounted on an evaluation PC board in free air. 3. The worst case thermal resistance, JC for the SIP TS-001AA 5 lead package is 4oC/W. The calculation for dissipation and junction temperature rise due to dissipation is: PD = (VCC-VOUT)(IOUT) + (VCC)(ICCMAX - IOUT) or (VCC)(ICCMAX) - (VOUT)(IOUT) TJ = TAMBIENT + (PD) (JC) for an infinite Heat Sink. Refer to Figure 1 for Derating based on Dissipation and Thermal Resistance. Derating from 150oC is based on the reciprocal of thermal resistance, JC + HS . For example: Where JC = 4oC/W and given HS = 6oC/W as the thermal resistance of an external Heat Sink, the junction-to-air thermal resistance, JA = 10oC/W. Therefore, for the maximum allowed dissipation, derate 0.1W/oC for each degree from TAMB to the maximum rated junction temperature of 150oC. If TAMB = 100oC, the maximum PD is (150 - 100) x 0.1W/oC = 5W. Electrical Specifications PARAMETER Operating Voltage Range Over-Voltage Shutdown TA = -40oC to 125oC, VIN = 2V, VCC = +12V, Unless Otherwise Specified SYMBOL TEST CONDITIONS VCC VOVSD RL = 1K; VIN = 2V Over-Temperature Limiting TSD Negative Pulse Output Clamp Voltage VCL ICL = -100mA; VCC = 4.5V to 25V Short Circuit Current Limiting ISC (Note 4) Input Control ON MIN TYP MAX UNITS 4.5 - 25 V 26 33 38 V - 150 - oC (VCC - 28) V (VCC - 35) (VCC - 30.5) 1.1 1.6 2.5 A VIH 2.0 - - V Input Control OFF VIL - - 0.8 V Input Current High IIH VIN = 5.5V, VCC = 6V to 24V 6 - 40 A Input Current Low IIL VIN = 0.8V, VCC = 6V to 24V 6 - 30 A Supply Current, Full Load Input Control ON ICCMAX VIN = 2V; IOUT = 1.0A; - 1.05 1.1 A Supply Current, No Load Input Control OFF ICCMIN VIN = 0V; IOUT = 0A; - 55 100 A IOUT = 1A; VCC = 4.5V to 25V - 0.6 1 V VIN = 0.8V; VCC = 6V to 24V - 4 50 A Input-Output Forward Voltage Drop (VCC - VOUT) Output Leakage VSAT IOUT_LK Turn ON Time tON RL = 80; (Note 5) - 5 20 s Turn OFF Time tOFF RL = 80; (Note 5) - 25 65 s NOTES: 4. Short circuit current will be reduced when thermal shutdown occurs. Testing of short circuit current may require a short duration pulse. See Figure 7. 5. Refer to Figures 3A and 3B for typical switching speeds with a 20 Load. 2 HIP1030 Typical Applications 0.47F HIP1030 HIGH SIDE DRIVER VBATT POWER SUPPLY LOADS: RELAYS SOLENOIDS LAMPS MOTORS VOUT RS 1 2 VCC OVERVOLTAGE SHUTDOWN CURRENT LIMIT CONTROL CIRCUIT THERMAL LIMIT NEG. CLAMP ZENER TYPICAL LOAD VCC VIN VOUT GND 5 VSAT HIP1030 CMOS/TTL INPUT 3 LOGIC SWITCH TO VIN TAB 4 VCL GND GND VCLAMP Typical Performance Curves 1.5 WITH EXT. 0oC/W H.S. (INFINITE HEAT SINK) 12 RL = 10, VCC = VSAT + IL RL ; VSAT = (VCC - VOUT) VOLTAGE DROP (V) DISSIPATION WATTS (W) 16 WITH EXT. 6oC/W H. S. 8 4 INPUT: VIN = 5V DATA TAKEN USING 110CM x 110CM FLAT ALUM. HEAT SINK 1.0 IL = 1.25A IL = 1.0 A 0.5 IL = 0.5A 0 -50 0 50 100 0 -50 150 AMBIENT TEMPERATURE (oC) 100 150 FIGURE 2. TYPICAL FORWARD VOLTAGE DROP, VSAT CHARACTERISTICS vs AMBIENT OPERATING TEMPERATURE 15 VCC = 12V, LOAD = 20 IN PARALLEL WITH 2200pF; TA = 25oC INPUT: VIN = 0V to 2V STEP, 1ms PERIOD, 500s PULSE OUTPUT PULSE VOLTAGE (V) OUTPUT PULSE VOLTAGE (V) 50 AMBIENT TEMPERATURE (oC) FIGURE 1. DISSIPATION DERATING CURVES 15 0 tON 10 5 VCC = 12V, LOAD = 20 IN PARALLEL WITH 2200pF; TA = 25oC INPUT: VIN = 2V to 0V STEP, 1ms PERIOD, 500s PULSE 10 5 tOFF 0 0 0 1 0 2 FIGURE 3A. OUTPUT TURN-ON TIME (s) 10 20 FIGURE 3B. OUTPUT TURN-OFF TIME (s) FIGURE 3. TYPICAL RISE TIME AND FALL TIME CHARACTERISTICS OF THE HIP1030 WITH A RESISTIVE AND CAPACITIVE LOAD. THE TURN-ON TIME OF APPROXIMATELY 1.1s IS PRIMARILY DETERMINED BY THE VCC SUPPLY. THE OUTPUT FALL TIME IS LIMITED BY RC TIME CONSTANT OF THE LOAD. 3 HIP1030 Typical Performance Curves VCC = 15V, LOAD = 70mH + 22.3 IN SERIES; TA = 25oC INPUT: VIN = 0V to 2V STEP, 50% DUTY CYCLE PULSE VCC = 12V, LOAD = 16; TA = 25oC INPUT: VIN = 0V to 2V STEP, 50% DUTY CYCLE PULSE OUTPUT PULSE VOLTAGE (V) OUTPUT PULSE VOLTAGE (V) 15 (Continued) 10 5 15 10 5 0 NEGATIVE INDUCTIVE SWITCHING PULSE -5 -10 -15 0 0 0.4 0.8 1.2 SWITCHING TIME (ms) 1.6 0 2.0 FIGURE 4. TYPICAL SWITCHING CHARACTERISTIC OF THE HIP1030 WITH AN OUTPUT RESISTIVE LOAD 6 VCC = 4.5V, LOAD = 8, TA = 25oC INPUT: VIN = 0V to 2V STEP, 1ms PERIOD, 500s PULSE tON 4 2 0 5 FIGURE 5. TYPICAL OUTPUT INDUCTIVE LOAD SWITCHING PULSE. THE NEGATIVE CLAMP VOLTAGE (VCC -31V) FOR THE INDUCTIVE KICK PULSE IS REFERENCED TO THE VCC SUPPLY INPUT OUTPUT PULSE VOLTAGE (V) OUTPUT PULSE VOLTAGE (V) 6 1 2 3 4 INDUCTIVE PULSE SWITCHING TIME (ms) VCC = 4.5V, LOAD = 8, TA = 25oC INPUT: VIN = 0V to 2V STEP, 1ms PERIOD, 500s PULSE 4 2 tOFF 0 0 1 2 3 4 0 5 4 FIGURE 6A. TURN-ON TIME (s) 8 12 16 20 FIGURE 6B. TURN-OFF TIME (s) FIGURE 6. TYPICAL LOW SUPPLY VOLTAGE SWITCHING CHARACTERISTICS OF THE HIP1030. THE TURN-ON AND TURN-OFF CHARACTERISTICS ARE SHOWN FOR VCC = 4.5V. VCC = 24V, LOAD = 1; TA = 25oC VCC VARIED FROM 4V TO 36V, NO LOAD 25 INPUT: VIN = 2V (DC); TA = 25oC INPUT: VIN = 2V, 1ms PERIOD, 100s PULSE SUPPLY CURRENT (mA) OUTPUT PULSE VOLTAGE (V) 3 2 CURRENT LIMITING 1 OVER-VOLTAGE SHUTDOWN 20 15 10 5 0 0 0 40 80 120 OUTPUT PULSE TIME (s) 160 200 0 5 10 15 20 25 30 35 40 45 50 SUPPLY VOLTAGE (V) FIGURE 7. TYPICAL OUTPUT CURRENT PULSE WHEN SWITCHING INTO A LOW IMPEDANCE (1), OR SHORTED LOAD. FOR THE CONDITIONS SHOWN, OUTPUT CURRENT LIMITING IS ~1.7A FIGURE 8. TYPICAL IDLE CURRENT vs SUPPLY VOLTAGE WITH NO LOAD 4 HIP1030 Single-In-Line Plastic Packages (SIP) OP E Z5.067C (ALTERNATE VERSION) 5 LEAD PLASTIC SINGLE-IN-LINE PACKAGE A A1 INCHES Q H1 D L1 b1 c L 60o 1 2 3 4 5 e b J1 e1 MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.170 0.180 4.32 4.57 - A1 0.048 0.052 1.22 1.32 3, 4 b 0.030 0.034 0.77 0.86 3, 4 b1 0.031 0.041 0.79 1.04 3, 4 c 0.018 0.022 0.46 0.55 3, 4 D 0.590 0.610 14.99 15.49 - E 0.395 0.405 10.04 10.28 - e 0.067 TYP 1.70 TYP 5 e1 0.268 BSC 6.80 BSC 5 H1 0.235 0.255 5.97 6.47 - J1 0.095 0.105 2.42 2.66 6 L 0.530 0.550 13.47 13.97 - L1 0.110 0.130 2.80 3.30 2 OP 0.149 0.153 3.79 3.88 - Q 0.105 0.115 2.66 2.92 Rev. 1 4/96 NOTES: 1. These dimensions are within allowable dimensions of Rev. A of JEDEC TS-001AA outline dated 8-89. 2. Solder finish uncontrolled in this area. 3. Lead dimension (without solder). 4. Add typically 0.002 inches (0.05mm) for solder plating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 5