Low Cost 270 MHz Differential Receiver Amplifiers AD8129/AD8130 CONNECTION DIAGRAM High speed AD8130: 270 MHz, 1090 V/s @ G = +1 AD8129: 200 MHz, 1060 V/s @ G = +10 High CMRR 94 dB min, dc to 100 kHz 80 dB min @ 2 MHz 70 dB @ 10 MHz High input impedance: 1 M differential Input common-mode range 10.5 V Low noise AD8130: 12.5 nV/Hz AD8129: 4.5 nV/Hz Low distortion, 1 V p-p @ 5 MHz AD8130, -79 dBc worst harmonic @ 5 MHz AD8129, -74 dBc worst harmonic @ 5 MHz User-adjustable gain No external components for G = +1 Power supply range +4.5 V to 12.6 V Power-down 8 -IN 7 +VS 3 6 OUT REF 4 5 FB -V S 2 PD + Figure 1. The AD8129/AD8130 are differential-to-single-ended amplifiers with extremely high CMRR at high frequency. Therefore, they can also be effectively used as high speed instrumentation amps or for converting differential signals to single-ended signals. The AD8129 is a low noise, high gain (10 or greater) version intended for applications over very long cables, where signal attenuation is significant. The AD8130 is stable at a gain of 1 and can be used for applications where lower gains are required. Both have user-adjustable gain to help compensate for losses in the transmission line. The gain is set by the ratio of two resistor values. The AD8129/AD8130 have very high input impedance on both inputs, regardless of the gain setting. APPLICATIONS High speed differential line receivers Differential-to-single-ended converters High speed instrumentation amps Level shifting GENERAL DESCRIPTION The AD8129/AD8130 are designed as receivers for the transmission of high speed signals over twisted-pair cables to work with the AD8131 or AD8132 drivers. Either can be used for analog or digital video signals and for high speed data transmission. 120 110 100 90 CMRR (dB) AD8129/ AD8130 +IN 1 02464-001 FEATURES The AD8129/AD8130 have excellent common-mode rejection (70 dB @ 10 MHz), allowing the use of low cost, unshielded twisted-pair cables without fear of corruption by external noise sources or crosstalk. The AD8129/AD8130 have a wide power supply range from single +5 V to 12 V, allowing wide commonmode and differential-mode voltage ranges while maintaining signal integrity. The wide common-mode voltage range enables the driver-receiver pair to operate without isolation transformers in many systems where the ground potential difference between drive and receive locations is many volts. The AD8129/AD8130 have considerable cost and performance improvements over op amps and other multiamplifier receiving solutions. 80 +VS PD 70 3 60 1 VIN 7 8 50 6 VOUT 4 2 10k 100k 1M FREQUENCY (Hz) 10M 100M 02464-002 5 30 Figure 2. AD8129 CMRR vs. Frequency RG RF -VS VOUT = VIN [1+(R F/RG)] 02464-003 40 Figure 3. Typical Connection Configuration Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c) 2005 Analog Devices, Inc. All rights reserved. AD8129/AD8130 TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 32 Applications....................................................................................... 1 Op Amp Configuration ............................................................. 32 Connection Diagram ....................................................................... 1 Applications..................................................................................... 33 General Description ......................................................................... 1 Basic Gain Circuits..................................................................... 33 Revision History ............................................................................... 2 Twisted-Pair Cable, Composite Video Receiver with Equalization Using an AD8130................................................... 33 AD8129/AD8130 Specifications..................................................... 3 5 V Specifications ......................................................................... 3 5 V Specifications....................................................................... 5 12 V Specifications..................................................................... 7 Absolute Maximum Ratings............................................................ 9 Thermal Resistance ...................................................................... 9 ESD Caution.................................................................................. 9 Typical Performance Characteristics ........................................... 10 AD8130 Frequency Response Characteristics........................ 10 AD8129 Frequency Response Characteristics........................ 13 AD8130 Harmonic Distortion Characteristics ...................... 16 Output Offset/Level Translator ................................................ 34 Resistorless Gain of 2 ................................................................. 35 Summer ....................................................................................... 35 Cable-Tap Amplifier .................................................................. 35 Power-Down ............................................................................... 36 Extreme Operating Conditions ................................................ 36 Power Dissipation....................................................................... 37 Layout, Grounding, and Bypassing.......................................... 38 Outline Dimensions ....................................................................... 39 Ordering Guide .......................................................................... 40 AD8129 Harmonic Distortion Characteristics ...................... 18 AD8130 Transient Response Characteristics.......................... 23 AD8129 Transient Response Characteristics.......................... 26 REVISION HISTORY 11/05--Rev. B to Rev. C Changes to 5 V Specifications......................................................... 3 Changes to Table 4 and Maximum Power Dissipation Section.. 9 Changes to Figure 16...................................................................... 11 Changes to Figure 17...................................................................... 12 3/05--Rev. 0 to Rev. A Changes to Specifications.................................................................2 Replaced Figure 3 ..............................................................................5 Changes to Ordering Guide .............................................................6 Updated Outline Dimensions....................................................... 27 Revision 0: Initial Version 9/05--Rev. A to Rev. B Extended Temperature Range...........................................Universal Deleted Figure 5................................................................................ 5 Added Thermal Resistance Section ............................................... 9 Updated Outline Dimensions ....................................................... 39 Changes to Ordering Guide .......................................................... 40 Rev. C | Page 2 of 40 AD8129/AD8130 AD8129/AD8130 SPECIFICATIONS 5 V SPECIFICATIONS AD8129 G = +10, AD8130 G = +1, TA = 25C, +VS = 5 V, -VS = 0 V, REF = 2.5 V, PD VIH, RL = 1 k, CL = 2 pF, unless otherwise noted. TMIN to TMAX = -40C to +125C, unless otherwise noted. Table 1. Model Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Rise and Fall Times Output Overdrive Recovery NOISE/DISTORTION Second Harmonic/Third Harmonic IMD Output IP3 Input Voltage Noise (RTI) Input Current Noise (+IN, -IN) Input Current Noise (REF, FB) Differential Gain Error Differential Phase Error INPUT CHARACTERISTICS Common-Mode Rejection Ratio CMRR with VOUT = 1 V p-p Common-Mode Voltage Range Differential Operating Range Differential Clipping Level Resistance Capacitance AD8129 Typ Min VOUT 0.3 V p-p VOUT = 1 V p-p VOUT 0.3 V p-p, SOIC/MSOP VOUT = 2 V p-p, 25% to 75% VOUT = 2 V p-p, 0.1% VOUT 1 V p-p, 10% to 90% 160 160 185 185 25/40 220 180 250 205 25 MHz MHz MHz 810 930 810 930 V/s 20 1.8 20 1.5 ns ns 20 30 ns VOUT = 1 V p-p, 5 MHz -68/-75 -72/-79 dBc VOUT = 2 V p-p, 5 MHz VOUT = 1 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz f 10 kHz f 100 kHz f 100 kHz -62/-64 -63/-70 -56/-58 -67 25 4.5 1 1.4 -65/-71 -60/-62 -68/-68 -70 26 12.3 1 1.4 dBc dBc dBc dBc dBm nV/Hz pA/Hz pA/Hz AD8130, G = +2, NTSC 100 IRE, RL 150 AD8130, G = +2, NTSC 100 IRE, RL 150 0.3 0.13 % 0.1 0.15 Degrees 96 dB 70 80 70 72 dB dB dB 1.25 to 3.7 0.5 0.75 1 4 3 4 1.25 to 3.8 2.5 2.8 6 4 3 4 DC to 100 kHz, VCM = 1.5 V to 3.5 V VCM = 1 V p-p @ 1 MHz VCM = 1 V p-p @ 10 MHz VCM = 1 V p-p @ 1 kHz, VOUT = 0.5 V dc V+IN - V-IN = 0 V 86 96 Min 86 80 0.6 Differential Common mode Differential Common mode Max AD8130 Typ Conditions Max 80 Rev. C | Page 3 of 40 0.85 2.3 Unit V 3.3 V V M M pF pF AD8129/AD8130 Model Parameter DC PERFORMANCE Closed-Loop Gain Error Open-Loop Gain Gain Nonlinearity Input Offset Voltage Input Offset Voltage vs. Supply Conditions Min VOUT = 1 V, RL 150 TMIN to TMAX VOUT = 1 V VOUT = 1 V 0.25 20 86 250 0.2 2 TMIN to TMAX TMIN to TMAX +VS = 5 V, -VS = -0.5 V to +0.5 V -VS = 0 V, +VS = +4.5 V to +5.5 V Input Bias Current (+IN, -IN) Input Bias Current (REF, FB) Input Offset Current OUTPUT PERFORMANCE Voltage Swing Output Current Short-Circuit Current Output Impedance POWER SUPPLY Operating Voltage Range Quiescent Supply Current Enable Time OPERATING TEMPERATURE RANGE 1.25 AD8130 Typ 0.1 20 71 200 0.4 20 Unit 0.6 1.4 -80 -74 3.5 -70 -100 -86 -90 -76 dB 0.5 2 0.5 2 A 1 3.5 1 3.5 A 0.8 0.4 3.9 2.25 9.9 33 0.65 1.8 5 0.08 0.2 1.1 35 -60/+55 -240 10 nA/C 0.4 A nA/C 3.9 V mA mA A/C pF 12.6 10.6 V mA A/C mA mA 35 -60/+55 -240 10 12.6 10.6 2.25 9.9 33 0.65 0.85 1 +VS - 1.5 0.85 1 +VS - 1.5 +VS - 2.5 -30 -50 PD = min VIH PD = max VIL PD +VS - 3 V PD +VS - 2 V Max -88 1.1 TMIN to TMAX PD VIL PD VIL, TMIN to TMAX PD PIN VIH VIL IIH IIL Input Resistance Min % ppm/C dB ppm mV V/C mV dB 0.08 0.2 To common TMIN to TMAX PD VIL, in powerdown mode Total supply voltage Max 5 TMIN to TMAX (+IN, -IN, REF, FB) (+IN, -IN, REF, FB) TMIN to TMAX RLOAD 150 AD8129 Typ +VS - 2.5 -30 -50 12.5 100 0.5 -40 Rev. C | Page 4 of 40 12.5 100 0.5 +125 -40 +125 V V A A k k s C AD8129/AD8130 5 V SPECIFICATIONS AD8129 G = +10, AD8130 G = +1, TA = 25C, VS = 5 V, REF = 0 V, PD VIH, RL = 1 k, CL = 2 pF, unless otherwise noted. TMIN to TMAX = -40C to +125C, unless otherwise noted. Table 2. Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Rise and Fall Times Output Overdrive Recovery NOISE/DISTORTION Second Harmonic/Third Harmonic IMD Output IP3 Input Voltage Noise (RTI) Input Current Noise (+IN, -IN) Input Current Noise (REF, FB) Differential Gain Error Differential Phase Error INPUT CHARACTERISTICS Common-Mode Rejection Ratio CMRR with VOUT = 1 V p-p Common-Mode Voltage Range Differential Operating Range Differential Clipping Level Resistance Capacitance AD8129 Typ Min VOUT 0.3 V p-p VOUT = 2 V p-p VOUT 0.3 V p-p, SOIC/MSOP VOUT = 2 V p-p, 25% to 75% VOUT = 2 V p-p, 0.1% VOUT 1 V p-p, 10% to 90% 175 170 200 190 30/50 240 140 270 155 45 MHz MHz MHz 925 1060 950 1090 V/s 20 1.7 20 1.4 ns ns 30 40 ns VOUT = 1 V p-p, 5 MHz -74/-84 -79/-86 dBc VOUT = 2 V p-p, 5 MHz VOUT = 1 V p-p, 10 MHz VOUT = 1 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz f 10 kHz f 100 kHz -68/-74 -67/-81 -61/-70 -67 25 4.5 1 -74/-81 -74/-80 -74/-76 -70 26 12.5 1 dBc dBc dBc dBc dBm nV/Hz pA/Hz f 100 kHz 1.4 1.4 pA/Hz AD8130, G = +2, NTSC 200 IRE, RL 150 AD8130, G = +2, NTSC 200 IRE, RL 150 0.3 0.13 % 0.1 0.15 Degrees 110 dB 70 100 70 83 dB dB dB 3.5 3.8 V 0.5 2.5 V DC to 100 kHz, VCM = -3 V to +3.5 V VCM = 1 V p-p @ 2 MHz VCM = 1 V p-p @ 10 MHz VCM = 2 V p-p @ 1 kHz, VOUT = 0.5 V dc V+IN - V-IN = 0 V 94 110 Min 90 80 0.6 Differential Common mode Differential Common mode Max AD8130 Typ Conditions Max 80 0.75 1 4 3 4 Rev. C | Page 5 of 40 0.85 2.3 2.8 6 4 3 4 3.3 Unit V M M pF pF AD8129/AD8130 Parameter DC PERFORMANCE Closed-Loop Gain Error Open-Loop Gain Gain Nonlinearity Input Offset Voltage Input Offset Voltage vs. Supply Conditions Min VOUT = 1 V, RL 150 TMIN to TMAX VOUT = 1 V VOUT = 1 V 0.4 20 88 250 0.2 2 TMIN to TMAX TMIN to TMAX +VS = +5 V, -VS = -4.5 V to -5.5 V -VS = -5 V, +VS = +4.5 V to +5.5 V Input Bias Current (+IN, -IN) Input Bias Current (REF, FB) Input Offset Current OUTPUT PERFORMANCE Voltage Swing Output Current Short-Circuit Current Output Impedance POWER SUPPLY Operating Voltage Range Quiescent Supply Current TMIN to TMAX (+IN, -IN, REF, FB) (+IN, -IN, REF, FB) TMIN to TMAX RLOAD = 150 /1 k Enable Time OPERATING TEMPERATURE RANGE Min 1.5 AD8130 Typ 0.15 10 74 200 0.4 20 Unit 0.6 -90 1.4 -84 -78 3.5 -74 -94 -86 -80 -74 dB 0.5 2 0.5 2 A 1 5 3.5 1 5 3.5 A nA/C 0.08 0.2 0.4 0.08 0.2 0.4 A nA/C 0.8 1.8 3.6/4.0 2.25 10.8 36 0.68 V mA mA A/C pF 40 -60/+55 -240 10 12.6 11.6 2.25 10.8 36 0.68 0.85 1 +VS - 1.5 12.6 11.6 0.85 1 +VS - 1.5 +VS - 2.5 -30 -50 PD = min VIH PD = max VIL PD +VS - 3 V PD +VS - 2 V Max % ppm/C dB ppm mV V/C mV dB 40 -60/+55 -240 10 TMIN to TMAX PD VIL PD VIL, TMIN to TMAX PD PIN VIH VIL IIH IIL Input Resistance Max 3.6/4.0 To common TMIN to TMAX PD VIL, in powerdown mode Total supply voltage AD8129 Typ +VS - 2.5 -30 -50 12.5 100 0.5 -40 Rev. C | Page 6 of 40 12.5 100 0.5 +125 -40 +125 V mA A/C mA mA V V A A k k s C AD8129/AD8130 12 V SPECIFICATIONS AD8129 G = +10, AD8130 G = +1, TA = 25C, VS = 12 V, REF = 0 V, PD VIH, RL = 1 k, CL = 2 pF, unless otherwise noted. TMIN to TMAX = -40C to +85C, unless otherwise noted. Table 3. Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Rise and Fall Times Output Overdrive Recovery NOISE/DISTORTION Second Harmonic/Third Harmonic IMD Output IP3 Input Voltage Noise (RTI) Input Current Noise (+IN, -IN) Input Current Noise (REF, FB) Differential Gain Error Differential Phase Error INPUT CHARACTERISTICS Common-Mode Rejection Ratio CMRR with VOUT = 1 V p-p Common-Mode Voltage Range Differential Operating Range Differential Clipping Level Resistance Capacitance AD8129 Typ Min VOUT 0.3 V p-p VOUT = 2 V p-p VOUT 0.3 V p-p, SOIC/MSOP VOUT = 2 V p-p, 25% to 75% VOUT = 2 V p-p, 0.1% VOUT 1 V p-p, 10% to 90% 175 170 200 195 50/70 250 150 290 175 110 MHz MHz MHz 935 1070 960 1100 V/s 20 1.7 20 1.4 ns ns 40 40 ns VOUT = 1 V p-p, 5 MHz -71/-84 -79/-86 dBc VOUT = 2 V p-p, 5 MHz VOUT = 1 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz f 10 kHz f 100 kHz -65/-74 -65/-82 -59/-70 -67 25 4.6 1 -74/-81 -74/-80 -74/-74 -70 26 13 1 dBc dBc dBc dBc dBm nV/Hz pA/Hz f 100 kHz 1.4 1.4 pA/Hz AD8130, G = +2, NTSC 200 IRE, RL 150 AD8130, G = +2, NTSC 200 IRE, RL 150 0.3 0.13 % 0.1 0.2 Degrees 105 dB 70 93 70 80 dB dB dB 10.3 10.5 V DC to 100 kHz, VCM = 10 V VCM = 1 V p-p @ 2 MHz VCM = 1 V p-p @ 10 MHz VCM = 4 V p-p @ 1 kHz, VOUT = 0.5 V dc V+IN - V-IN = 0 V 92 105 Min 88 80 0.6 Differential Common mode Differential Common mode Max AD8130 Typ Conditions Max 80 0.5 0.75 1 4 3 4 Rev. C | Page 7 of 40 0.85 2.3 2.5 2.8 6 4 3 4 3.3 Unit V V M M pF pF AD8129/AD8130 Parameter DC PERFORMANCE Closed-Loop Gain Error Open-Loop Gain Gain Nonlinearity Input Offset Voltage Input Offset Voltage vs. Supply Conditions Min VOUT = 1 V, RL 150 TMIN to TMAX VOUT = 1 V VOUT = 1 V 0.8 20 87 250 0.2 2 TMIN to TMAX TMIN to TMAX +VS = +12 V, -VS = -11.0 V to -13.0 V -VS = -12 V, +VS = +11.0 V to +13.0 V Input Bias Current (+IN, -IN) Input Bias Current (REF, FB) Input Offset Current OUTPUT PERFORMANCE Voltage Swing Output Current Short-Circuit Current Output Impedance POWER SUPPLY Operating Voltage Range Quiescent Supply Current TMIN to TMAX (+IN, -IN, REF, FB) (+IN, -IN, REF, FB) TMIN to TMAX RLOAD = 700 Enable Time OPERATING TEMPERATURE RANGE Min 1.8 AD8130 Typ 0.15 10 73 200 0.4 20 Unit 0.6 -88 1.4 -82 -77 3.5 -70 -92 -84 -88 -70 dB 0.25 0.5 2.5 2 3.5 0.25 0.5 2.5 2 3.5 A A nA/C 0.08 0.2 0.4 0.08 0.2 0.4 A nA/C 0.8 1.8 10.8 2.25 13 43 0.73 V mA mA A/C pF 40 -60/+55 -240 10 12.6 13.9 2.25 13 43 0.73 0.9 1.1 +VS - 1.5 12.6 13.9 0.9 1.1 +VS - 1.5 +VS - 2.5 -30 -50 PD = min VIH PD = max VIL PD +VS - 3 V PD +VS - 2 V Max % ppm/C dB ppm mV V/C mV dB 40 -60/+55 -240 10 TMIN to TMAX PD VIL PD VIL, TMIN to TMAX PD PIN VIH VIL IIH IIL Input Resistance Max 10.8 To common TMIN to TMAX PD VIL, in powerdown mode Total supply voltage AD8129 Typ +VS - 2.5 -30 -50 3 100 0.5 -40 Rev. C | Page 8 of 40 3 100 0.5 +85 -40 +85 V mA AC mA mA V V A A k k s C AD8129/AD8130 ABSOLUTE MAXIMUM RATINGS Table 4. Rating 26.4 V Refer to Figure 4 -VS - 0.3 V to +VS + 0.3 V 0.5 V 6.2 V 8.4 V -65C to +150C 300C 150C The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). The power dissipated due to the load drive depends upon the particular application. The power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. RMS voltages and currents must be used in these calculations. Airflow reduces JA. In addition, more metal directly in contact with the package leads from metal traces through holes, ground, and power planes reduces the JA. Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 8-lead SOIC (121C/W) and MSOP (JA = 142C/W) packages on a JEDEC standard 4-layer board. JA values are approximations. THERMAL RESISTANCE JA is specified for the worst-case conditions, that is, JA is specified for the device soldered in a circuit board in still air. Table 5. Thermal Resistance Package Type 8-Lead SOIC/4-Layer 8-Lead MSOP/4-Layer JA 121 142 Unit C/W C/W Maximum Power Dissipation The maximum safe power dissipation in the AD8129/AD8130 packages is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8129/AD8130. Exceeding a junction temperature of 150C for an extended period can result in changes in the silicon devices, potentially causing failure. 1.75 1.50 1.25 1.00 SOIC 0.75 MSOP 0.50 0.25 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (C) Figure 4. Maximum Power Dissipation vs. Temperature ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. C | Page 9 of 40 02464-005 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. MAXIMUM POWER DISSIPATION (W) Parameter Supply Voltage Power Dissipation Input Voltage (Any Input) Differential Input Voltage (AD8129) VS 11.5 V Differential Input Voltage (AD8129) VS < 11.5 V Differential Input Voltage (AD8130) Storage Temperature Range Lead Temperature (Soldering, 10 sec) Junction Temperature AD8129/AD8130 TYPICAL PERFORMANCE CHARACTERISTICS AD8130 FREQUENCY RESPONSE CHARACTERISTICS G = +1, RL = 1 k, CL = 2 pF, VOUT = 0.3 V p-p, TA = 25C, unless otherwise noted. 6 3 VOUT = 0.3V p-p 2 VS = 5V VS = 2.5V 5 1 4 0 3 CL = 20pF VS = 12V -2 -3 0 -1 -5 -2 1 10 FREQUENCY (MHz) 100 CL = 2pF -3 -4 400 Figure 5. AD8130 Frequency Response vs. Supply, VOUT = 0.3 V p-p 1 100 300 Figure 8. AD8130 Frequency Response vs. Load Capacitance 3 0.7 VOUT = 1V p-p RL = 1k VS = 2.5V 2 0.6 VS = 5V 1 0.5 0 VS = 2.5V 0.4 GAIN (dB) -1 VS = 12V -2 -3 0.2 0.1 -0.1 02464-007 0 -5 -7 1 10 FREQUENCY (MHz) 100 VS = 5V 0.3 -4 -6 VS = 12V -0.2 -0.3 300 1 10 FREQUENCY (MHz) 100 300 Figure 9. AD8130 Fine Scale Response vs. Supply, RL = 1 k Figure 6. AD8130 Frequency Response vs. Supply, VOUT = 1 V p-p 3 0.5 RL = 150 VOUT = 2V p-p 2 0.4 VS = 5V VS = 2.5V 1 0.3 VS = 2.5V 0.2 VS = 12V -2 -3 0 -0.1 -0.2 -5 -0.3 02464-008 -4 -6 -7 1 10 FREQUENCY (MHz) 100 VS = 5V 0.1 VS = 12V 02464-011 -1 GAIN (dB) 0 GAIN (dB) 10 FREQUENCY (MHz) 02464-010 -7 GAIN (dB) 1 -4 -6 CL = 5pF 2 02464-009 GAIN (dB) VS = 5V -1 02464-006 GAIN (dB) CL = 10pF -0.4 -0.5 300 Figure 7. AD8130 Frequency Response vs. Supply, VOUT = 2 V p-p 1 10 FREQUENCY (MHz) 100 300 Figure 10. AD8130 Fine Scale Response vs. Supply, RL = 150 Rev. C | Page 10 of 40 AD8129/AD8130 3 3 0 VS = 5V -2 VS = 12V -3 -3 -4 -5 1 10 FREQUENCY (MHz) 100 3 RF = RG = 250 -6 -7 400 G = +2 RL = 1k 0.2 VS = 2.5V 0.1 0 0 VS = 12V -2 -0.1 -0.2 -0.4 -5 -0.5 02464-013 -4 -6 1 10 FREQUENCY (MHz) 100 VS = 5V -0.3 VS = 12V 02464-016 GAIN (dB) VS = 5V -3 -0.6 -0.7 300 1 Figure 12. AD8130 Frequency Response vs. Supply, G = +2, VOUT = 0.3 V p-p 10 FREQUENCY (MHz) 100 Figure 15. AD8130 Fine Scale Response vs. Supply, G = +2, RL = 1 k 0.3 3 G = +2 VOUT = 2V p-p 2 G = +2 RL = 150 0.2 VS = 2.5V 1 0.1 VS = 2.5V 0 VS = 5V -2 VS = 12V -3 -0.1 VS = 5V -0.2 -0.3 -0.4 -5 -0.5 02464-014 -4 -6 -7 1 10 FREQUENCY (MHz) 100 VS = 12V 02464-017 -1 GAIN (dB) 0 GAIN (dB) 300 Figure 14. AD8130 Frequency Response for Various RF/RG VS = 2.5V -1 -7 100 FREQUENCY (MHz) 0.3 1 10 1 G = +2 VOUT = 0.3V p-p 2 RF = RG = 499 -2 -5 Figure 11. AD8130 Frequency Response vs. Supply, RL = 150 GAIN (dB) -1 -4 -6 RF = RG = 1k RF = RG = 750 02464-015 -1 GAIN (dB) 1 0 02464-012 GAIN (dB) 2 VS = 2.5V 1 -7 G = +2 VS = 5V RL = 150 2 -0.6 -0.7 300 1 10 FREQUENCY (MHz) Figure 16. AD8130 Fine Scale Response vs. Supply, G = +2, RL = 150 Figure 13. AD8130 Frequency Response vs. Supply, G = +2, VOUT = 2 V p-p Rev. C | Page 11 of 40 100 AD8129/AD8130 3 3 G = +2 2 RL = 150 VS = 2.5V GAIN (dB) -1 -2 VS = 12V -3 -1 -4 -5 10 FREQUENCY (MHz) 100 VS = 5V, 12V -6 -7 0.1 300 Figure 17. AD8130 Frequency Response vs. Supply, G = +2, RL = 150 1 FREQUENCY (MHz) 10 100 Figure 20. AD8130 Frequency Response vs. Supply, G = +5, G = +10, RL = 150 0.3 12 VOUT = 2V p-p 0dB = 1V rms 0.2 6 VS = 2.5V 0.1 VS = 5V OUTPUT VOLTAGE (dBV) 0 0 -0.1 VS = 12V VS = 2.5V -0.2 VS = 5V, 12V -0.3 -0.4 G = +10 G = +5 -0.5 -6 -12 -18 -24 -30 02464-019 -36 -0.6 -0.7 0.1 1 FREQUENCY (MHz) -42 VS = 5V -48 30 10 02464-022 GAIN (dB) G = +5 VS = 2.5V -3 -5 -7 G = +10 -2 -4 -6 VS = 5V, 12V 0 02464-018 GAIN (dB) 1 VS = 5V 0 02464-021 1 1 RL = 150 2 Figure 18. AD8130 Fine Scale Response vs. Supply, G = +5, G = +10, VOUT = 2 V p-p 100 FREQUENCY (MHz) 10 400 Figure 21. AD8130 Frequency Response for Various Output Levels 3 VOUT = 2V p-p 2 1 1 8 50 6 4 -1 RL 5 VS = 12V RG G = +5 CL RF -3 -5 VS = 5V, 12V -6 -7 0.1 G RF RG 1 2 5 10 0 499 8.06k 4.99k - 499 2k 549 VS = 2.5V G = +10 1 FREQUENCY (MHz) 10 100 Figure 19. AD8130 Frequency Response vs. Supply, G = +5, G = +10, VOUT = 2 V p-p Figure 22. AD8130 Basic Frequency Response Test Circuit Rev. C | Page 12 of 40 02464-023 -4 02464-020 GAIN (dB) 0 -2 TEK P6245 FET PROBE AD8129/AD8130 AD8129 FREQUENCY RESPONSE CHARACTERISTICS G = +10, RL = 1 k, CL = 2 pF, VOUT = 0.3 V p-p, TA = 25C, unless otherwise noted. 3 4 VOUT = 0.3V p-p VS = 5V CL = 10pF 1 2 0 1 -1 GAIN (dB) VS = 12V -2 -3 0 -5 -4 1 10 FREQUENCY (MHz) 100 CL = 2pF -2 -3 -7 CL = 5pF -1 -4 -6 CL = 20pF 3 VS = 5V 02464-027 VS = 2.5V 02464-024 GAIN (dB) 2 -5 -6 300 Figure 23. AD8129 Frequency Response vs. Supply, VOUT = 0.3 V p-p 1 10 FREQUENCY (MHz) 100 300 Figure 26. AD8129 Frequency Response vs. Load Capacitance 3 0.5 VOUT = 1V p-p 2 VS = 5V VS = 2.5V 1 RL = 1k 0.4 VS = 2.5V 0.3 VS = 5V 0.2 -2 -3 0.1 0 VS = 12V -0.1 -4 -0.2 -5 -0.3 -6 -7 1 10 FREQUENCY (MHz) 100 02464-028 GAIN (dB) VS = 12V -1 02464-025 GAIN (dB) 0 -0.4 -0.5 300 1 Figure 24. AD8129 Frequency Response vs. Supply, VOUT = 1 V p-p 0.3 RL = 150 VOUT = 2V p-p VS = 2.5V 0.2 300 VS = 2.5V 0.1 0 0 -1 -0.1 GAIN (dB) VS = 5V VS = 12V -2 -3 -5 -0.5 02464-026 -0.4 -7 1 10 FREQUENCY (MHz) 100 VS = 12V -0.3 -4 -6 VS = 5V -0.2 02464-029 1 GAIN (dB) 100 Figure 27. AD8129 Fine Scale Response vs. Supply, RL = 1 k 3 2 10 FREQUENCY (MHz) -0.6 -0.7 300 1 Figure 25. AD8129 Frequency Response vs. Supply, VOUT = 2 V p-p 10 FREQUENCY (MHz) 100 300 Figure 28. AD8129 Fine Scale Response vs. Supply, RL = 150 Rev. C | Page 13 of 40 AD8129/AD8130 3 0.8 RL = 150 VS = 2.5V -1 0 VS = 5V -2 VS = 12V -3 0.2 0 -5 -0.2 -7 10 100 FREQUENCY (MHz) 499/54.9 909/100 -0.2 -4 -6 SOIC SOIC 2k/221 02464-033 GAIN (dB) 0.2 -0.4 -0.6 300 1 Figure 29. AD8129 Frequency Response vs. Supply, RL = 150 10 FREQUENCY (MHz) G = +20 VOUT = 0.3V p-p 2 100 300 Figure 32. AD8129 Fine Scale Response vs. SOIC and MSOP for Various RF/RG 0.2 3 2k/221 909/100 499/54.9 0.4 0 02464-030 GAIN (dB) 1 G = +20 RL = 1k 0.1 0 1 VS = 5V VS = 5V, 12V 0 -0.1 -1 GAIN (dB) GAIN (dB) G = +10 VS = 5V 0.6 2 -2 -3 VS = 2.5V -4 -0.2 -0.3 VS = 12V -0.4 -0.5 VS = 2.5V -5 -6 -7 1 10 FREQUENCY (MHz) 100 02464-034 02464-031 -0.6 -0.7 -0.8 1 300 10 Figure 30. AD8129 Frequency Response vs. Supply, G = +20, VOUT = 0.3 V p-p Figure 33. AD8129 Fine Scale Response vs. Supply 0.3 3 G = +20 VOUT = 2V p-p 2 0.2 VS = 5V, 12V GAIN (dB) -1 -2 -3 VS = 2.5V -4 VS = 5V, 12V 0 -0.1 -0.2 -0.3 -0.4 VS = 2.5V -6 -7 1 10 FREQUENCY (MHz) 100 02464-035 -0.5 -5 02464-032 GAIN (dB) G = +20 RL = 150 0.1 1 0 30 FREQUENCY (MHz) -0.6 -0.7 0.1 300 1 10 FREQUENCY (MHz) Figure 31. AD8129 Frequency Response vs. Supply, G = +20, VOUT = 2 V p-p Figure 34. AD8129 Fine Scale Response vs. Supply Rev. C | Page 14 of 40 30 AD8129/AD8130 3 3 G = +20 RL = 150 2 1 1 0 VS = 5V, 12V GAIN (dB) -1 -2 -3 -1 -3 VS = 2.5V -4 -4 VS = 2.5V -6 -7 1 VS = 5V -5 VS = 12V 02464-036 -5 10 FREQUENCY (MHz) 100 -6 -7 300 0.1 1 FREQUENCY (MHz) 10 50 Figure 38. AD8129 Frequency Response vs. Supply, G = +50, G = +100, RL = 150 Figure 35. AD8129 Frequency Response vs. Supply, G = +20, RL = 150 12 0.2 0dB = 1V rms VOUT = 2V p-p 6 VS = 12V 0.1 0 G = +100 -0.2 G = +50 VS = 2.5V -0.3 VS = 5V -0.4 -0.5 VS = 12V -0.7 -0.8 0.1 -18 -24 -30 -36 02464-037 -0.6 -6 -12 1 FREQUENCY (MHz) 10 02464-040 -0.1 OUTPUT VOLTAGE (dBV) 0 GAIN (dB) G = +50 G = +100 -2 02464-039 0 GAIN (dB) RL = 150 2 -42 VS = 5V -48 10 100 400 FREQUENCY (MHz) Figure 36. AD8129 Fine Scale Response vs. Supply, G = +50, G = +100, VOUT = 2 V p-p Figure 39. AD8129 Frequency Response for Various Output Levels 3 VOUT = 2V p-p 2 1 1 -1 50 G = +50 G = +100 TEK P6245 FET PROBE 8 6 4 -2 RL 5 CL -3 VS = 2.5V -4 RF -6 VS = 12V 0.1 1 FREQUENCY (MHz) 10 50 Figure 37. AD8129 Frequency Response vs. Supply, G = +50, G = +100, VOUT = 2 V p-p G RF 10 20 50 100 2k 2k 2k 2k RG 221 105 41.2 20 02464-041 -5 -7 RG VS = 5V 02464-038 GAIN (dB) 0 Figure 40. AD8129 Basic Frequency Response Test Circuit Rev. C | Page 15 of 40 AD8129/AD8130 AD8130 HARMONIC DISTORTION CHARACTERISTICS RL = 1 k, CL = 2 pF, TA = 25C, unless otherwise noted. -51 -60 VOUT = 1V p-p VOUT = 1V p-p G = +1 VS = 5V -57 G = +1 VS = 12V -66 -63 -69 HD3 (dBc) HD2 (dBc) VS = 12V -72 G = +1 -78 -75 VS = 5V VS = 12V -81 G = +1 VS = 5V VS = 12V -87 -84 1 10 G = +2 -99 40 10 1 FREQUENCY (MHz) 40 FREQUENCY (MHz) Figure 44. AD8130 Third Harmonic Distortion vs. Frequency Figure 41. AD8130 Second Harmonic Distortion vs. Frequency -54 02464-045 -90 -93 02464-042 G = +2 -45 VOUT = 2V p-p VOUT = 2V p-p G = +2, VS = 12V -51 G = +2, VS = 5V G = +1 -60 -57 -63 -66 HD3 (dBc) HD2 (dBc) VS = 5V -72 -69 VS = 12V -75 VS = 5V G = +1 -81 -78 VS = 12V -84 1 G = +1 VS = 12V 10 -87 02464-046 VS = 5V 02464-043 G = +2 G = +2 -93 40 10 1 FREQUENCY (MHz) 40 FREQUENCY (MHz) Figure 45. AD8130 Third Harmonic Distortion vs. Frequency Figure 42. AD8130 Second Harmonic Distortion vs. Frequency -46 -55 fC = 5MHz fC = 5MHz VS = 12V -61 VS = 12V -52 VS = 5V VS = 5V -58 -64 G = +1 HD3 (dBc) HD2 (dBc) -67 -73 -70 G = +1 G = +2 -76 -79 -82 VS = 5V -91 0.5 1 VS = 12V -88 02464-044 -85 -94 10 VOUT (V p-p) 02464-047 VS = 12V G = +2 VS = 5V 0.5 1 10 VOUT (V p-p) Figure 43. AD8130 Second Harmonic Distortion vs. Output Voltage Figure 46. AD8130 Third Harmonic Distortion vs. Output Voltage Rev. C | Page 16 of 40 AD8129/AD8130 -43 -46 VS = 2.5V VS = 2.5V fC = 5MHz -52 G = +2, HD3 G = +1, HD3 -49 -58 G = +1 VOUT = 2V p-p G = +2 -61 G = +1, HD2 -64 HD (dBc) HD2 (dBc) -55 G = +2, HD2 -70 G = +2, HD2 -76 -67 G = +2, HD3 -82 G = +2 -79 1 -88 02464-048 G = +1 VOUT = 1V p-p -94 40 10 0 FREQUENCY (MHz) VS = 2.5V -54 G = +2 -72 G = +1 -78 G = +1 -84 G = +2 02464-049 HD3 (dBc) VOUT = 2V p-p -66 VOUT = 1V p-p -90 -96 1 10 1.0 1.5 2.0 2.5 Figure 49. AD8130 Harmonic Distortion vs. Output Voltage -48 -60 0.5 VOUT (V p-p) Figure 47. AD8130 Second Harmonic Distortion vs. Frequency -42 02464-050 -73 40 FREQUENCY (MHz) Figure 48. AD8130 Third Harmonic Distortion vs. Frequency Rev. C | Page 17 of 40 3.0 AD8129/AD8130 AD8129 HARMONIC DISTORTION CHARACTERISTICS RL = 1 k, CL = 2 pF, TA = 25C, unless otherwise noted. -54 -51 VOUT = 1V p-p VOUT = 1V p-p -60 -57 G = +10, VS = 12V -66 -69 HD3 (dBc) HD2 (dBc) -63 G = +10, VS = 12V G = +10, VS = 5V G = +10, VS = 5V -72 -78 G = +20, VS = 5V -75 -84 G = +20, VS = 5V -87 10 FREQUENCY (MHz) 1 -90 02464-051 -81 -96 40 1 Figure 50. AD8129 Second Harmonic Distortion vs. Frequency 10 FREQUENCY (MHz) -45 VOUT = 2V p-p -48 VOUT = 2V p-p G = +10 G = +20 G = +20, VS = 12V -66 HD3 (dBc) -60 G = +10, VS = 12V -57 G = +10, VS = 12V -63 G = +10, VS = 12V -69 -75 G = +20, VS = 5V -84 10 FREQUENCY (MHz) 1 10 FREQUENCY (MHz) 1 40 40 Figure 54. AD8129 Third Harmonic Distortion vs. Frequency -48 -50 fC = 5MHz fC = 5MHz G = +10, VS = 12V -54 -56 G = +10, VS = 5V -60 G = +10, VS = 12V G = +10, VS = 5V -74 G = +20, VS = 5V -72 -78 G = +20, VS = 5V -84 G = +20, VS = 12V 1 02464-053 -80 G = +20, VS = 12V -90 -96 0.5 10 VOUT (V p-p) 1 02464-056 HD3 (dBc) -66 -68 -86 0.5 G = +20, VS = 12V -87 Figure 51. AD8129 Second Harmonic Distortion vs. Frequency -62 G = +20, VS = 5V G = +10, VS = 5V -81 02464-052 -78 G = +10, VS = 5V 02464-055 -72 HD2 (dBc) G = +10, VS = 5V -51 -54 40 Figure 53. AD8129 Third Harmonic Distortion vs. Frequency -42 HD2 (dBc) G = +20, VS = 12V 02464-054 G = +20, VS = 12V 10 VOUT (V p-p) Figure 55. AD8129 Third Harmonic Distortion vs. Output Voltage Figure 52. AD8129 Second Harmonic Distortion vs. Output Voltage Rev. C | Page 18 of 40 AD8129/AD8130 -44 -39 VS = 2.5V G = +1 VOUT = 2V p-p VS = 5V RL = 1k fC = 5MHz -45 VOUT = 2V p-p -50 -51 DISTORTION (dBc) HD2 (dBc) -56 G = +20 -62 VOUT = 1V p-p -68 -57 -63 -69 HD2 -75 -74 1 10 FREQUENCY (MHz) -5 Figure 56. AD8129 Second Harmonic Distortion vs. Frequency -42 02464-060 -87 40 -4 -3 -2 -1 0 1 VCM (V) 2 3 -61 G = +1 fC = 5MHz -48 VOUT = 1V p-p -67 VOUT = 2V p-p HD2 VS = 2.5V DISTORTION (dBc) -54 HD3 (dBc) -60 G = +20 VOUT = 1V p-p -72 G = +10 -73 HD2 VS = 5V, 12V -79 HD3 VS = 5V -85 HD3 VS = 12V -78 -91 02464-058 -84 -90 1 10 FREQUENCY (MHz) HD3 VS = 2.5V -97 100 40 1k RL () Figure 60. AD8130 Harmonic Distortion vs. Load Resistance Figure 57. AD8129 Third Harmonic Distortion vs. Frequency -50 5 Figure 59. AD8130 Harmonic Distortion vs. Common-Mode Voltage VS = 2.5V -66 4 02464-061 -80 HD3 -81 02464-057 G = +10 -50 VS = 2.5V fC = 5MHz G = +1 fC = 5MHz VOUT = 2V p-p -56 -56 G = +20 HD2 G = +20 HD3 G = +10 HD2 -68 -74 G = +10 HD3 -80 -86 0 0.5 1.0 1.5 VOUT (V p-p) -62 2.0 2.5 HD2 VS = 5V, 12V -68 -74 -80 02464-059 HD (dBc) -62 HD3 VS = 2.5V HD3 VS = 5V, 12V -86 100 3.0 1k RL () Figure 58. AD8129 Harmonic Distortion vs. Output Voltage Figure 61. AD8130 Harmonic Distortion vs. Load Resistance Rev. C | Page 19 of 40 02464-062 DISTORTION (dBc) HD2 VS = 2.5V AD8129/AD8130 -36 G = +10 VOUT = 2V p-p VS = 5V RL = 1k fC = 5MHz -42 VCM 200 -54 RL CL HD2 RG -72 HD3 -78 -5 -4 -3 -2 -1 0 1 2 3 4 RF MINI-CIRCUITS(R): # T4-6T, fC 10MHz # TC4-1W, fC > 10MHz 5 VCM (V) G RF RG 1 2 10 20 0 499 2k 2k - 499 221 105 02464-066 -66 Figure 65. AD8129/AD8130 Basic Distortion Test Circuit, VCM = 0 V, Unless Otherwise Noted Figure 62. AD8129 Harmonic Distortion vs. Common-Mode Voltage 100 -48 G = +10 fC = 5MHz -54 VOUT = 1V p-p VS = 2.5V HD2 VS = 12V CURRENT NOISE (pA/Hz) -60 DISTORTION (dBc) RL 1:2 -60 02464-063 DISTORTION (dBc) -48 VS = 5V -68 VS = 12V -72 VS = 5V -78 10 1.0 02464-064 VS = 2.5V -90 100 0.1 10 1k RL () 100 1k 10k 100k FREQUENCY (Hz) 1M 10M Figure 66. AD8129/AD8130 Input Current Noise vs. Frequency Figure 63. AD8129 Harmonic Distortion vs. Load Resistance 100 G = +10 fC = 5MHz VOUT = 2V p-p VS = 2.5V -50 CURRENT NOISE (nV/Hz) -44 VS = 12V VS = 5V -56 -62 VS = 2.5V -68 HD3 VS = 12V AD8130 10 AD8129 -74 VS = 5V -80 100 1 10 1k RL () 02464-068 02464-065 DISTORTION (dBc) 02464-067 HD3 -84 100 1k 10k 100k FREQUENCY (Hz) 1M 10M Figure 67. AD8129/AD8130 Input Voltage Noise vs. Frequency Figure 64. AD8129 Harmonic Distortion vs. Load Resistance Rev. C | Page 20 of 40 -30 -40 -40 -50 -50 -60 -70 -80 VS = 2.5V -100 -110 -120 10k 100k 1M FREQUENCY (Hz) 10M 100M 0 -10 POWER SUPPLY REJECTION (dB) 0 -20 -30 -40 -50 -60 VS = 12V -80 VS = 5V VS = 2.5V -100 1k 10k 100k 1M FREQUENCY (Hz) 10M -50 -60 -70 VS = 12V -80 POWER SUPPLY REJECTION (dB) -30 -40 -50 -60 VS = 2.5V 02464-071 -80 100k 1M 10M 10k 100k 1M FREQUENCY (Hz) 10M 100M Figure 72. AD8129 Positive Power Supply Rejection vs. Frequency -10 10k VS = 2.5V VS = 5V -100 1k 100M -20 -100 1k 100M -40 -10 VS = 12V 10M -30 0 VS = 5V 1M FREQUENCY (Hz) -20 0 -90 100k -90 Figure 69. AD8130 Positive Power Supply Rejection vs. Frequency -70 VS = 5V, 12V -110 Figure 71. AD8139 Common-Mode Rejection vs. Frequency 02464-070 POWER SUPPLY REJECTION (dB) -100 -10 -90 POWER SUPPLY REJECTION (dB) -90 -120 10k Figure 68. AD8130 Common-Mode Rejection vs. Frequency -70 VS = 2.5V -80 02464-073 VS = 5V, 12V -70 -20 -30 -40 -50 -60 -70 -80 VS = 5V VS = 12V 02464-074 -90 -60 02464-072 COMMON-MODE REJECTION (dB) -30 02464-069 COMMON-MODE REJECTION (dB) AD8129/AD8130 -90 -100 1k 100M VS = 2.5V 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 70. AD8130 Negative Power Supply Rejection vs. Frequency Figure 73. AD8129 Negative Power Supply Rejection vs. Frequency Rev. C | Page 21 of 40 AD8129/AD8130 80 100 30 PHASE + VOUT - 20 + 10 1k - 100 0 2pF 45 M = 58 10k 100k 1M FREQUENCY (Hz) 10M AD8129, G = +10 0 100M 300M Figure 74. AD8130 Open-Loop Gain and Phase vs. Frequency 80 180 135 60 50 90 40 PHASE VOUT 30 1k 20 10 2pF 1k 45 PHASE MARGIN (Degrees) GAIN 70 M = 56 1k 10k 100k 1M 10M FREQUENCY (Hz) 100M 0 300M 02464-076 VIN 0 1m 1k 10k 100k 1M FREQUENCY (Hz) 10M Figure 76. Closed-Loop Output Impedance vs. Frequency 90 100 AD8130, G = +1 100m 10m 1k VIN -10 1k 90 1 02464-077 40 OUTPUT IMPEDANCE () 135 50 02464-075 OPEN-LOOP GAIN (dB) GAIN PHASE MARGIN (Degrees) 10 60 OPEN-LOOP GAIN (dB) VS = 5V 180 70 Figure 75. AD8129 Open-Loop Gain and Phase vs. Frequency Rev. C | Page 22 of 40 100M AD8129/AD8130 AD8130 TRANSIENT RESPONSE CHARACTERISTICS G = +1, RL = 1 k, CL = 2 pF, VS = 5 V, TA = 25C, unless otherwise noted. VS = 2.5V VOUT = 1V p-p VS = 2.5V VS = 5V VOUT = 0.2V p-p 5.00ns 50mV Figure 77. AD8130 Transient Response, VS = 2.5 V, VOUT = 1 V p-p 5.00ns 02464-081 250mV 02464-078 VS = 12V Figure 80. AD8130 Transient Response vs. Supply, VOUT = 0.2 V p-p VOUT = 1V p-p VS = 5V VS = 2.5V VS = 5V VOUT = 1V p-p CL = 5pF 5.00ns Figure 78. AD8130 Transient Response, VS = 5 V, VOUT = 1 V p-p 250mV 5.00ns 02464-082 250mV 02464-079 VS = 12V Figure 81. AD8130 Transient Response vs. Supply, VOUT = 1 V p-p, CL = 5 pF VOUT = 1V p-p VS = 12V VS = 2.5V VS = 5V VOUT = 2V p-p CL = 5pF 5.00ns Figure 79. AD8130 Transient Response, VS = 12 V, VOUT = 1 V p-p 500mV 5.00ns 02464-083 250mV 02464-080 VS = 12V Figure 82. AD8130 Transient Response vs. Supply, VOUT = 2 V p-p, CL = 5 pF Rev. C | Page 23 of 40 AD8129/AD8130 CL = 10pF VOUT = 1V p-p G = +2 VOUT = 0.2 V p-p CL = 5pF CL = 2pF VS = 5V, CL = 10pF 10.00ns 250mV Figure 83. AD8130 Transient Response vs. Load Capacitance, VOUT = 0.2 V p-p 5.00ns 02464-087 50mV 02464-084 VS = 5V, CL = 2pF Figure 86. AD8130 Transient Response vs. Load Capacitance, VOUT = 1 V p-p, G = +2 VOUT = 2V p-p G = +2 VS = 5V 2V p-p 1V p-p VS = 12V 5.00ns Figure 84. AD8130 Transient Response vs. Output Amplitude, VOUT = 0.5 V p-p, 1 V p-p, 2 V p-p 5.00ns 500mV 02464-088 500mV 02464-085 0.5V p-p Figure 87. AD8130 Transient Response vs. Supply, VOUT = 2 V p-p, G = +2 VOUT = 8V p-p 4V p-p G = +2 VS = 5V CL = 10pF 2V p-p CL = 2pF 5.00ns 2.00V Figure 85. AD8130 Transient Response vs. Output Amplitude, VOUT = 1 V p-p, 2 V p-p, 4 V p-p 5.00ns 02464-089 1.00V 02464-086 1V p-p Figure 88. AD8130 Transient Response vs. Load Capacitance, VOUT = 8 V p-p Rev. C | Page 24 of 40 AD8129/AD8130 4V p-p G = +5 VS = 5V CL = 10pF VIN 2V p-p VOUT 1.00V Figure 89. AD8130 Transient Response with +3 V Common-Mode Input 10.0ns 02464-093 5.00ns 1.00V 02464-090 1V p-p Figure 92. AD8130 Transient Response vs. Output Amplitude VOUT = 8V p-p G = +5 VS = 5V CL = 10pF VOUT 2.00V Figure 90. AD8130 Transient Response with -3 V Common-Mode Input 2.50V Figure 93. AD8130 Transient Response, VOUT = 8 V p-p, G = +5, VS = 5 V G = +2 VS = 12V 5.00ns VOUT = 20V p-p 02464-092 VOUT = 10V p-p 5.00V Figure 91. AD8130 Transient Response, VOUT = 10 V p-p, G = +2, VS = 12 V 10.0ns 02464-094 5.00ns G = +5 VS = 12V CL = 10pF 10.0ns 02464-095 1.00V 02464-091 VIN Figure 94. AD8130 Transient Response, VOUT = 20 V p-p, G = +5, VS = 12 V Rev. C | Page 25 of 40 AD8129/AD8130 AD8129 TRANSIENT RESPONSE CHARACTERISTICS G = +10, RF = 2 k, RG = 221 , RL = 1 k, CL = 1 pF, VS = 5 V, TA = 25C, unless otherwise noted. VS = 2.5V VS = 5V VOUT = 1V p-p VS = 2.5V VOUT = 0.4V p-p 5.00ns 100mV Figure 95. AD8129 Transient Response, VS = 2.5 V, VOUT = 1 V p-p VS = 5V 5.00ns 02464-099 250mV 02464-096 VS = 12V Figure 98. AD8129 Transient Response vs. Supply, VOUT = 0.4 V p-p VOUT = 1V p-p VOUT = 1V p-p CL = 5pF VS = 5V VS = 2.5V 5.00ns Figure 96. AD8129 Transient Response, VS = 5 V, VOUT = 1 V p-p VS = 12V 5.00ns 250mV 02464-100 250mV 02464-097 VS = 12V Figure 99. AD8129 Transient Response vs. Supply, VOUT = 1 V p-p, CL = 5 pF VS = 2.5V VOUT = 1V p-p VS = 5V VOUT = 2V p-p CL = 5pF 5.00ns Figure 97. AD8129 Transient Response, VS = 12 V, VOUT = 1 V p-p 250mV 5.00ns 02464-101 250mV 02464-098 VS = 12V Figure 100. AD8129 Transient Response vs. Supply, VOUT = 2 V p-p, CL = 5 pF Rev. C | Page 26 of 40 AD8129/AD8130 VOUT = 0.4V p-p CL = 5pF VOUT = 1V p-p G = +20 CL = 20pF CL = 10pF 250mV Figure 101 Transient Response vs. Load Capacitance, VOUT = 0.4 V p-p 5.00ns 02464-105 5.00ns 100mV 02464-102 CL = 2pF Figure 104. AD8129 Transient Response, VOUT = 1 V p-p, VS = 2.5 V to 12 V VOUT = 2V p-p VO = 2V p-p G = +20 CL = 20pF VO = 1V p-p 500mV Figure 102. Transient Response vs. Output Amplitude, VOUT = 0.5 V p-p, 1 V p-p, 2 V p-p 5.00ns 02464-106 5.00ns 500mV 02464-103 VO = 0.5V p-p Figure 105. AD8129 Transient Response, VOUT = 2 V p-p, VS = 5 V VOUT = 8V p-p VO = 4V p-p G = +20 CL = 20pF VO = 2V p-p 5.00ns 2.00V 5.00ns 02464-107 1.00V 02464-104 VO = 1V p-p Figure 106. AD8129 Transient Response, VOUT = 8 V p-p, VS = 5 V Figure 103. Transient Response vs. Output Amplitude, VOUT = 1 V p-p, 2 V p-p, 4 V p-p Rev. C | Page 27 of 40 AD8129/AD8130 VIN 4V p-p G = +50 VS = 5V CL = 20pF 2V p-p VOUT 5.00ns 1.00V Figure 107. AD8129 Transient Response with +3.5 V Common-Mode Input 12.5ns 02464-111 1.00V 02464-108 1V p-p Figure 110. AD8129 Transient Response vs. Output Amplitude, VOUT = 1 V p-p, 2 V p-p, 4 V p-p VOUT = 8V p-p G = +50 VS = 5V CL = 20pF G = +20 VS = 12V CL = 20pF 5.00ns VOUT = 20V p-p 02464-110 2.50V 02464-112 12.5ns Figure 111. AD8129 Transient Response, VOUT = 8 V p-p, G = +50, VS = 5 V Figure 108. AD8129 Transient Response with -3.5 V Common-Mode Input VOUT = 10V p-p 2.00V Figure 109. AD8129 Transient Response, VOUT = 10 V p-p, G = +20 5.00V G = +50 VS = 12V CL = 10pF 12.5ns 02464-113 VIN 02464-109 VOUT Figure 112. AD8129 Transient Response, VOUT = 20 V p-p, G = +50, VS = 12 V Rev. C | Page 28 of 40 AD8129/AD8130 G = +1 VS = 5V RL = 1k 20 17 14 11 -5 02464-117 GAIN NONLINEARITY (0.005%/DIV) G = +1 VS = 5V 02464-114 SUPPLY CURRENT (mA) 23 -4 -3 -2 -1 0 1 2 DIFFERENTIAL INPUT (V) 3 4 -1.0 5 -0.4 -0.2 0 0.2 0.4 0.6 0.8 G = +1 VS = 5V RL = 1k 31 25 02464-115 19 -0.6 -0.4 -0.2 0 0.2 0.4 DIFFERENTIAL INPUT (V) 0.6 0.8 02464-118 GAIN NONLINEARITY (0.08%/DIV) G = +1 VS = 10V -0.8 1.0 Figure 116. AD8130 Gain Nonlinearity, VOUT = 2 V p-p 37 SUPPLY CURRENT (mA) -0.6 OUTPUT VOLTAGE (V) Figure 113. AD8130 DC Power Supply Current vs. Differential Input Voltage 13 -1.0 -0.8 -2.5 1.0 Figure 114. AD8129 DC Power Supply Current vs. Differential Input Voltage -2.0 -1.5 -1.0 -0.5 0 0.5 1.0 OUTPUT VOLTAGE (V) 1.5 2.0 2.5 Figure 117. AD8130 Gain Nonlinearity, VOUT = 5 V p-p 4 3.0 VS = 5V AD8130 3 VOUT = 100mV AC @ 1kHz 2 1.0 1 AD8129 0 VOUT (V) AD8129 0 -1 -1.0 -2 AD8130 -3.0 -50 -3 02464-116 -2.0 -35 -20 -5 10 25 40 55 70 85 -4 100 02464-119 DIFFERENTIAL INPUT (V) 2.0 -5 -4 -3 -2 -1 0 1 2 3 4 DIFFERENTIAL INPUT (V) TEMPERATURE(C) Figure 118. AD8130 Differential Input Clipping Level Figure 115. AD8129/AD8130 Input Differential Voltage Range vs. Temperature, 1% Gain Compression Rev. C | Page 29 of 40 5 AD8129/AD8130 15 G = +10 VS = 5V RL = 1k SUPPLY CURRENT (mA) -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 12 11 10 02464-120 -1.0 13 02464-123 GAIN NONLINEARITY (0.005%/DIV) 14 9 1.0 5 0 10 15 20 TOTAL SUPPLY VOLTAGE (V) OUTPUT VOLTAGE (V) 25 30 Figure 122. Quiescent Power Supply Current vs. Total Supply Voltage Figure 119. AD8129 Gain Nonlinearity, VOUT = 2 V p-p 17 G = +10 VS = 12V RL = 1k GAIN NONLINEARITY (0.2%/DIV) 16 SUPPLY CURRENT (mA) 15 VS = 12 14 13 VS = 5 12 VS = 2.5 11 10 -5 -4 -3 -2 -1 0 1 2 3 4 02464-124 02464-121 9 8 7 -50 -35 -20 5 OUTPUT VOLTAGE (V) Figure 120. AD8129 Gain Nonlinearity, VOUT = 10 V p-p -5 10 25 40 55 70 TEMPERATURE (C) 85 100 115 125 Figure 123. Quiescent Power Supply Current vs. Temperature 8 40 0.60 VS = 10V 0 -2 -4 -6 -8 -1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 DIFFERENTIAL INPUT (V) 0.6 0.8 Figure 121. AD8129 Differential Input Clipping Level 1.0 IB 30 0.45 IOS 0.30 0.15 -50 20 -35 -20 -5 10 25 40 55 TEMPERATURE (C) 70 85 10 100 INPUT OFFSET CURRENT (nA) 2 02464-122 OUTPUT VOLTAGE (V) 4 02464-125 INPUT BIAS CURRENT (A) 6 Figure 124. Input Bias Current and Input Offset Current vs. Temperature Rev. C | Page 30 of 40 AD8129/AD8130 4.00 4.0 VS = 5V 3.75 AD8130 AD8129 3.5 3.25 OUTPUT VOLTAGE (V) VS = 5V 3.00 2.75 VOUT = 100mV AC AT 1kHz 2.50 2.25 2.00 SOURCING 3.0 +100C -40C +25C 2.0 1.75 SINKING AD8129 1.5 AD8130 02464-126 1.50 1.25 1.00 -50 -35 -20 -5 10 25 40 55 TEMPERATURE (C) 70 85 02464-129 INPUT COMMON MODE (V) 3.50 VOUT = 100mV AC AT 1kHz 1.0 100 0 Figure 125. Common-Mode Voltage Range vs. Temperature, Typical 1% Gain Compression 5 10 15 20 25 OUTPUT CURRENT (mA) 30 35 40 Figure 128. Output Voltage Range vs. Output Current, Typical 1% Gain Compression 4.00 4.0 VS = 5V 3.75 AD8130 3.5 VS = 5V AD8129 3.00 VOUT = 100mV AC AT 1kHz 2.75 -3.00 -3.25 AD8129 -3.50 02464-127 -35 -20 -5 10 25 40 55 TEMPERATURE (C) 70 +100C -40C +25C -3.0 -3.5 AD8130 -3.75 -4.00 -50 3.0 85 02464-130 3.25 OUTPUT VOLTAGE (V) INPUT COMMON MODE (V) 3.50 VOUT = 100mV AC AT 1kHz -4.0 100 Figure 126. Common-Mode Voltage Range vs. Temperature, Typical 1% Gain Compression 0 5 10 15 20 25 OUTPUT CURRENT (mA) 30 35 40 Figure 129. Output Voltage Range vs. Output Current, Typical 1% Gain Compression 11.0 11 VS = 12V 10.5 AD8130 10 VS = 12V 9.0 VOUT = 100mV AC AT 1kHz 8.5 -9.0 -9.5 -10.0 AD8129 -35 -20 -5 10 25 40 55 TEMPERATURE (C) 70 +100C -40C +25C -9 -10 AD8130 -10.5 -11.0 -50 9 85 100 02464-131 9.5 OUTPUT VOLTAGE (V) AD8129 02464-128 INPUT COMMON MODE (V) 10.0 -11 0 Figure 127. Common-Mode Voltage Range vs. Temperature, Typical 1% Gain Compression 5 10 15 20 25 OUTPUT CURRENT (mA) 30 35 Figure 130. Output Voltage Range vs. Output Current, Typical 1% Gain Compression Rev. C | Page 31 of 40 40 AD8129/AD8130 THEORY OF OPERATION The AD8129/AD8130 use an architecture called active feedback, which differs from that of conventional op amps. The most obvious differentiating feature is the presence of two separate pairs of differential inputs compared with a conventional op amp's single pair. Typically, for the active feedback architecture, one of these input pairs is driven by a differential input signal, while the other is used for the feedback. This active stage in the feedback path is where the term active feedback is derived. Therefore, the input dynamic ranges are limited to about 2.5 V for the AD8130 and 0.5 V for the AD8129 (see the AD8129/AD8130 Specifications section for more detail). For this and other reasons, it is not recommended to reverse the input and feedback stages of the AD8129/AD8130, even though some apparently normal functionality may be observed under some conditions. A few simple circuits can illustrate how the active feedback architecture of the AD8129/AD8130 operates. The active feedback architecture offers several advantages over a conventional op amp in many types of applications. Among these are excellent common-mode rejection, wide input common-mode range, and a pair of inputs that are high impedance and completely balanced in a typical application. In addition, while an external feedback network establishes the gain response as in a conventional op amp, its separate path makes it completely independent of the signal input. This eliminates any interaction between the feedback and input circuits, which traditionally causes problems with CMRR in conventional differential-input op amp circuits. OP AMP CONFIGURATION If only one of the input stages of the AD8129/AD8130 is used, it functions very much like a conventional op amp (see Figure 131). Classical inverting and noninverting op amps circuits can be created, and the basic governing equations are the same as for a conventional op amp. The unused input pins form the second input and should be shorted together and tied to ground or a midsupply voltage when they are not used. +V Another advantage is the ability to change the polarity of the gain merely by switching the differential inputs. A high inputimpedance inverting amplifier can be made. Besides a high input impedance, a unity-gain inverter with the AD8130 has a noise gain of unity. This produces lower output noise and higher bandwidth than op amps that have noise gain equal to 2 for a unity-gain inverter. When the feedback path is closed around the part, the output drives the feedback input to the voltage that causes the internal currents to sum to 0. This occurs when the two differential inputs are equal and opposite; that is, their algebraic sum is 0. In a closed-loop application, a conventional op amp has its differential input voltage driven to near 0 under nontransient conditions. The AD8129/AD8130 generally has differential input voltages at each of its input pairs, even under equilibrium conditions. As a practical consideration, it is necessary to limit the differential input voltage internally with a clamp circuit. 1 + 7 PD +VS 10F 8 6 VIN 4 VOUT + -VS 5 2 RF RG -V 0.1F 10F 02464-132 The two differential input stages of the AD8129/AD8130 are each transconductance stages that are well matched. These stages convert the respective differential input voltages to internal currents. The currents are then summed and converted to a voltage, which is buffered to drive the output. The compensation capacitor is in the summing circuit. 0.1F 3 NOTES 1. THIS CIRCUIT IS PROVIDED TO DEMONSTRATE DEVICE OPERATION. IT IS NOT RECOMMENDED TO USE THIS CIRCUIT IN PLACE OF AN OP AMP. Figure 131. With Both Inputs Grounded, the Feedback Stage Functions like an Op Amp: VOUT = VIN (1 + RF/RG). With the unused pair of inputs shorted, there is no differential voltage between them. This dictates that the differential input voltage of the used inputs is also 0 for closed-loop applications. Because this is the governing principle of conventional op amp circuits, an active feedback amplifier can function as a conventional op amp under these conditions. Note that this circuit is presented only for illustration purposes to show the similarities of the active feedback architecture functionality to conventional op amp functionality. If it is desired to design a circuit that can be created from a conventional op amp, it is recommended to choose a conventional op amp with specifications that are better suited to that application. These op amp principles are the basis for offsetting the output, as described in the Output Offset/Level Translator section. Rev. C | Page 32 of 40 AD8129/AD8130 APPLICATIONS BASIC GAIN CIRCUITS The gain of the AD8129/AD8130 can be set with a pair of feedback resistors. The basic configuration is shown in Figure 132. The gain equation is the same as that of a conventional op amp: G = 1 + RF/RG. For unity-gain applications using the AD8130, RF can be set to 0 (short circuit), and RG can be removed (see Figure 133). The AD8129 is compensated to operate at gains of 10 and higher; therefore, shorting the feedback path to obtain unity gain causes oscillation. +V AD8129/ AD8130 1 VIN + 10F 0.1F 3 7 PD +VS 8 + -VS 5 2 RF 10F 0.1F 02464-133 RG -V The AD8130 has excellent common-mode rejection at its inputs. This makes it an ideal candidate for a receiver for signals that are transmitted over long distances on twisted-pair cables. Category 5 cables are very common in office settings and are extensively used for data transmission. These cables can also be used for the analog transmission of signals such as video. These long cables pick up noise from the environment they pass through. This noise does not favor one conductor over another and therefore is a common-mode signal. A receiver that rejects the common-mode signal on the cable can greatly enhance the signal-to-noise ratio performance of the link. The AD8130 is also very easy to use as a differential receiver, because the differential inputs and the feedback inputs are entirely separate. This means that there is no interaction between the feedback network and the termination network, as there would be in conventional op amp types of receivers. VOUT 6 4 TWISTED-PAIR CABLE, COMPOSITE VIDEO RECEIVER WITH EQUALIZATION USING AN AD8130 Another issue with long cables is that there is more attenuation of the signal at longer distances. Attenuation is also a function of frequency; it increases to roughly the square root of frequency. Figure 132. Basic Gain Circuit: VOUT = VIN (1 + RF/RG) +V For good fidelity of video circuits, the overall frequency response of the transmission channel should be flat vs. frequency. Because the cable attenuates the high frequencies, a frequency-selective boost circuit can be used to undo this effect. These circuits are called equalizers. AD8130 10F 0.1F VIN 1 + 3 7 PD +VS 8 6 4 5 + VOUT -VS -V 0.1F 10F 02464-134 2 Figure 133. An AD8130 with Unity Gain The input signal can be applied either differentially or in a single-ended fashion--all that matters is the magnitude of the differential signal between the two inputs. For single-ended input applications, applying the signal to the +IN with -IN grounded creates a noninverting gain, while reversing these connections creates an inverting gain. Because the two inputs are high impedance and matched, both of these conditions provide the same high input impedance. Thus, an advantage of the active feedback architecture is the ability to make a high input impedance inverting op amp. If conventional op amps are used, a high impedance buffer followed by an inverting stage is needed. This requires two op amps. An equalizer uses frequency-dependent elements (Ls and Cs) to create a frequency response that is the opposite of the rest of the channel's response to create an overall flat response. There are many ways to create such circuits, but a common technique is to put the frequency-selective elements in the feedback path of an op amp circuit. The AD8130 in particular makes this easier than other circuits, because, once again, the feedback path is completely independent of the input path and there is no interaction. The circuit in Figure 134 was developed as a receiver/equalizer for transmitting composite video over 300 meters of Category 5 cable. This cable has an attenuation of approximately 20 dB at 10 MHz for 300 meters. At 100 MHz, the attenuation is approximately 60 dB (see Figure 135). Rev. C | Page 33 of 40 AD8129/AD8130 +V AD8130 VIN 1 100 0.1F + 3 7 PD +VS It is difficult to calculate the exact component values via strictly mathematical means, because the equations for the cable attenuation are approximate and have functions that are not simply related to the responses of RC networks. The method used in this design was to approximate the required response via graphical means from the frequency response and then select components that would approximate this response. The circuit was then built, measured, and finally adjusted to obtain an acceptable response--in this case, flat to 9 MHz to within approximately 1 dB (see Figure 137). 10F 8 6 4 VOUT + -VS 5 R1 100 C1 200pF RG 499 0.1F 10F -V 02464-135 2 RF 1k 20 Figure 134. An Equalizer Circuit for Composite Video Transmissions over 300 Meters of Category-5 Cable 10 0 20 -10 I/O RESPONSE 10 0 I/O RESPONSE -10 -20 -20 -30 -40 -50 -30 -60 -40 -70 -80 10k -60 100k 1M 10M 100M FREQUENCY (Hz) -70 02464-138 -50 100k 1M FREQUENCY (Hz) 10M 100M 02464-136 Figure 137. Combined Response of Cable Plus Equalizer -80 10k Figure 135. Transmission Response of 300 Meters of Category-5 Cable The feedback network is between Pin 6 and Pin 5 and from Pin 5 to ground. C1 and RF create a corner frequency of about 800 kHz. The gain increases to provide about 15 dB of boost at 8 MHz. The response of this circuit is shown in Figure 136. OUTPUT OFFSET/LEVEL TRANSLATOR The circuit in Figure 133 has the reference input (Pin 4) tied to ground, which produces a ground-referenced output signal. If it is desired to offset the output voltage from ground, the REF input can be used (see Figure 138). The level VOFFSET appears at the output with unity gain. +V 20 10 AD8130 0 VIN 1 + 7 PD +VS 10F VOUT = VIN +VOFFSET 8 6 -20 VOFFSET -30 4 5 + -VS 2 -40 0.1F -60 -V -70 -80 10k 100k 1M 10M FREQUENCY (Hz) Figure 136. Frequency Response of Equalizer Circuit 100M 10F 02464-139 -50 02464-137 I/O RESPONSE -10 0.1F 3 Figure 138. The Voltage Applied to Pin 4 to the Unity-Gain Output Voltage Produced by VIN If the circuit has a gain higher than unity, the gain must be factored in. If RG is connected to ground, the voltage applied to REF is multiplied by the gain of the circuit and appears at the output--just like a noninverting conventional op amp. This situation is not always desirable; the user may want VOFFSET to appear at the output with unity gain. Rev. C | Page 34 of 40 AD8129/AD8130 +V One way to accomplish this is to drive both REF and RG with the desired offset signal (see Figure 139). Superposition can be used to solve this circuit. First, break the connection between VOFFSET and RG. With RG grounded, the gain from Pin 4 to VOUT is 1 + RF/RG. With Pin 4 grounded, the gain though RG to VOUT is -RF/RG. The sum of these is 1. If VREF is delivered from a low impedance source, this works fine. However, if the delivered offset voltage is derived from a high impedance source, such as a voltage divider, its impedance affects the gain equation. This makes the circuit more complicated because it creates an interaction between the gain and offset voltage. AD8130 0.1F VIN + PD +VS 8 6 4 4 + -VS 5 RG VOUT + -VS 5 0.1F -V 10F 02464-142 2 A general summing circuit can be made by the previous technique. A unity-gain configured AD8130 has one signal applied to +IN, while the other signal is applied to REF. The output is the sum of the two input signals (see Figure 142). VOUT = VIN x (1 + R F/RG) + V OFFSET 6 VOFFSET +VS SUMMER 10F 0.1F 1 VIN PD 10F Figure 141. Gain-of-2 Connections with No Resistors AD8129/ AD8130 7 + 7 8 +V 3 1 3 2 +V RF AD8130 V1 Figure 139. In this Circuit, VOFFSET Appears at the Output with Unity Gain. This Circuit Works Well if the VOFFSET Source Impedance Is Low. 1 VIN + PD +VS 8 VOFFSET 6 RF 4 + VOUT = VIN x (1 + RF/RG) + VOFFSET -VS 5 RG 2 RF -V 0.1F 10F 02464-141 RG +VS 10F VOUT = V1 + V2 + -VS 2 0.1F -V 10F Figure 142. A Summing Circuit that is Noninverting with High Input Impedance This circuit offers several advantages over a conventional op amp inverting summing circuit. First, the inputs are both high impedance and the circuit is noninverting. It would require significant additional circuitry to make an op amp summing circuit that has high input impedance and is noninverting. 10F 0.1F 4 5 +V 7 PD 6 A way around this is to apply the offset voltage to a voltage divider whose attenuation factor matches the gain of the amplifier and then apply this voltage to the high impedance REF input. This circuit first divides the desired offset voltage by the gain, and the amplifier multiplies it back up to unity (see Figure 140). 3 + 7 8 V2 AD8129/ AD8130 1 0.1F 3 02464-143 10F 02464-140 0.1F -V Figure 140. Adding an Attenuator at the Offset Input Causes It to Appear at the Output with Unity Gain. Another advantage is that the AD8130 circuit still preserves the full bandwidth of the part. In a conventional summing circuit, the noise gain is increased for each additional input, so the bandwidth response decreases accordingly. By this technique, four signals can be summed by applying them to two AD8130s and then summing the two outputs by a third AD8130. CABLE-TAP AMPLIFIER RESISTORLESS GAIN OF 2 The voltage applied to the REF input (Pin 4) can also be a high bandwidth signal. If a unity-gain AD8130 has both +IN and REF driven with the same signal, there is unity gain from VIN and unity gain from VREF. Thus, the circuit has a gain of 2 and requires no resistors (see Figure 141). It is often desirable to have a video signal drive several pieces of equipment. However, the cable should only be terminated once at its endpoint; therefore, it is not appropriate to have a termination at each device. A loop-through connection allows a device to tap the video signal while not disturbing it by any excessive loading. Rev. C | Page 35 of 40 AD8129/AD8130 Such a connection, also referred to as a cable-tap amplifier, can be simply made with an AD8130 (see Figure 143). The circuit is configured with unity gain, and if no output offset is desired, the REF pin is grounded. The negative differential input is connected directly to the shield of the cable (or an associated connector) at the point at which it wants to be tapped. +V EXTREME OPERATING CONDITIONS The AD8129/AD8130 are designed to provide high performance over a wide range of supply voltages. However, there are some extremes of operating conditions that have been observed to produce suboptimal results. One of these conditions occurs when the AD8130 is operated at unity gain with low supply voltage--less than approximately 4 V. AD8130 75 + 3 7 PD +VS At unity gain, the output drives FB directly. With supplies of VS less than approximately 4 V at unity gain, the output can drive FB's voltage too close to the rail for the circuit to stay properly biased. This can lead to a parasitic oscillation. 10F 8 6 4 VOUT + -VS 5 2 0.1F 10F 02464-144 VIDEO IN -V 75 Figure 143. The AD8130 Can Tap the Video Signal at Any Point Along the Cable Without Loading the Signal. The center conductor connects to the positive differential input of the AD8130. The amplitude of the video signal at this point is unity, because it is between the two termination resistors. The AD8130 provides a high impedance to this signal so that the signal is not disturbed. A buffered unity-gain version of the video signal appears at the output. A way to prevent this is to limit the input signal swing with clamp diodes. Common silicon-junction signal diodes like the 1N4148 have a forward bias of approximately 0.7 V when about 1 mA of current flows through them. Two series pairs of such diodes connected antiparallel across the differential inputs can be used to clamp the input signal and prevent this condition. It should be noted that the REF input can also shift the output signal; therefore, this technique only works when REF is at ground or close to it (see Figure 145). +V AD8130 VIN 1N4148 + 7 PD +VS 10F 8 POWER-DOWN 6 The AD8129/AD8130 have a power-down pin that can be used to lower the quiescent current when the amplifier is not being used. A logic low level on the PD pin causes the part to power down. Because there is no ground pin on the AD8129/AD8130, there is no logic reference to interface to standard logic levels. For this reason, the reference level for the PD input is VS. If the AD8129/AD8130 are run with VS = 5 V, there is direct compatibility with logic families. However, if VS is higher than this, a level-shift circuit is needed to interface to conventional logic levels. A simple level-shifting circuit that is compatible with common logic families is presented in Figure 144. VIN AD8129/ AD8130 0.1F 10F Figure 145. Clamping Diodes at the Input Limits the Input Swing Amplitude 3 PD 2N2222 OR EQ VOUT -VS -V 02464-145 4.99k + 2 7 +VS 1k 4 5 +VS LOW = POWER-DOWN 1 0.1F 3 02464-146 1 0.1F Figure 144. Circuit that Shifts the Logic Level When VS Is Not Equal to Approximately 5 V. Rev. C | Page 36 of 40 AD8129/AD8130 Another problem can occur with the AD8129 operating at a supply voltage of greater than or equal to 12 V. The architecture causes the supply current to increase as the input differential voltage increases. If the AD8129 differential inputs are overdriven too far, excessive current can flow into the device and potentially cause permanent damage. The power dissipation is a function of several operating conditions, including the supply voltage, the input differential voltage, the output load, and the signal frequency. A practical means to prevent this from occurring is to clamp the inputs differentially with a pair of antiparallel Schottky diodes (see Figure 146). These diodes have a lower forward voltage of approximately 0.4 V. If the differential voltage across the inputs is restricted to these conditions, no excess current is drawn by the AD8129 under these operating conditions. A basic starting point is to calculate the quiescent power dissipation with no signal and no differential input voltage. This is just the product of the total supply voltage and the quiescent operating current. The maximum operating supply voltage is 26.4 V, and the quiescent current is 13 mA. This causes a quiescent power dissipation of 343 mW. For the MSOP package, the JA specification is 142C/W. Therefore, the quiescent power causes about a 49C rise above ambient in the MSOP package. If the supply voltage is restricted to less than 11 V, the internal clamping circuit limits the differential voltage and excessive supply current is not drawn. The external clamp circuit is not needed. The current consumption is also a function of the differential input voltage (see Figure 113 and Figure 114). This current should be added onto the quiescent current and then multiplied by the total supply voltage to calculate the power. The AD8129/AD8130 can directly drive loads of as low as 100 , such as a terminated 50 cable. The worst-case power dissipation in the output stage occurs when the output is at midsupply. As an example, for a 12 V supply with the output driving a 250 load to ground, the maximum power dissipation in the output occurs when the output voltage is 6 V. The load current is 6 V/250 = 24 mA. This same current flows through the output across a 6 V drop from VS. It dissipates 144 mW. For the 8-lead MSOP package, this causes a temperature rise of 20C above ambient. Although this is a worst-case number, it is apparent that this can be a considerable additional amount of power dissipation. +V AD8129 0.1F VIN 3 1 AGILENT HSMS 2822 VIN + 3 7 PD +VS 10F 8 1 2 6 4 5 + VOUT -VS 0.1F 10F -V 02464-147 2 Figure 146. Schottky Diodes Across the Inputs Limits the Input Differential Voltage In both circuits, the input series resistors function to limit the current through the diodes when they are forward biased. As a practical matter, these resistors must be matched so that the CMRR is preserved at high frequencies. These resistors have minimal effect on the CMRR at low frequency. POWER DISSIPATION The AD8129/AD8130 can operate with supply voltages from +5 V to 12 V. The major reason for such a wide supply range is to provide a wide input common-mode range for systems that can require this. This would be encountered when significant common-mode noise couples into the input path. For applications that do not require a wide dynamic range for the input or output, it is recommended to operate with lower supply voltages. Several changes can be made to alleviate this. One is to use the standard 8-lead SOIC package. This lowers the thermal impedance to 121C/W, which is a 15% improvement. Another is to use a lower supply voltage unless absolutely necessary. Finally, do not use the AD8129/AD8130 when it is operating on high supply voltages to directly drive a heavy load. It is best to use a second op amp after the output stage. Some of the gain can be shifted to this stage so that the signal swing at the output of the AD8129/AD8130 is not too large. The AD8129/AD8130 is also available in a very small 8-lead MSOP package. This package has higher thermal impedance than larger packages and operates at a higher temperature with the same amount of power dissipation. Certain operating conditions that are within the specifications range of the parts can cause excess power dissipation. Caution should be exercised. Rev. C | Page 37 of 40 AD8129/AD8130 LAYOUT, GROUNDING, AND BYPASSING The AD8129/AD8130 are very high speed parts that can be sensitive to the PCB environment in which they operate. Realizing their superior specifications requires attention to various details of standard high speed PCB design practice. The first requirement is for a good solid ground plane that covers as much of the board area around the AD8129/AD8130 as possible. The only exception to this is that the ground plane around the FB pin should be kept a few millimeters away, and the ground should be removed from the inner layers and the opposite side of the board under this pin. This minimizes the stray capacitance on this node and helps preserve the gain flatness vs. frequency. The power supply pins should be bypassed as close as possible to the device to the nearby ground plane. Good high frequency ceramic chip capacitors should be used, and the bypassing should be done with a capacitance value of 0.01 F to 0.1 F for each supply. Farther away, low frequency bypassing should be provided with 10 F tantalum capacitors from each supply to ground. The signal routing should be short and direct to avoid parasitic effects. Where possible, signals should be run over ground planes to avoid radiating or to avoid being susceptible to other radiation sources. Rev. C | Page 38 of 40 AD8129/AD8130 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 8 5 4.00 (0.1574) 3.80 (0.1497) 1 6.20 (0.2440) 4 5.80 (0.2284) 1.27 (0.0500) BSC 0.50 (0.0196) x 45 0.25 (0.0099) 1.75 (0.0688) 1.35 (0.0532) 0.25 (0.0098) 0.10 (0.0040) 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 147. 8-Lead Standard Small Outline Package [SOIC] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.20 3.00 2.80 8 3.20 3.00 2.80 1 5 5.15 4.90 4.65 4 PIN 1 0.65 BSC 0.95 0.85 0.75 1.10 MAX 0.15 0.00 0.38 0.22 COPLANARITY 0.10 0.23 0.08 8 0 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 148. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Rev. C | Page 39 of 40 0.80 0.60 0.40 AD8129/AD8130 ORDERING GUIDE Model AD8129AR AD8129AR-REEL AD8129AR-REEL7 AD8129ARZ 2 AD8129ARZ-REEL2 AD8129ARZ-REEL72 AD8129ARM AD8129ARM-REEL AD8129ARM-REEL7 AD8129ARMZ2 AD8129ARMZ-REEL2 AD8129ARMZ-REEL72 AD8130AR AD8130AR-REEL AD8130AR-REEL7 AD8130ARZ2 AD8130ARZ-REEL2 AD8130ARZ-REEL72 AD8130ARM AD8130ARM-REEL AD8130ARM-REEL7 AD8130ARMZ2 AD8130ARMZ-REEL2 AD8130ARMZ-REEL72 1 2 Temperature Range 1 -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C Package Description 8-Lead SOIC 8-Lead SOIC, 13" Tape and Reel 8-Lead SOIC, 7" Tape and Reel 8-Lead SOIC 8-Lead SOIC, 13" Tape and Reel 8-Lead SOIC, 7" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel 8-Lead SOIC 8-Lead SOIC, 13" Tape and Reel 8-Lead SOIC, 7" Tape and Reel 8-Lead SOIC 8-Lead SOIC, 13" Tape and Reel 8-Lead SOIC, 7" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel Operating temperature range for 5 V or +5 V operation is -40C to +125C. Z = Pb-free part; # indicates lead-free, may be top or bottom marked. (c) 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02464-0-11/05(C) Rev. C | Page 40 of 40 Package Option R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 Branding HQA HQA HQA HQA# HQA# HQA# HPA HPA HPA HPA# HPA# HPA#