DATA SHEET LND3842A/43A/44A/45A LND3842B/43B/44B/45B Current Mode PWM Controller GENERAL DESCRIPTION The LND3842B/43B/44B/45B and LND3842A /43A/44A/45A are fixed frequency current mode PWM controllers. They are specially designed for OFF-line and DC to DC converter applications with a minimal of external components. Internally implemented circuits include a trimmed oscillator for precise duty cycle control, a temperature compensated reference, high gain error amplifier, current sensing comparator. Protection circuitry includes undervoltage lockout and current limiting. The LND3843B, A and LND3844B, A have UVLO thresholds of 16V(on) and 10 V (off). The corresponding thresholds for the LND3843B, A/ 45B,A are 8.4 V (on) and 7.6(off). The LND3842B, A and LND3843B, A can operate within 100% duty cycle. The LND3844B, A and LND3845B, A can operate within 50% duty cycle. The LND384XB has Start-Up current of .45mA(typ). The LND384XA has Start-Up current of .17mA(typ). FEATURES * Low start-up and operating Current * High Current Totem Pole Output * Undervoltage Lockout with Hysterisis * Operating Frequency up to 500KHZ PIN CONFIGURATION COMP V FB I SENSE R /C T T 1 8 V 2 7 V 3 6 OUT 4 5 GND REF CC * Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com * LND3842/43/44/45 ABSOLUTE MAXIMUM RATINGS Characteristic Symbol Value Units Vcc 30 V Output Current IO 1 A Input Voltage (Analog Inputs pins 2,3) VI -0.3 to 5.5 V ISINK(E.A) 10 mA Power Dissipation (TA =25C) PO 1 W Storage Temperature Range Tstg -65 to 150 C Lead Temperature ( soldering 5 sec.) TL 260 C Supply voltage (low impedance source) Error Amp Output Sink Current BLOCK DIAGRAM VCC 8 UVLO VREF 7 36V 5V VREF SET/ RESET GND 5 VREF LOGIC INTERNAL BIAS 1/2 VREF POWER VREF + 2 VFB - 2R ERR AMP C.S. COMP R PWM LATCH 1V 1 3 4 7 R OUT 6 COMP S 5 CURRENT SENSE POWER GND T R T / CT OSCILLATOR * Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com * LND3842/43/44/45 ELECTRICAL CHARACTERISTICS (*Vcc =15 V, RT=10k ,CT=3.3nF, TA=0 to 70 C, unless otherwise specified ) Characteristics Reference Section Reference Output Voltage Line Regulation Load Regulation Short Circuit Output Current Oscillator Section Oscillation Frequency Frequency change with Voltage Oscillator Amplitude Error Amplitude Section Input Bias Current Input Voltage Open Loop Voltage Gain Power Supply Rejection ratio Output Sink Current Symbol Test Conditions Min Typ Max Unit VREF VREF VREF TJ =25C, IREF=1mA 12VVCC25V 1mA IREF20mA 4.9 5.0 6.0 6.0 5.1 20 25 V ISC TA=25C 100 180 mA f TJ=25C 47 mV 52 57 KHz 1.0 % f/Vcc 12VVCC25V 0.05 V(OSC) (Peak to Peak) 1.6 IBIAS VI(E,A) AVOL VFB=3V Vpin1=2.5V 2VVO4V 65 -0.1 2.5 90 PSRR 12VVCC25V 60 70 ISINK Vpin2 =2.7V, Vpin1=1.1V 2 7 mA Output Source current ISOURCE Vpin2=2.3V, Vpin1=5V -0.5 -1.0 mA High Output Voltage VOH 5.0 6.0 Low Output Voltage VOL Current Sense Section Gain Maximum Input Signal Supply Voltage rejection Input Bias Current Output Section GV VI(MAX) SVR IBIAS Low Output Voltage VOL High Output Voltage VOH Rise Time tR Fall time tF Vpin2=2.3V,RL=15k to GND Vpin2=2.7V,RL=15k t o PIN 8 (Note 1& 2) Vpin1 =5V(note 1) 12VVcc25V(note 1) Vpin3= 3V Isink=20mA Isink=200mA Isink=20mA Isink=200mA TJ=25C, CL =1nF(note 3) TJ=25C, CL =1nF(note 3) V -2 2.58 A V dB V 2.85 0.9 13 12 0.8 1.1 3.0 1.0 70 -3.0 3.15 1.1 0.08 1.4 13.5 13.0 0.4 2.2 45 150 nS 35 150 nS -10 V/V V dB A V Undervoltage Lockout Section Start Threshold Min. Operating Voltage (After Turn on) PWM Section VTH(ST) VOPR(MIN) Max. Duty Cycle D(MAX) Min. Duty cycle Total Standby Current D(MAX) Start-Up current IST Operating Supply Current Zener Voltage ICC(OPR) VZ LND3842A,B/44A,B LND3842A,B/45A,B LND3842A,B/44A,B LND3842A,B/45A,B 14.5 7.8 8.5 7.0 16.0 8.4 10 7.6 17.5 9.0 11.5 8.2 LND3842A,B/43A,B LND3842A,B/45A,B 95 47 97 48 100 50 0 0.3 1 17 30 0.17 0.45 13 38 LND3842A/43A/44A/45A LND3842B/43B/44B/45B VPIN3=VPIN2 =0V ICC=25mA V V % mA mA V *Adjust VCC above the start threshold before setting it to 15V. * Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com * LND3842/43/44/45 Note 1: Parameter measured at trip point of latch with Vpin2=0 Note 2: Gain defined as A=Vpin1/=Vpin3 : 0 Vpin30.8V. Note 3: These parameters, although guaranteed, are not 100% tested in production. PIN DESCRIPTION No FUNCTION DESCRIPTION 1 COMP This pin is the Error Amplifier output and is made for loop compensation 2 VFB This is the inverting input of the Error Amplifier. It is normally connected to the switching power supply output through a resistor divider. 3 ISENSE A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate the output switch conduction. 4 RT/CT The oscillator frequency and maximum Output duty cycle are programmed by connecting resistor RT to Vref and capacitor CT to ground. 5 GROUND This pin is the combined control circuitry and power ground 6 OUTPUT This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced and sinked by this pin. 7 VCC This pin is the positive supply of the integrated circuit. 8 VREF This is the reference output. It provides charging current for capacitor CT through resistor RT. TYPICAL APPLICATIONS 2.5V 1mA + 2 - 1 Figure 1. Error Amp Configuration * Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com * LND3842/43/44/45 VCC ICC 7 ON/OFF COMMAND TO S/R OF IC LND3842 LND3844 LND3843 LND3845 VON 16V 8.4V VOFF 10V 7.6V 13mA .2mA V CC VON During UVLO, the Output is low VOFF Figure 2. Undervoltage Lockout + V IS FB COMP R RS C 2 ERROR AMP 2R R - 1V 1 CURRENT SENSE COMPARATOR 3 CURRENT SENSE 5 GND y Peak current is determined by I S max 1.0V RS Figure 3. Current Sense Circuit * Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com * LND3842/43/44/45 VREF RT IS RSLOPE R1 RS RT / CT ISENSE VREF 8 RT LND3842 4 IS RT / CT RSLOPE R1 3 5 ISENSE 8 LND3842 4 3 5 RS GND GND Figure 4. Slope Compensation Techniques 8 R BIAS R + 1mA + 2 ERROR AMP 2R - R 1 5 SCR must be selected for a holding current of less than 0.5 mA. A simple two transistor circuit can be used in place of the SCR as shown. Figure 5. Latched Shutdown * Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com * LND3842/43/44/45 + 2.5V From VO Ri Rd Cf 1mA + VFB 2 Rf 1 2R ERROR AMP - R COMP 5 Error Amp compensation circuit f or stabilizing any current-mode topology except f or boost and f ly back conv erters operating with continuous inductor current. + 2.5V 1mA From VO Rp + Ri Cp Rd Cf VFB 2 Rf 1 ERROR AMP - COMP 2R R 5 Error Amp compensation circuit f or stabilizing current-mode and f ly back topologies operating with continuous inductor current. Figure 6. Error Amplifier Compensation * Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com * LND3842/43/44/45 8 VREF R BIAS R RT 4 RT / CT EXTERNAL SYNC INPUT .01F OSC + 1mA + CT 2 47 2R ERROR AMP - R 1 5 Figure 7. External Clock Synchronization 8 5Vref + R BIAS R - 4 OSC + 1mA + 2 1M ERROR AMP - 2R + R S R - 1 C 5 Figure 8. Soft-Start Circuit * Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com * LND3842/43/44/45 TYPICAL PERFORMANCE CHARACTERISTICS RT (K ) % C = 200pF CT = 100pF T 50 50 CT =1nF C = 500pF T CT =2nF CT = 1nF CT =5nF 20 20 CT =10nF CT = 5nF C = 10nF T CT = 2nF 10 10 5 5 CT =500pF CT =200pF 2 2 Vcc =15V Vcc =15V o TA =25 C o TA =25 C 1 CT =100pF 1 10 20 30 50 100 200 300 500 10 f OSC (KHz) 20 30 50 100 200 300 500 f OSC (KHz) Figure 2. Output Dead-Time vs. Oscillator Frequency Figure 1. Timing Resistor vs. Oscillator Frequency (dB) 90 80 80 60 Vcc = 15V VO = 2V to 4V RL = 100K TA = 25 o C 70 40 60 20 50 0 40 -20 1 2 3 4 5 6 Figure 3. Maximum Output Duty Cycle vs. Timing Resistor 10 100 1K 10K 100K 1M f (Hz) Figure 4. Error Amp Open-Loop Gain vs. Frequency * Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com * LND3842/43/44/45 ISC (mA) VTH (V) 1.0 100 0.8 90 TA = 125o C 80 0.6 70 0.4 TA = 25o C 0.2 60 50 1 2 3 4 5 6 7 Figure 5. Current Sense Input Threshold vs. Output VREF PWM CT 4 25 50 75 100 TA ( o C) Figure 6. Reference Short Circuit Current vs. Temperature 5V REG RT / CT 6 CLOCK RT / CT 0 7 8 RT VO (V) OSCILLATOR ID OUTPUT OUTPUT LARGE R T / SMALL CT RT / C T OUTPUT SMALL RT / Large CT 5 GND Figure 7. Oscillator and Output Waveforms * Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com *