© 2003 Fairchild Semiconductor Corporation DS500501 www.fairchildsemi.com
April 2001
Revised June 2003
FIN1027 • FIN1027A 3.3V LVDS 2-Bit High Speed Differential Driver
FIN1027 FIN1027A
3.3V LVDS 2-Bit High Speed Differential Driver
General Description
This dual driver is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The driver tra nsl at es LVTTL sig nal l eve ls to LVDS lev-
els with a ty pical d ifferen tial outpu t swin g of 35 0 mV w hich
provides low EMI at ultra low power dissipation even at
high freq uencies . This device is ideal for hig h speed trans-
fer of clock or data.
The FI N1027 or FI N1027A can be paire d with its com pan-
ion receiver, the FIN1028, or with any other LVDS receiver.
Features
Greater than 600Mbs data rate
3.3V power supply operation
0.5ns maximum differential pulse skew
1.5ns maximum propagation delay
Low power dissipa ti on
Power-Off protection
Meets or exceeds the TIA/EIA-644 LVDS standard
Flow-th rou gh pinout simplif ie s PCB lay out
8-Lead SOIC, US8, and 8-terminal MLP
packages save space
Ordering Code:
Order Number Package Number Package Description
FIN1027M M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TUBE]
FIN1027MX M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TAPE and REEL]
FIN1027K8X MAB08A 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
[TAPE and REEL]
FIN1027MPX
(Preliminary) MLP08C 8-Terminal Molded Leadless Package (MLP) Dual, JEDEC MO-229, 2mm Square
[TAPE and REEL]
FIN1027AM M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TUBE]
FIN1027AMX M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TAPE and REEL]
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FIN1027 FIN1027A
Connection Diagrams
Pin Assi gnments for SOIC
FIN1027
(Top View)
Pin Assi gnments for SOIC
FIN1027A
(Top View)
Pin Assignments for US8
for FIN1027
(Top View)
Terminal Assignments for MLP
FIN1027
(Top Through View)
Pin Descriptions Function Table
H = HIGH Lo gic Level
L = LOW Logic Le v el
X = Don’t Care
Pin Name Description
DIN1, DIN2 LVTTL Data Inputs
DOUT1+, DOUT2+Non-inverting Driver Outputs
DOUT1, DOUT2Invert ing Driver Outpu ts
VCC Power Supply
GND Ground
Input Outputs
DIN DOUT+DOUT
LLH
HHL
OPEN L H
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FIN1027 FIN1027A
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: The Absolute Maximum Ratings: are t hos e v alues bey ond whic h
damage to the device may occur. The databook specifications should be
met, with out exc ept ion, to ens ure t hat the sys tem des ign is reli able ov er its
power supply, temperature and output/input loading variables. Fairchild
does not recommend operation of circuits outside databook specification.
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 2: All typical values are at TA = 25°C and wit h VCC = 3.3V.
Supply Voltage (VCC)0.5V to +4.6V
DC In put Voltage (DIN)0.5V to +6.0V
DC Output Vo ltage (DOUT)0.5V to +4.7V
Driver Short Circuit Current (IOSD) Continuous
Storage Temperature Range (TSTG)65°C to +150°C
Max Junct ion Temper atu re (T J)150°C
Lead Temperature (TL)
(Soldering, 10 seconds) 260°C
ESD (Human Body Model) 6500V
ESD (Machine Model) 400V
Supply Voltage (VCC) 3.0V to 3.6V
Input Voltage (VIN) 0 to VCC
Operati ng Temper atu re (T A)40°C to +85°C
Symbol Parameter Test Co nditions Min Typ Max Units
(Note 2)
VOD Output Differential Voltage
RL = 100 , See Figure 1
250 350 450 mV
VOD VOD Magnitude Change from 25 mV
Differential LOW-to-HIGH
VOS Offset Voltage 1.125 1.25 1.375 V
VOS Offset Magnitude Change from 25 mV
Differential LOW-to-HIGH
IOFF Power Off Output Current VCC = 0V, VOUT = 0V or 3.6V ±20 µA
IOS Short Circuit Output Current VOUT = 0V 8mA
VOD = 0V ±8
VIH Input HIGH V olta ge 2.0 VCC V
VIL Input LOW V olta ge GND 0.8 V
IIN Input Current VIN = 0V or VCC ±20 µA
II(OFF) Power-Off Input Current VCC = 0V, VIN = 0V or 3.6V ±20 µA
VIK Input Clamp Voltage IIK = 18 mA 1.5 V
ICC Power Supply Current No Load, VIN = 0V or VCC 12.5 mA
RL = 100 , VIN = 0V or VCC 17.0 mA
CIN Input Capacitance 4pF
COUT Output Capacitance 6pF
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FIN1027 FIN1027A
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 3: All typi c al valu es are at TA = 25°C and with VCC = 3.3V.
Note 4: tSK(LH), tSK(HL) is t he ske w betwee n specified outputs of a s ingle device when t he ou tp ut s have identic al loads and are swit c hing in t he sam e direc-
tion.
Note 5: tSK(PP) is t he mag nit ude of t he difference in pro pagatio n delay t im es betwe en any sp ecified t erminals of t w o devices swit c hing in the sam e d ire c ti on
(eithe r LOW-to-H I GH or HIGH-t o-LOW ) w hen both devices operate w it h t he same s upply voltage, same tempe rature, and have identica l test circuits.
FIGURE 1. Differential Driver DC Test Circuit
Note A: All input puls es have frequency = 10 MHz, tR or tF = 2 ns
Note B: CL includes all probe and f ixture capac itances
FIGURE 2. Differential Driver Propagation Delay and
Transition Time Test Circuit
FIGURE 3. AC Waveforms
Symbol Parameter Test Conditions Min Typ Max Units
(Note 3)
tPLHD Differential Propagation Delay 0.5 1.5 ns
LOW-to-HIGH
tPHLD Differential Propagation Delay 0.5 1.5 ns
HIGH-to-LOW
tTLHD Differential Output Rise Time (20% to 80%) RL = 100 , CL = 10pF, 0.4 1.0 ns
tTHLD Differential Output Fall Time (80% to 20%) See Figure 2 and Figure 3 0.4 1.0 ns
tSK(P) Pulse Skew |tPLH - tPHL|0.5 ns
tSK(LH), Channel-to-Channel Skew 0.3 ns
tSK(HL) (Note 4)
tSK(PP) Part-to-Part Skew (Note 5) 1.0 ns
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FIN1027 FIN1027A
DC / AC Typical Perf ormance Curves
FIGURE 4. Output High Voltage vs.
Power Supply Voltage FIGURE 5. Output Low Voltage vs.
Power Supply Volt ag e
FIGURE 6. Output Short Circuit Current vs.
Power Supply Voltage FIGURE 7. Differential Output Voltage vs.
Power Supply Volt ag e
FIGURE 8. Differential Output Voltage vs.
Load Resistor
FIGURE 9. Offset Voltage vs.
Power Supply Volt ag e
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FIN1027 FIN1027A
DC / AC Typical Performance Curve s (Continued)
FIGURE 10. Power Supply Current vs.
Frequency FIGURE 11. Power Supply Current vs.
Power Supply Voltage
FIGURE 12. Power Supply Current vs.
Ambient Temperature FIGURE 13. Differential Propagation Delay vs.
Power Supply
FIGURE 14. Differential Propagation Delay vs.
Ambient Temperature FIGURE 15. Differential Skew (tPLH - tPHL) vs.
Power Supply
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FIN1027 FIN1027A
DC / AC Typical Perf ormance Curves (Continued)
FIGURE 16. Differential Pulse Skew (tPLH - tPHL) vs.
Ambient Temperature FIGURE 17. Transition Time vs.
Power Supply Volt ag e
FIGURE 18. Transition Time vs.
Ambient Temperature
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FIN1027 FIN1027A
Tape and Reel Specification
TAPE FORMAT for US8
TAPE DIMENSIONS inches (millimeters)
REEL DIMENSIONS inches (millimeters)
Package Tape Number Cavity Cover Tape
Designator Section Cavities Status Status
Leader (Start End) 125 (typ) Empty Sealed
K8X Carrier 250 Filled Sealed
Trailer (Hub End) 75 (typ) Empty Sealed
Tape
Size ABCDN W1 W2 W3
8 mm 7.0 0.059 0.512 0.795 2.165 0.331 + 0.059/0.000 0.567 W1 + 0.078/0.039
(177.8) (1.50) (13.00) (20.20) (55.00) (8.40 + 1.50/0.00) (14.40) (W1 + 2.00/1.00)
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FIN1027 FIN1027A
Tape and Reel Specification
TAPE FORMAT for MLP
MLP Embossed Tape Dimensions (Dimensions are in millimeters)
REEL DIMENSIONS (millimeters)
Package Ao Bo DD
1EFKoP
1Po P2TT
CWWc
±0.10 ±0.10 ±0.05 Min ±0.1 ±0.1 ±0.1 TYP TYP ±0/05 TYP ±0.005 ±0.3 TYP
2 x 2 2.30 2.30 1.55 1.0 1.75 3.5 1.0 8.0 4.0 2.0 0.3 0.06 8.0 5.3
Tape Width Dia A
Max Dim B
Min Dia C
+0.5/0.2 Dia D
Min Dim N
Min Dim W1
+2/0Dim W2
Max Dim W3
(LSL - USL)
8 mm 330 1.5 13 20.2 178 8.4 14.4 7.9 10.4
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FIN1027 FIN1027A
Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M08A
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FIN1027 FIN1027A
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
Package Number MAB08A
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FIN1027 FIN1027A 3.3V LVDS 2-Bit High Speed Differential Driver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Terminal Molded Leadless Package (MLP) Dual, JEDEC MO-229, 2mm Square
Package Number MLP08C
(Preliminary)
Fairchild does not assu me any responsibility for use of any circuitry de scribed, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life suppor t de vices o r syste ms a re device s or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical com ponent in any compon ent of a l ife supp ort
device or system whose failure to perform can be rea-
sonabl y ex pect ed to ca use the fa ilu re of the li fe su pp ort
device or system, or to affect its safety or effectiveness.
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