LTM8021
1
8021fc
TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
36VIN, 500mA
Step-Down DC/DC
µ
Module
The LTM
®
8021 is a 36VIN 500mA, step-down DC/DC
μModule
®
. Included in the package are the switching
controller, power switches, inductor, and all support
components. Operating over an input voltage range of 3V
to 36V, the LTM8021 supports an output voltage range of
0.8V to 5V, set by a single resistor. Only an output and
bulk input capacitor are needed to fi nish the design.
The low profi le package (2.82mm) enables utilization of
unused space on the bottom of PC boards for high den-
sity point of load regulation. A built-in soft-start timer is
adjustable with just a resistor and capacitor.
The LTM8021 is packaged in a thermally enhanced,
compact (11.25mm × 6.25mm) and low profi le (2.82mm)
overmolded land grid array (LGA) package suitable
for automated assembly by standard surface mount
equipment. The LTM8021 is RoHS compliant.
7VIN to 36VIN, 5V/500mA μModule Regulator
n Complete Switch Mode Power Supply
n Wide Input Voltage Range: 3V to 36V
n 500mA Output Current
n 0.8V to 5V Output Voltage
n Fixed 1.1MHz Switching Frequency
n Current Mode Control
n (e4) RoHS Compliant Package with Gold
Pad Finish
n Programmable Soft-Start
n Tiny, Low Profi le (11.25mm × 6.25mm × 2.82mm)
Surface Mount LGA Package
n Automotive Battery Regulation
n Power for Portable Products
n Distributed Supply Regulation
n Industrial Supplies
n Wall Transformer Regulation
Effi ciency and Power Loss
LTM8021
8021 TA01a
VIN*
7V TO
36V
VOUT
5V AT 500mA
1μF 2.2μF
19.1k
RUN/SS
IN
GND ADJ
BIAS
OUT
*RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS. 0
POWER LOSS (mW)
100
200
300
450
400
50
150
250
350
8021 TA01b
LOAD CURRENT (mA)
1.00
30
EFFICIENCY (%)
40
50
70
60
10.00 100.00
90
80
1000.00
POWER
LOSS
EFFICIENCY
L, LT, LTC, LTM, μModule, Linear Technology and the Linear logo are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
LTM8021
2
8021fc
ABSOLUTE MAXIMUM RATINGS
VIN, RUN/SS Voltage .................................................40V
RUN/SS Above VIN ......................................................3V
ADJ Voltage ................................................................5V
BIAS Voltage ...............................................................7V
VOUT Voltage .............................................................10V
Internal Operating Temperature
Range (Note 2) .......................................–40°C to 125°C
Maximum Solder Temperature .............................. 260°C
Storage Temperature Range .................. –55°C to 125°C
(Note 1)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Input DC Voltage VRUN/SS = 5V, RADJ = Open 3 36 V
VOUT Output DC Voltage 0 < IOUT < 500mA; RADJ Open
0 < IOUT < 500mA; RADJ = 19.1k, 0.1%
0.8
5
V
V
RADJ(MIN) Minimum Allowable RADJ Note 3 18 kΩ
ILK Leakage from IN to OUT RUN/SS = VBIAS = 0V, RADJ Open 2.7 6 μA
IOUT Continuous Output DC Current 5V ≤ VIN ≤ 36V, VBIAS = VOUT 0 500 mA
IQ(VIN) Quiescent Current into VIN RUN/SS = 0.2V, VBIAS, RADJ Open
Not Switching
0.1
1.5
1
2.5
μA
mA
IQ(BIAS) Quiescent Current into BIAS Not Switching 0.15 μA
ΔVOUT/VOUT Line Regulation 5V ≤ VIN ≤ 36V, IOUT = 500mA
RADJ = Open
0.5 %
ΔVOUT/VOUT Load Regulation VIN = 24V, 0 ≤ IOUT ≤ 500mA, VBIAS = VOUT 0.35 %
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating temp-
erature range, otherwise specifi cations are at TA = 25°C, VIN = 10V, VRUN/SS = 10V, VBIAS = 3V, RADJ = 31.6k.
ORDER INFORMATION
LEAD FREE FINISH PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE (NOTE 2)
LTM8021EV#PBF LTM8021V 35-Lead (11.25mm × 6.25mm × 2.82mm) –40°C to 125°C
LTM8021IV#PBF LTM8021V 35-Lead (11.25mm × 6.25mm × 2.82mm) –40°C to 125°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
PIN CONFIGURATION
VIN
BANK 1 VOUT
BANK 2
GND
BANK 3
ADJ
BIAS
RUN/SS
HBADC
5
1
2
3
4
EF
LGA PACKAGE
35-LEAD (11.25mm s 6.25mm s 2.82mm)
G
TOP VIEW
TJMAX = 125°C, θJA = 24.9°C/W, WEIGHT = 0.49g
θJA DERIVED FROM 6.35cm × 6.35cm; 4-LAYER PCB
LTM8021
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8021fc
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM8021E is guaranteed to meet performance specifi cations
from 0°C to 125°C internal. Specifi cations over the full –40°C to 125°C
internal operating temperature range are assured by design, characteriza-
The l denotes the specifi cations which apply over the full operating temp-
erature range, otherwise specifi cations are at TA = 25°C, VIN = 10V, VRUN/SS = 10V, VBIAS = 3V, RADJ = 31.6k.
tion and correlation with statistical process controls. The LTM8021I is
guaranteed to meet specifi cations over the full –40°C to 125°C internal
operating temperature range. Note that the maximum internal temperature
is determined by specifi c operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
Note 3: Guaranteed by design.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOUT(DC) DC Output Voltage VIN = 24V, 0 ≤ IOUT ≤ 500mA
RADJ = 31.6k, 0.1% 3.3 V
VOUT(AC_RMS) Output Voltage Ripple (RMS) VIN = 24V, IOUT = 250mA
COUT = 2.2μF, VBIAS = VOUT
1mV
fSW Switching Frequency IOUT = 500mA 0.9 1.1 1.3 MHz
IOSC Short-Circuit Output Current VIN = 36V, VBIAS = VOUT = 0V 900 mA
IISC Short-Circuit Input Current VIN = 36V, VBIAS = VOUT = 0V 25 mA
ADJ Voltage at ADJ Pin RADJ Open l0.79 0.80 0.83 V
VBIAS(MIN) Minimum BIAS Voltage for Proper
Operation
IOUT = 500mA 2.2 3 V
IADJ Current Out of ADJ Pin VOUT = 5V, VADJ = 0V, RUN/SS = 0V 50 μA
IRUN/SS RUN/SS Pin Current VRUN/SS = 2.5V, RADJ Open 23 μA
VIH(RUN/SS) RUN/SS Input High Voltage RADJ Open, IOUT = 500mA 1.6 V
VIL(RUN/SS) RUN/SS Input Low Voltage RADJ Open, IOUT = 500mA 0.5 V
RFB Internal Feedback Resistor RUN/SS = VBIAS = VADJ = 0V 100 kΩ
LTM8021
4
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TYPICAL PERFORMANCE CHARACTERISTICS
Effi ciency vs Load Current Effi ciency vs Load Current Effi ciency vs Load Current
Effi ciency vs Load Current IBIAS vs Load Current IBIAS vs Load Current
IBIAS vs Load Current IBIAS vs Load Current
TA = 25°C, unless otherwise noted
LOAD CURRENT (mA)
0
EFFICIENCY (%)
60
85
90
100 200 300
50
75
55
80
45
40
70
65
50 150 400 500
250 350 450
8021 G01
VIN = 36V
VIN = 24V
VIN = 12V
VIN = 5V
VOUT = 1.8V
LOAD CURRENT (mA)
0
EFFICIENCY (%)
60
85
90
100 200 300
50
75
55
80
70
65
50 150 400 500
250 350 450
8021 G02
VIN = 36V
VIN = 24V
VIN = 12V
VIN = 5V
VOUT = 2.5V
LOAD CURRENT (mA)
0
EFFICIENCY (%)
60
85
90
100 200 300
75
55
80
70
65
50 150 400 500
250 350 450
8021 G03
VIN = 36V
VIN = 24V
VIN = 12V
VIN = 5V
VOUT = 3.3V
LOAD CURRENT (mA)
0
EFFICIENCY (%)
60
85
90
100 200 300
75
80
70
65
50 150 400 500
250 350 450
8021 G04
VIN = 36V
VIN = 24V
VIN = 12V
VOUT = 5V
LOAD CURRENT (mA)
0
0
BIAS CURRENT (mA)
2
4
6
100 200 300 400 500
1
3
5
600
8021 G05
VIN = 24V
VIN = 12V
VIN = 5V
VIN = 3.4V
VOUT = 0.8V
LOAD CURRENT (mA)
0
0
BIAS CURRENT (mA)
2
4
6
100 200 300 400 500
8
1
3
5
7
9
600
8021 G06
VIN = 24V
VIN = 12V
VIN = 5V
VIN = 3.4V
VOUT = 1.8V
LOAD CURRENT (mA)
0
0
BIAS CURRENT (mA)
2
4
6
100 200 300 400 500
8
1
3
5
7
600
8021 G07
VIN = 24V
VIN = 12V
VIN = 5V
VOUT = 2.5V
LOAD CURRENT (mA)
0
0
BIAS CURRENT (mA)
2
4
6
100 200 300 400 500
8
10
1
3
5
7
9
600
8021 G08
VIN = 24V
VIN = 12V
VIN = 5V
VOUT = 3.3V
LTM8021
5
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TYPICAL PERFORMANCE CHARACTERISTICS
Input Current vs Output Current Input Current vs Output Current
Input Quiescent Current
vs Input Voltage
Minimum Input Running Voltage
vs Output Voltage
TA = 25°C, unless otherwise noted
Input Current vs Output Current
Output Short-Circuit Current
vs Input Voltage
OUTPUT CURRENT (mA)
0
INPUT CURRENT (mA)
100
350
400
100 200 300
0
250
50
300
200
150
50 150 400 500
250 350 450
8021 G09
VIN = 5V
VOUT = 1.8V
VOUT = 3.3V
VOUT = 2.5V
OUTPUT CURRENT (mA)
0
INPUT CURRENT (mA)
100
300
100 200 300
0
250
50
200
150
50 150 400 500
250 350 450
8021 G10
VIN = 12V
VOUT = 1.8V
VOUT = 5V
VOUT = 3.3V
VOUT = 2.5V
OUTPUT CURRENT (mA)
0
INPUT CURRENT (mA)
40
140
100 200 300
0
100
20
120
80
60
50 150 400 500
250 350 450
8021 G11
VIN = 24V
VOUT = 1.8V
VOUT = 5V
VOUT = 3.3V
VOUT = 2.5V
INPUT VOLTAGE (V)
0
INPUT QUIESCENT CURRENT (μA)
1000
3000
10 20 30
0
2500
500
2000
1500
515 40
25 35
8021 G12
VO = 3.3V
OUTPUT VOLTAGE (V)
0
0
INPUT VOLTAGE (V)
2
4
6
12345
1
3
5
7
6
8021 G13
IOUT = 500mA
INPUT VOLTAGE (V)
4
OUTPUT CURRENT (mA)
840
860
880
32
820
800
12 20
816 24 36
28
740
720
780
900
760
8021 G14
VOUT = 3.3V
Radiated Emissions
FREQUENCY (MHz)
0
EMISSIONS LEVEL (dBμV/m)
50
70
90
800
8021 G15
30
10
40
60
80
20
0
–10 200 400 600 1000
36VIN
5VOUT
FULL LOAD
CISPR22
CLASS B LIMIT
LTM8021
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PIN FUNCTIONS
VIN (Bank 1): The VIN pin supplies current to the LTM8021’s
internal regulator and to the internal power switch. This
pin must be locally bypassed with an external, low ESR
capacitor of at least 1μF.
VOUT (Bank 2): Power Output Pins. An external capacitor is
connected from VOUT to GND in most applications. Apply
output load between these pins and GND pins.
BIAS (Pin H3): The BIAS pin connects to the internal
boost Schottky diode and to the internal regulator. Tie to
VOUT when VOUT > 3V or to another DC voltage greater
than 3V otherwise. When BIAS > 3V the internal circuitry
will be powered from this pin to improve effi ciency. Main
regulator power will still come from VIN.
RUN/SS (Pin A1): Tie RUN/SS pin to ground to shut down
the LTM8021. Tie to 1.6V or more for normal operation.
If the shutdown feature is not used, tie this pin to the VIN
pin. The RUN/SS also provides soft-start and frequency
foldback. To use the soft-start function, connect a resis-
tor and capacitor to this pin. Do not allow the RUN/SS
pin to rise above VIN. See the Applications Information
section.
GND (Bank 3): The GND connections serve as the main
signal return and the primary heat sink for the LTM8021. Tie
the GND pins to a local ground plane below the LTM8021
and the circuit components. Return the feedback divider
to this signal.
ADJ (Pin A2): The LTM8021 regulates its ADJ pin to
0.8V. Connect the adjust resistor from this pin to ground.
The value of RADJ is given by the equation, RADJ = 80/
(VOUT – 0.8), where RADJ is in k.
VIN
8021 BD
BIAS
CURRENT MODE
CONTROLLER
VOUT
10μF15pF
10μH
0.1μF
RUN/SS
100k
1%
ADJGND
BLOCK DIAGRAM
LTM8021
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OPERATION
APPLICATIONS INFORMATION
For most applications, the design process is straight
forward, summarized as follows:
1. Refer to Table 1 for the row that has the desired input
range and output voltage.
2. Apply the recommended CIN, COUT and RADJ values.
3. Connect BIAS as indicated.
While these component combinations have been tested for
proper operation, it is incumbent upon the user to verify
proper operation over the intended system’s line, load and
environmental conditions.
If the desired output voltage is not listed in Table 1, set the
output by applying an RADJ resistor whose value is given
by the equation, RADJ = 80/(VOUT – 0.80), where RADJ is
in k and VOUT is in volts. Verify the LTM8021’s operation
over the system’s intended line, load and environmental
conditions.
Minimum Duty Cycle
The LTM8021 has a fi xed 1.1MHz switching frequency. For
any given output voltage, the duty cycle falls as the input
voltage rises. At very large VIN to VOUT ratios, the duty
cycle can be very small. Because the LTM8021’s internal
controller IC has a minimum on-time, the regulator will
skip cycles in order to maintain output voltage regulation.
This will result in a larger output voltage ripple and pos-
sible disturbances during recovery from a transient load
step. The component values provided in Table 1 allow for
skip cycle operation, but hold the resultant output ripple
to around 50mV, or less. If even less ripple is desired,
then more output capacitance may be necessary. Adding
a feedforward capacitor has been empirically shown to
modestly extend the input voltage range to where the
LTM8021 does not skip cycles. Apply the feedforward
capacitor between the VOUT pins and ADJ. This injects
perturbations into the control loop, therefore, values
larger than 50pF are not recommended. A good value to
start with is 12pF.
The LTM8021 is a standalone nonisolated step-down
switching DC/DC power supply. It can deliver up to
500mA of DC output current with only bulk external input
and output capacitors. This module provides a precisely
regulated output voltage programmable via one external
resistor from 0.8VDC to 5VDC. The input voltage range is 3V
to 36V. Given that the LTM8021 is a step-down converter,
make sure that the input voltage is high enough to support
the desired output voltage and load current. Please refer
to the simplifi ed Block Diagram.
The LTM8021 contains a current mode controller, power
switching element, power inductor, power Schottky diode
and a modest amount of input and output capacitance.
With its high performance current mode controller and
internal feedback loop compensation, the LTM8021 module
has suffi cient stability margin and good transient perfor-
mance under a wide range of operating conditions with a
wide range of output capacitors, even all ceramic ones (X5R
or X7R). Current mode control provides cycle-by-cycle fast
current limit, and automatic current limiting protects the
module in the event of a short circuit or overload fault.
The LTM8021 is based upon a 1.1MHz fi xed frequency
PWM current mode controller, equipped with cycle skip
capability for low voltage outputs or light loads. A fre-
quency foldback scheme helps to protect internal com-
ponents from overstress under heavy and short-circuit
output loads.
The drive circuit for the internal power switching element
is powered through the BIAS pin. Power this pin with at
least 3V.
LTM8021
8
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APPLICATIONS INFORMATION
Table 1. Recommended Component Values and Confi guration
VIN RANGE VOUT CIN COUT RADJ BIAS
3.4V to 36V 0.8V 4.7μF 100μF 1210 8.2M 3V to 7V
3.4V to 36V 1.2V 4.7μF 100μF 1210 200k 3V to 7V
3.4V to 36V 1.5V 4.7μF 100μF 1210 115k 3V to 7V
3.4V to 36V 1.8V 2.2μF 100μF 1210 78.7k 3V to 7V
3.5V to 36V 2V 2.2μF 100μF 1210 66.5k 3V to 7V
4V to 36V 2.2V 1μF 22μF 1206 57.6k 3V to 7V
4V to 36V 2.5V 1μF 10μF 0805 47.5k 3V to 7V
5V to 36V 3.3V 1μF 4.7μF 0805 32.4k VOUT
7V to 36V 5V 1μF 2.2μF 0805 19.1k VOUT
3.5V to 32V –3.3V 1μF 4.7μF 0805 32.4k GND
3.75V to 31V –5V 1μF 4.7μF 0805 19.1k GND
3.4V to 15V 0.8V 4.7μF 100μF 1210 8.2M 3V to 7V
3.4V to 15V 1.2V 4.7μF 100μF 1210 200k 3V to 7V
3.4V to 15V 1.5V 4.7μF 47μF 1206 115k 3V to 7V
3.4V to 15V 1.8V 2.2μF 47μF 1206 78.7k 3V to 7V
3.5V to 15V 2V 2.2μF 22μF 1206 66.5k 3V to 7V
4V to 15V 2.2V 1μF 22μF 1206 57.6k 3V to 7V
4V to 15V 2.5V 1μF 10μF 0805 47.5k 3V to 7V
5V to 15V 3.3V 1μF 2.2μF 0805 32.4k VOUT
7V to 15V 5V 1μF 1μF 0805 19.1k VOUT
9V to 24V 0.8V 1μF 100μF 1210 Open 3V to 7V
9V to 24V 1.2V 1μF 100μF 1210 200k 3V to 7V
9V to 24V 1.5V 1μF 47μF 1206 115k 3V to 7V
9V to 24V 1.8V 1μF 47μF 1206 78.7k 3V to 7V
9V to 24V 2V 1μF 22μF 1206 66.5k 3V to 7V
9V to 24V 2.2V 1μF 22μF 1206 57.6k 3V to 7V
9V to 24V 2.5V 1μF 10μF 0805 47.5k 3V to 7V
9V to 24V 3.3V 1μF 2.2μF 0805 32.4k VOUT
9V to 24V 5V 1μF 1μF 0805 19.1k VOUT
18V to 36V 0.8V 1uF 100μF 1210 Open 3V to 7V
18V to 36V 1.2V 1uF 100μF 1210 200k 3V to 7V
18V to 36V 1.5V 1uF 100μF 1210 115k 3V to 7V
18V to 36V 1.8V 1uF 100μF 1210 78.7k 3V to 7V
18V to 36V 2V 1uF 100μF 1210 66.5k 3V to 7V
18V to 36V 2.2V 1uF 22μF 1206 57.6k 3V to 7V
18V to 36V 2.5V 1uF 10μF 0805 47.5k 3V to 7V
18V to 36V 3.3V 1uF 4.7μF 0805 32.4k VOUT
18V to 36V 5V 1uF 2.2μF 0805 19.1k VOUT
LTM8021
9
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Capacitor Selection Considerations
The CIN and COUT capacitor values in Table 1 are the
minimum recommended values for the associated oper-
ating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response or
fault recovery, if it is necessary. Again, it is incumbent
upon the user to verify proper operation over the intended
system’s line, load and environmental conditions.
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable.
X5R and X7R types are stable over temperature and ap-
plied voltage and give dependable service. Other types,
including Y5V and Z5U have very large temperature and
voltage coeffi cients of capacitance. In an application cir-
cuit they may have only a small fraction of their nominal
capacitance resulting in much higher output voltage ripple
than expected.
Ceramic capacitors are also piezoelectric. At light loads,
the LTM8021 skips switching cycles in order to maintain
regulation. The resulting bursts of current can excite
a ceramic capacitor at audio frequencies, generating
audible noise.
If this audible noise is unacceptable, use a high performance
electrolytic capacitor at the output. This output capacitor
can be a parallel combination of a 1μF ceramic capacitor
and a low cost electrolytic capacitor.
A fi nal precaution regarding ceramic capacitors con-
cerns the maximum input voltage rating of the LTM8021.
A ceramic input capacitor combined with trace or cable
inductance forms a high Q (under damped) tank circuit.
If the LTM8021 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possi-
bly exceeding the device’s rating. This situation is easily
avoided; see the Hot-Plugging Safely section.
Minimum Input Voltage
The LTM8021 is a step-down converter, so a minimum
amount of headroom is required to keep the output in
regulation. For most applications at full load, the input
must be about 1.5V above the desired output. In addition,
it takes more input voltage to turn on than is required for
continuous operation. This is shown in Figure 1.
APPLICATIONS INFORMATION
Figure 1. The LTM8021 Requires More Voltage to Start Than to Run
LOAD CURRENT (A)
0.001
2.0
INPUT VOLTAGE (V)
3.0
4.0
5.0
0.01 0.1
6.0
2.5
3.5
4.5
5.5
1
8021 F01
VOUT = 3.3V
TO START
TO RUN
LOAD CURRENT (A)
0.001
2
INPUT VOLTAGE (V)
3
4
6
5
0.01 0.1
8
7
1
VOUT = 5V
RUN/SS
ENABLED
RUN/SS
ENABLED
TO START
TO RUN
LTM8021
10
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APPLICATIONS INFORMATION
Figure 2. To Soft-Start the LTM8021, Add a
Resisitor and Capacitor to the RUN/SS Pin
Soft-Start
The RUN/SS pin can be used to soft-start the LTM8021,
reducing the maximum input current during start-up.
The RUN/SS pin is driven through an external RC fi lter
to create a voltage ramp at this pin. Figure 2 shows the
soft-start circuit. By choosing a large RC time constant,
the peak start-up current can be reduced to the current
that is required to regulate the output, with no overshoot.
Choose the value of the resistor so that it can supply 80μA
when the RUN/SS pin reaches 2V.
Figure 3. The Input Diode Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output. It Also Protects
the Circuit from a Reversed Input. The LTM8021 Runs Only When
the Input is Present
VOUT
VIN
RUN/SS BIAS
GND
LTM8021
8021 F03
VOUT
RADJ COUT
RT
VIN
4V TO 36V
CIN
Shorted Input Protection
Care needs to be taken in systems where the output will
be held high when the input to the LTM8021 is absent.
This may occur in battery charging applications or in
battery backup systems where a battery or some other
supply is diode ORed with the LTM8021’s output. If the
VIN pin is allowed to fl oat and the RUN/SS pin is held high
(either by a logic signal or because it is tied to VIN), then
the LTM8021’s internal circuitry will pull its quiescent
current through its internal power switch. This is fi ne if
your system can tolerate a few milliamps in this state. If
the RUN/SS pin is grounded, the internal power switch
current will drop to essentially zero. However, if the VIN pin
is grounded while the output is held high, then parasitic
diodes inside the LTM8021 can pull large currents from
the output through the internal power switch and the VIN
pin. Figure 3 shows a circuit that will run only when the
input voltage is present and that protects against a shorted
or reversed input.
8021 F02
RUN/SS
GND
0.22μF
RUN
15k
LTM8021
11
8021fc
APPLICATIONS INFORMATION
CIN
VIN
COUT
FB
GND VOUT
RUN/SS
RADJ
BIAS
PLANE
8021 F04
Figure 4. Layout Showing Suggested External Components,
GND Plane and Thermal Vias
PCB Layout
Most of the problems associated with the PCB layout
have been alleviated or eliminated by the high level of
integration of the LTM8021. The LTM8021 is nevertheless
a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the
high level of integration, one may fail to achieve a specifi ed
operation with a haphazard or poor layout. See Figure 4
for a suggested layout.
Ensure that the grounding and heatsinking are acceptable.
A few rules to keep in mind are:
1. Place the CIN capacitor as close as possible to the VIN
and GND connection of the LTM8021.
2. Place the COUT capacitor as close as possible to the
VOUT and GND connection of the LTM8021.
3. Place the CIN and COUT capacitors such that their ground
currents fl ow directly adjacent to, or underneath the
LTM8021.
4. Connect all of the GND connections to as large a
copper pour or plane area as possible on the top layer.
Avoid breaking the ground connection between the
external components and the LTM8021.
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8021. However, these capacitors
can cause problems if the LTM8021 is plugged into a live
supply (see the Linear Technology Application Note 88 for
a complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an under damped tank circuit, and the volt-
age at the VIN pin of the LTM8021 can ring to twice the
nominal input voltage, possibly exceeding the LTM8021’s
rating and damaging the part. If the input supply is poorly
controlled or the user will be plugging the LTM8021 into
an energized supply, the input network should be designed
to prevent this overshoot. Figure 5 shows the waveforms
that result when an LTM8021 circuit is connected to a 24V
supply through six feet of 24-gauge twisted pair. The fi rst
plot is the response with a 2.2μF ceramic capacitor at the
input. The input voltage rings as high as 35V and the input
current peaks at 20A. One method of damping the tank
circuit is to add another capacitor with a series resistor to
the circuit. In Figure 5b an aluminum electrolytic capacitor
has been added. This capacitor’s high equivalent series
resistance damps the circuit and eliminates the voltage
overshoot. The extra capacitor improves low frequency
ripple fi ltering and can slightly improve the effi ciency of the
circuit, though it is likely to be the largest component in the
circuit. An alternative solution is shown in Figure 5c. A 0.7Ω
resistor is added in series with the input to eliminate the
voltage overshoot (it also reduces the peak input current).
A 0.1μF capacitor improves high frequency fi ltering. This
solution is smaller and less expensive than the electrolytic
capacitor. For high input voltages its impact on effi ciency
is minor, reducing effi ciency less than one-half percent for
a 5V output at full load operating from 24V.
LTM8021
12
8021fc
APPLICATIONS INFORMATION
High Temperature Considerations
The die temperature of the LTM8021 must be lower than
the maximum rating of 125°C, so care should be taken
in the layout of the circuit to ensure good heat sinking of
the LTM8021. To estimate the junction temperature, ap-
proximate the power dissipation within the LTM8021 by
applying the typical effi ciency stated in this data sheet to
the desired output power, or, if one has an actual module,
by taking a power measurement. Then, calculate the tem-
perature rise of the LTM8021 junction above the surface
of the printed circuit board by multiplying the module’s
power dissipation by the thermal resistance. The actual
thermal resistance of the LTM8021 to the printed circuit
board depends on the layout of the circuit board, but the
thermal resistance given in the Pin Confi guration, which
is based upon a 40.3cm2 4-layer FR4 PC board, can be
used a guide.
Finally, be aware that at high ambient temperatures the
internal Schottky diode will have signifi cant leakage current
(see the Typical Performance Characteristics) increasing
the quiescent current of the LTM8021.
+
LTM8021
4.7μF
VIN
CLOSING SWITCH
SIMULATES HOT PLUG
IIN
(5a)
(5b)
LOW
IMPEDANCE
ENERGIZED
24V SUPPLY
STRAY
INDUCTANCE
DUE TO 6 FEET
(2 METERS) OF
TWISTED PAIR
+
LTM8021
4.7μF0.1μF
0.7Ω
(5c)
+
LTM8021
4.7μF
22μF
AI.EI.
+
VIN
20V/DIV
IIN
10A/DIV
20μs/DIV
DANGER
RINGING VIN MAY EXCEED
ABSOLUTE MAXIMUM RATING
VIN
20V/DIV
IIN
10A/DIV
20μs/DIV
8021 F05
VIN
20V/DIV
IIN
10A/DIV
20μs/DIV
Figure 5. Ensures Reliable Operation When the LTM8021 is Connected to a Live Supply
LTM8021
13
8021fc
TYPICAL APPLICATIONS
0.8V Step-Down Converter
LTM8021
8021 TA02
VIN*
3.4V TO 36V
5V
VOUT
0.8V AT 500mA
1μF
100μF
RUN/SS
VIN
BIAS
VOUT
GND ADJ
*RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS.
1.8V Step-Down Converter
5V Step-Down Converter
LTM8021
8021 TA04
VIN*
7V TO 36V
VOUT
5V AT 500mA
1μF
*RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS.
2.2μF
19.1k
RUN/SS BIAS
GND ADJ
VIN VOUT
LTM8021
8021 TA03
VIN*
3.4V TO 36V
VOUT
1.8V AT 500mA
1μF
100μF
78.7k
RUN/SS
BIAS
GND ADJ
5V
VIN VOUT
*RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS.
–5V Positive-to-Negative Converter Load Current vs Input Voltage
LTM8021
8021 TA05
VIN*
3.75V TO 31V
1μF
–5V
4.7μF
OPTIONAL
SCHOTTKY
CLAMP
19.1k
RUN/SS BIAS
GND ADJ
VIN VOUT
*RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS.
VIN (V)
0
ILOAD (mA)
400
500
300
200
10 20
515 25
100
0
600
8021 TA05b
LTM8021
14
8021fc
PACKAGE DESCRIPTION
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
2. ALL DIMENSIONS ARE IN MILLIMETERS
LAND DESIGNATION PER JESD MO-222, SPP-010 AND SPP-020
5. PRIMARY DATUM -Z- IS SEATING PLANE
6. THE TOTAL NUMBER OF PADS: 35
4
3
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR A
MARKED FEATURE
2.72 – 2.92
DETAIL A
PACKAGE SIDE VIEW
6.250
BSC
PACKAGE TOP VIEW
11.250
BSC
4
PAD 1
CORNER
XY
aaa Z
aaa Z
DETAIL A
SUBSTRATE
MOLD
CAP
0.27 – 0.37
2.40 – 2.60
bbb Z
Z
LTMXXXXXX
MModule
COMPONENT
PIN “A1”
PADS
SEE NOTES
1.270
BSC
0.605 – 0.665
0.605 – 0.665
8.890
BSC
5.080
BSC
PAD 1
C (0.30)
HBADC
5
1
3
2
3
4
EF
PACKAGE BOTTOM VIEW
G
4.445
4.445
3.175
3.175
1.905
0.0000
1.905
0.635
0.635
1.270
1.270
0.9525
1.5875
0.635
0.9525
0.3175
2.540
2.540
SUGGESTED PCB LAYOUT
TOP VIEW
0.0000
LGA Package
35-Lead (11.25mm × 6.25mm × 2.82mm)
(Reference LTC DWG # 05-08-1805 Rev A)
LTM8021
15
8021fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
LTM8021 Pinout (Sorted by Pin Number)
PIN SIGNAL DESCRIPTION
A1 RUN/SS
A2 ADJ
A4 VIN
A5 VIN
B1 GND
B2 GND
B4 VIN
B5 VIN
C1 GND
C2 GND
D1 GND
D2 GND
D3 GND
D4 GND
D5 GND
E1 GND
E2 GND
E3 GND
E4 GND
E5 GND
F1 GND
F2 GND
F3 VOUT
F4 VOUT
F5 VOUT
G1 GND
G2 GND
G3 VOUT
G4 VOUT
G5 VOUT
H1 GND
H2 GND
H3 BIAS
H4 VOUT
H5 VOUT
LTM8021
16
8021fc
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2008
LT 0709 REV C • PRINTED IN USA
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PolyPhase is a trademark of Linear Technology Corporation
3.3V Step-Down Converter
TYPICAL APPLICATION
LTM8021
8021 TA06
VIN*
5.5V TO 36V
VOUT
3.3V AT 500mA
1μF 4.7μF
32.4k
RUN/SS BIAS
GND ADJ
VIN VOUT
*RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS.
