1
FEATURES
TPD4S009...DBV OR DCK PACKAGE
(TOP VIEW)
D1+ 16D1–
GND 25VCC
D2+ 34D2–
TPD4S009...DRY PACKAGE
(TOP VIEW)
16
25
D1+
GND
D2+ 34
D1–
VCC
D2–
TPD4S009...DGS PACKAGE
(TOP VIEW)
VCC
N.C.
N.C.
N.C.
N.C.
D1+
D1–
GND
D2+
D2–
1
3
2
5
4
10
8
9
6
7
TPD4S010...DQA PACKAGE
(TOP VIEW)
GND
N.C.
N.C.
N.C.
N.C.
D1+
D1–
GND
D2+
D2–
10
8
9
6
7
1
2
3
4
5
DESCRIPTION/ORDERING INFORMATION
TPD4S009
TPD4S010
www.ti.com
................................................................................................................................................................. SLVS817C – MAY 2008 – REVISED MAY 2009
4-CHANNEL ESD SOLUTION FOR HIGH-SPEED DIFFERENTIAL INTERFACE
2
•Supports High-Speed Differential Data Rates •IEC 61000-4-2 (Level 4) System-Level ESD(3-dB Bandwidth > 4 GHz) Compliance•Ultra-low Matching Capacitance Between •2.5-A Peak Pulse Current (8/20- µs Pulse)Differential Signal Pairs
•I
off
Feature for the TPD4S009•Low 0.8-pF Line Capacitance for Each Data
•Industrial Temperature Range:Line to GND
– 40 ° C to 85 ° C•Flow-Through Single-in-Line Pin Mapping for
•Space-Saving Package OptionsHigh-Speed Lines Ensures No AdditionalBoard Layout Burden While Placing ESDProtection Chip Near Connector
The TPD4S009 and TPD4S010 provide system level electrostatic discharge (ESD) solution for high-speeddifferential lines. These devices offer four ESD clamp circuits for dual pair differential lines. The TPD4S009 offersan optional V
CC
supply pin which can be connected to system supply plane. There is a blocking diode at the V
CCpin to enable the Ioff feature for the TPD4S009. The TPD4S009 can handle live signal at the D+, D- pins whenthe V
CC
pin is connected to zero volt. The V
CC
pin allows all the internal circuit nodes of the TPD4S009 to be atknown potential during start up time. However, connecting the optional V
CC
pin to board supply plane doesn ' taffect the system level ESD performance of the TPD4S009. The TPD4S010 does not offer the V
CC
pin.
The TPD4S009 is offered in DBV, DCK, DGS, and DRY packages. The TPDS4010 is offered in DQA package.The TPD4S009DRYR is the most space saving package option available for dual pair high-speed differentiallines. The TPD4S009DGSR and TPD4S010DQAR offer flow-through board layout option to reduce signalglitches due to mismatch between the D+ and D- signal pair routing.
The monolithic silicon technology allows matching between the differential signal pairs. The excellent matchingbetween the differential pair signal lines (0.05-pF line-line capacitance for the TPD4S009DRY) enables thisdevice to operate at high-speed differential data rates (3-dB bandwidth > 4 GHz). The TPD4S009 andTPD4S010 are suitable for high-speed differential applications, such as high-definition multimedia interface(HDMI), low-voltage differential signaling (LVDS), serial advanced technology attachment (SATA), Ethernet, 1394( FireWire
®
), etc.
TPD4S009/TPD4S010 comply with IEC 61000-4-2 (Level 4) ESD.
TPD4S009/TPD4S010 are characterized for operation over the ambient air temperature range of – 40 ° C to 85 ° C.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2FireWire is a registered trademark of Apple Inc.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008 – 2009, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
D1+
D1–
GND
VCC
D2+
D2–
D1+
D1–
GND
D2+
D2–
TPD4S009
TPD4S010
SLVS817C – MAY 2008 – REVISED MAY 2009 .................................................................................................................................................................
www.ti.com
ORDERING INFORMATION
ORDERABLE TOP-SIDET
A
PACKAGE
(1) (2)
NOMINAL DIMENSIONS (mm)
PART NUMBER MARKING
(3)
Reel ofMSOP – DGS W = 4.9, L = 3, H < 1.1, Pitch = 0.5 TPD4S009DGSR 3HR3000
Reel ofSON – DQA W = 1, L = 2.5, H < 1.1, Pitch = 0.5 TPD4S010DQAR 4UR3000
Reel of– 40 ° C to 85 ° C SON – DRY W = 1, L = 1.45, H = 0.55, Pitch = 0.5 TPD4S009DRYR 3H5000
Reel ofSOT (SC-70) – DCK W = 2.1, L = 2, H = 0.95, Pitch = 0.65 TPD4S009DCKR 3H_3000
Reel ofSOT (SOT-23) – DBV W = 2.9, L = 2.8, H < 1.45, Pitch = 0.95 TPD4S009DBVR NFJK3000
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com .(3) DCK: The actual top-side marking has one additional character that designates wafer fab/assembly site.
CIRCUIT DIAGRAMS
TPD4S009
TPD4S010
2Submit Documentation Feedback Copyright © 2008 – 2009, Texas Instruments Incorporated
Product Folder Link(s): TPD4S009 TPD4S010
TPD4S009
TPD4S010
www.ti.com
................................................................................................................................................................. SLVS817C – MAY 2008 – REVISED MAY 2009
TERMINAL FUNCTIONS
DBV, DCK,
DGS DQAOR DRY NAME I/O DESCRIPTIONPIN NO. PIN NO.PIN NO.
1, 3, 1, 2, 1, 2, D1+, D1 – , High-speed ESD clamp provides ESD protection to theESD port4, 6 4, 5 4, 5 D2+, D2 – high-speed differential data lines.2 3 3, 8 GND GND Ground– 6, 7, 9, 10 6, 7, 9, 10 N.C. – Not internally connected5 8 – V
CC
Power Supply
Copyright © 2008 – 2009, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TPD4S009 TPD4S010
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
TPD4S009
TPD4S010
SLVS817C – MAY 2008 – REVISED MAY 2009 .................................................................................................................................................................
www.ti.com
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range for TPD4S009 – 0.3 6 VV
IO
IO signal voltage range 0 V
CC
VT
stg
Storage temperature range – 65 125 ° CT
A
Characterized free-air operating temperature range – 40 85 ° CLead temperature, 1.6 mm (1/16 in) from case for 10 s) 260 ° CIEC 61000-4-2 Contact Discharge ± 8 kVIEC 61000-4-2 Air-Gap Discharge ± 9 kVPeak pulse power (t
p
= 8/20 µs) 25 WPeak pulse current (t
p
= 8/20 µs) 2.5 A
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
RWM
Reverse standoff voltage Any IO pin to ground 5.5 VV
BR
Breakdown voltage I
IO
= 1 mA Any IO pin to ground 9 VI
IO
IO port current V
IO
= 3.3 V, V
CC
= 5 V Any IO pin 0.01 0.1 µAI
off
Current from IO port to supply pins V
IO
= 3.3 V, V
CC
= 5 V Any IO pin 0.01 0.1 µAV
D
Diode forward voltage I
IO
= 8 mA Lower clamp diode 0.6 0.8 0.95 VR
DYN
Dynamic resistance I = 1 A Any IO pin 1.1 Ω
C
IO
IO capacitance V
CC
= 5 V, V
IO
= 2.5 V Any IO pin 0.8 pFI
CC
Operating supply current V
IO
= Open, V
CC
= 5 V V
CC
pin 0.1 1 µA
4Submit Documentation Feedback Copyright © 2008 – 2009, Texas Instruments Incorporated
Product Folder Link(s): TPD4S009 TPD4S010
TYPICAL CHARACTERISTICS
-10
-8
-6
-4
-2
0
2
1.E+05 1.E+06 1.E+07 1.E+08 1.E+09 1.E+10
Frequency (Hz)
Insertion Loss (dB)
100k 1M 10M 100M 1G 10G
D1+
D2+
0
10
20
30
40
50
60
70
–40 25 55 85
Temperature, T (°C)
A
Leakage Current (pA)
0.0
1.0
2.0
3.0
4.0
5.0
1 2 345
IO Voltage (V)
IO Capacitance (pF)
–20
0
20
40
60
80
100
120
140
160
180
200
220
0 25 50 75 100 125 150 175 200 225 250
Time (nS)
Amplitude (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0 5 10 15 20 25 30 35 40 45 50
Time ( s)µ
IPP (A)
0
5
10
15
20
25
30
PPP (W)
Power (W)
Current (A)
TPD4S009
TPD4S010
www.ti.com
................................................................................................................................................................. SLVS817C – MAY 2008 – REVISED MAY 2009
Figure 1. Insertion Loss S21 – I/O to GND Figure 2. Leakage Current vs Temperature (V
IO
= 2.5 V)
Figure 3. IO Capacitance vs Input Voltage (V
CC
= 5 V) Figure 4. IEC Clamping Waveforms(8-kV Contact, Average of Ten Waveforms)
Figure 5. Pulse Waveform (8/20 µs Pulse)
Copyright © 2008 – 2009, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TPD4S009 TPD4S010
TPD4S009
TPD4S010
SLVS817C – MAY 2008 – REVISED MAY 2009 .................................................................................................................................................................
www.ti.com
TYPICAL CHARACTERISTICS (continued)
Figure 6. Eye Diagram Without TPD4S009 Figure 7. Eye Diagram With TPD4S009
6Submit Documentation Feedback Copyright © 2008 – 2009, Texas Instruments Incorporated
Product Folder Link(s): TPD4S009 TPD4S010
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPD4S009DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPD4S009DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPD4S009DCKR ACTIVE SC70 DCK 6 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPD4S009DCKRG4 ACTIVE SC70 DCK 6 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPD4S009DGSR ACTIVE MSOP DGS 10 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPD4S009DRYR ACTIVE SON DRY 6 5000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPD4S010DQAR ACTIVE SON DQA 10 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 26-May-2009
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
TPD4S009DBVR SOT-23 DBV 6 3000 180.0 9.2 3.23 3.17 1.37 4.0 8.0 Q3
TPD4S009DCKR SC70 DCK 6 3000 180.0 8.4 2.55 2.34 1.22 4.0 8.0 Q3
TPD4S009DRYR SON DRY 6 5000 179.0 8.4 1.2 1.65 0.7 4.0 8.0 Q1
TPD4S010DQAR SON DQA 10 3000 180.0 8.4 1.3 2.83 0.65 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 21-May-2009
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPD4S009DBVR SOT-23 DBV 6 3000 205.0 200.0 33.0
TPD4S009DCKR SC70 DCK 6 3000 202.0 201.0 28.0
TPD4S009DRYR SON DRY 6 5000 220.0 205.0 50.0
TPD4S010DQAR SON DQA 10 3000 202.0 201.0 28.0
PACKAGE MATERIALS INFORMATION
www.ti.com 21-May-2009
Pack Materials-Page 2
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