[INTERSIL FEATURES e Ch. <2 pF @ Moderately High Forward Transconductance 1 _ ABSOLUTE MAXIMUM RATINGS @ 25C (unless otherwise noted) Maximum Temperatures Storage Ternperature -65C to +200C Operating Junction Temperature +200C Lead Temperature (Soldering, 10 sec time limit) +260C Maximum Power Dissipation Device Dissipation @ Free Air Temperature 300 mW - Linear Derating 1.7 mw/C Maximum Voltages & Current Ves Gate to Source Voltage -30 V Veo Gate to Drain Voltage -30V Gate Current 10 mA Ig ELECTRICAL CHARACTERISTICS (25C unless otherwise nated) 2N4220 -2N4222 N-Channel JFET PIN CONFIGURATION T0-72 CHIP TOPOGRAPHY 5010 or) DOI for? FULL R. PA ah au 015 LL NOTE: SUBSTRATE 1S GATE. Sit), N\ 0025, 0025 __fo | 9036 * 9035, 1 J 0048 0050 t- ORDERING INFORMATION 2N4221/D 2N4220 2N4221 2N4222 TEST CONDITIONS PARAMETER | MIN MAX | MIN MAX | MIN MAX UNIT N ON -0.1 -0.1 0.1 | nA . ~ IGss Gate Reverse Current 01 0.1 -0.1 uA Vos *=-15V, Vps =0 150C 8VGss Gate-Source Breakdown Voltage | -40 730 ~30 Vv ig = -10uA, Vps = 0 VGSloft) Gate-Source Cutoff Voltage -4 -6 -8 Vos = 15V, tp =0.1nA . -0.5 ~2.5 =1 ~5 -2 -6 Vv . = 18 V,Ip= V6s Gate-Source Voltage TCT Toy tao) Boar | oe) 1500) | Al Vos p=) pes paturavon Drain Current 05 3 2 6 5 15 mA Vos = 15 Vv, VGg=0 ts on tee tne 3) 1oco 4000 | 2000 5000 | 2500 6000 = 1 kHz ives commen Source Forward 750 750 750 umho f= 100 MHz : Common-Source Output - = 5 Sos Conductance (Note 3) 0 20 40 Vos * 15 V,Vgs=0 f= 1 kHe Common-Source Input Ciss Capacitance 6 6 8 E f= 1MHz c Common-Source Reverse 2 2 2 p rss Transfer Capacitance