TB3067 MCP2003 Power-Down Mode and Wake-Up Handling in the Case of LIN Bus Loss Author: Frank Ziegenhorn Microchip Technology Inc. INTRODUCTION This technical brief gives a description of how to set the MCP2003 in Power-Down mode in the case of a LIN bus loss, which means the voltage level on LBUS falls down to VIL. This situation could happen if the bus Master microcontroller disconnects the termination pull-up resistor (typically 1 k) from the bus to reduce the current consumption in the bus Power-Down state. Holding the MCP2003 in power down in the case of LIN bus loss is called "Forced Power-Down mode" in the further description of this document. THEORY OF OPERATION The MCP2003 is a bidirectional, half-duplex communication physical interface for automotive and industrial LIN systems to meet the LIN bus specification Revision 2.1 and SAE J2602. The MCP2003 provides a physical interface between a microcontroller and LIN bus. Additionally, this technical brief describes the wake-up procedure when the Master puts the LIN bus back into Operation mode. FIGURE 1: MCP2003 Block Diagram. This could be caused by the following events: The MCP2003 can be put in Power-Down mode from Operation mode or Transmitter-Off mode (TOFF Mode) on the falling edge on CS. * Loss/short to GND * Wake-up sequence * Sync break On bus activity, or when CS is set to `1', the device will immediately wake up from Power-Down mode and enter Ready mode. This behavior is necessary to react immediately on a LIN bus disconnection or LBUS short circuit to ground (e.g. cable break or wrong plug-in). Additionally, the device also wakes up on a LIN bus loss situation, which could be an undesired behavior in certain LIN bus systems. Bus activity means that LBUS voltage has dropped down to VIL for longer than the Bus Activity Debounce time (tBDB). (c) 2011 Microchip Technology Inc. DS93067A-page 1 TB3067 To prevent an undesired wake-up scenario in a LIN bus loss situation, the Power-Down mode has to be entered via the Transmitter-Off mode observing specific timings and the switching sequence outlined below ("Forced Power-Down mode"). The following state machine diagram shows the paths to enter the MCP2003 Power-Down mode from Operation mode or Transmitter-Off mode. POR VREN OFF RX OFF TX OFF To enter Power-Down mode from Ready mode, the MCP2003 has two different paths: * Passing through Transmitter-Off mode (TOFF), which is shown in red in Figure 2 * Passing through Operating mode, which is shown in blue in Figure 2 Ready Mode VREN ON RX ON TX OFF VBAT > 5.5V CS = 1 and TXD = 1 CS = 1 and TXD = 0* TOFF Mode VREN ON RX ON TX OFF Falling Edge on LIN or CS = 1 CS = 1 and TXD = 1 and No Fault Fault (Thermal or Timer) Operation Mode VREN ON RX ON TX ON CS = 0 CS = 0 Power-Down Mode VREN OFF RX OFF TX OFF Note: * TXD = 0 before raising CS to `1'. FIGURE 2: Entering MCP2003 Power-Down Mode From Operation Mode or Transmitter-Off Mode. The Forced Power-Down mode sequence is used to enter Power-Down mode without activating the transceiver to reduce the current consumption of the transceiver. After the device is in Ready mode, this path could be selected by holding TXD and CS in low state for tTX2CS, and then setting CS to `1' for tCSactive before resetting CS to `0'. This results in all functionality being disabled in the transceiver until CS goes high or a falling edge on LIN bus had been detected. DS93067A-page 2 (c) 2011 Microchip Technology Inc. TB3067 tT x2CS >= 100ns tCSactive >= 100s CS VREN TXD state depending on how the Slave Microcontroller is powered TXD to 0 forced externally TXD LIN bus disconnected LBUS State FIGURE 3: Power Down Mode after Master Sleep instruction Ready Mode Transmitter OFF Mode Power Down Mode Switching Timing Diagram for the Forced Power-Down Mode Sequence. (c) 2011 Microchip Technology Inc. DS93067A-page 3 TB3067 /* design specific */ #define TXPINLATCbits.LATC6 #define CSPINLATCbits.LATC0 /* please refer to data sheet regarding maximum values */ #define WaitTimeTx2CS() #define WaitTimeCSactive() Nop(); Nop();Nop(); Nop(); unsigned char dly; dly = 55; while(--dly); /**********************************************************************/ /**********************************************************************/ void ForcedSleepMCP200x(void) { /* set LATregister of corresponding IOpin for TX -> 0 */ TXPIN = 0; /* /* /* /* depending if TXEN in TXSTA register allows the use of the corresponding IOpin for TX as a normal IO when TXEN = 0 then set TXPIN = 0 otherwise reset the whole UART module. Please refer to controller specific data sheet and review the UART section #if defined (TXEN_FREE_IO) TXEN = 0; #else RCSTA = 0; #endif WaitTimeTx2CS(); CSPIN = 1; WaitTimeCSactive(); CSPIN = 0; } */ */ */ /* TX also usable as IO */ /* /* /* /* */ activated but TX = 0 */ in SLEEP mode */ refer to data sheet CS = 1 -> transceiver refer to data sheet CS = 0 -> transceiver */ /**********************************************************************/ /**********************************************************************/ FIGURE 4: DS93067A-page 4 PIC(R) Microcontroller Code Example for Forced Power-Down Mode. (c) 2011 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." 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Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2011, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-60932-840-5 Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. (c) 2011 Microchip Technology Inc. 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