![](data:image/jpeg;base64,/9j/4AAQSkZJRgABAQEARgBGAAD/2wBDAAgGBgcGBQgHBwcJCQgKDBQNDAsLDBkSEw8UHRofHh0aHBwgJC4nICIsIxwcKDcpLDAxNDQ0Hyc5PTgyPC4zNDL/2wBDAQkJCQwLDBgNDRgyIRwhMjIyMjIyMjIyMjIyMjIyMjIyMjIyMjIyMjIyMjIyMjIyMjIyMjIyMjIyMjIyMjIyMjL/wAARCAMDAlQDASIAAhEBAxEB/8QAHwAAAQUBAQEBAQEAAAAAAAAAAAECAwQFBgcICQoL/8QAtRAAAgEDAwIEAwUFBAQAAAF9AQIDAAQRBRIhMUEGE1FhByJxFDKBkaEII0KxwRVS0fAkM2JyggkKFhcYGRolJicoKSo0NTY3ODk6Q0RFRkdISUpTVFVWV1hZWmNkZWZnaGlqc3R1dnd4eXqDhIWGh4iJipKTlJWWl5iZmqKjpKWmp6ipqrKztLW2t7i5usLDxMXGx8jJytLT1NXW19jZ2uHi4+Tl5ufo6erx8vP09fb3+Pn6/8QAHwEAAwEBAQEBAQEBAQAAAAAAAAECAwQFBgcICQoL/8QAtREAAgECBAQDBAcFBAQAAQJ3AAECAxEEBSExBhJBUQdhcRMiMoEIFEKRobHBCSMzUvAVYnLRChYkNOEl8RcYGRomJygpKjU2Nzg5OkNERUZHSElKU1RVVldYWVpjZGVmZ2hpanN0dXZ3eHl6goOEhYaHiImKkpOUlZaXmJmaoqOkpaanqKmqsrO0tba3uLm6wsPExcbHyMnK0tPU1dbX2Nna4uPk5ebn6Onq8vP09fb3+Pn6/9oADAMBAAIRAxEAPwD3+iiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKKKACiiigAooooAKKK4P4la7qul21jb6M6GWaQi4XeFYJjg56rz3rOrUVODk+nyNKVN1JqC6/M6zUdb07SlJvLpEbsgOWP4Dmsqw8caPezNE7vbHOFMwwGH1HA/GuM8NafoupTKdUv3W4Y/6k/KGP+/3/Q1xXji+vdI+JGo6dpdsJLVBDttwpIXMSEkHqOTn8a8unisXXj7WnyqK6Xv976Hq1MLhKEvZVOZyfW1vuXU+jFZXUMjBlIyCDkGlrxTw/wCI9X0xEaINEW+9au29c/h/TFesaNqF3qFr5l5p0tm/YOww30HUfiK6cJmEMQ+W1pL5r71oc2My+eGSne8X8n9z1NOivIfiV4+1zRfG1h4fs9StdBsZrfzm1S6t/ODH5vlAwRjgDp1PWsP/AITLWP8Aosei/wDgqX/4mu88896oryjRvFer2HhjX/EE/jHTPFEVlaF47e2t1hMcnYvtAOD/AI1B4aX4n+LfD1pr0XjHT7GK8UyJbrpyPsGSMZIz296APXqK8L8E6r8TPGrasIfGNra/2dc/Z236dE2888jC8dK0dH8e+LdH8Za/4U1s2+t3VhYPd28tvD5TSuI1kCYHHIbHTOfWgD2OivnfSfiR4g1uwW/uviTo+iyyM2bBtNDmIAkDkqc5HPU9a0oPFmt3EyRR/GTQt7nA3aaij8yoAoA92orybxX4v8VL470PwLod7Z215dWizT6lLCH3MFcnanQD5CencdMVo/8ACNfFP/ofrH/wVR/4UAekUVw2neGfGUsN7beIvFkN9bzw7YxBZJE0b7gd2RjPAIx711+nWhsNPgtTK0piQLvPf9Tx6cnigC1RRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFfLfiHW9Z0TxhqsN3FKY2u5XSO4UglC5wVJ5xjp1FfUlZ+r6HpevWhtdUsYbuHsJFyV9weoPuKzq0oVY8tRXRpSrTpS5qbszifCHhGz1jRLHWLySRkuohKsC/KFz2J6n8MVwniuW4sPjD/ZUcfl2F3PawgFf4WSNSVPfHPryK9407T7XStPgsLKLyraBAkabi21R2ySSfxou9Ps7/yvtdrDP5TiSPzEDbGByGGeh461hDA4eEHBQVmbzx+JnNTc3dFTTPD2maSAbW1USD/lq/zP+Z6fhWpRRXRCnGmuWCsjnnUnUfNN3Zwvjix8W6lfRQaRofhjU9MWIMRrEbOyy5OcDOMY2/rXJ/8ACKeNv+hE+G//AIBmvZqKsg8NsfhD4hMfifUbo6TZXuq2TWsGnaaGjt0JK8nI4Hy9Bnkk+1en+A9Eu/DngfStIvvL+1WsRSTy23LncTwfxro6KAPPvhf4N1Xwi/iA6n5H+n3vnw+U+75eevAweawdZ8GeNrT4uah4x8Ow6TMk8SRRpeysOPKRWyFx3U969fooA8duPDnj26nee48FfDuaZzlpJLVmZj6kk81m6t8O/Gev6dJpkvhjwHpiTFd13Z2zJLGAQcqRn0x+Ne6UUAeQ6p8Ltf0zWfDmv+GNRtbrUtHsks2j1EMElCqy7gV55DkYzxgc1q/bPjH/ANAzwl/38m/+Kr0migDlPC0/juW+mHiq00SG0EWYjp7SFy+R13EjGM11dFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAFFFFABRRRQAUUUUAfM/hz4r+Nr/WtSt7nWt8UKgxr9lhGP9IiTsn91mH41VX4ueOT4J/tE65/pX2ySLzPskH3QsRAxsx/G350UU4fCvT/ADJp646vB7LZdtGdO3xG8Vj4jWekjVf9BkszK8X2eLlvLZs5256gd65pPi344PgCXUzrf+mLqQgEn2SD7nl5xjZjr3xmiip/l9H+cgw3vJX/AJIv58pv6j8SfFsHxHm0mLVttirTARfZoj92R1HO3PQDvXKN8YvHo8PpdDXv3xmZS32ODoMdtmO9FFTlb56F56vkvr3vuekoR9i3bv8AlD/N/edfc/EfxZH8VF0VdVxp5mlXyfs8XRXkA+bbnoo79q5BvjF48Hh9boa7++MzLu+yQdBjtsx3oorXLvfwsZS1fJf53ephCKvPT7K/Q67RviR4tu/EN1az6tvhj0t7hV+zxDEglCg5C56dulcknxh8eHw1NdnXf363QjD/AGSD7u3OMbMUUUUNcPBvfU58RpiasVspL8kd7b+P/E7/ABG1XSm1PNlBa3MkcXkR/KySlVOduTgADrXBN8YfHg8Pi6Gu/vvNZd32SDoMdtmO5oormyhupSk56+6t/kRh9cViIvZRjby06Hd638QPE9n48vtNg1PZZxWUEqR+REcM00Sk5K56Mw6964+H4t+OH8E3moNrebqO8ESyfZIOFwvGNmO5ooronpL7/wA2XgPer1lLVKKt5e4jRX4o+Mj4z0rTzrH+izopkT7LD8xJYddmR0FZSfF3x0fB1xfnXP8ASkvhEr/ZIOE25xjZjrRRVVlbEzittf8A0qReFSlTu/5Iv52R2emfEHxRcePLzTZdT3WcdjLKsf2eIYZZdoOduenvXH/8Lc8c/wDCGSX/APbn+lC7EYf7JB93HTGzFFFYYdt1qyeySt5e8Y5h7mNqxjolNK3lynQ6h8SfFsHxNOkR6ttsPMlXyvs0R4WRwOdueijv2rlW+MPjweH/ALUNd/feay7vskHQFe2zHc0UV0YBKWEhKWr5L/Pm3OmCTnUXaMTeHxQ8Y/8ACdw6b/bH+iNbs5j+zQ8sIWbOdmeoB61nJ8WfG58A3OpnW/8ATE1EQLJ9lh4TZnGNmOvfGaKKquktv5n+hNlzz+f6nenxt4i/4WpPov8AaH/EvWxSYQ+THw5dATu256E964NPiz43PgG61M63/pkeoiBZPssPCbM4xsx174zRRXPP+I15v82Kkk6bb7/+2Qf5ts70+NvEX/C1J9F/tD/iXrYpMIfJj4cugJ3bc9Ce9ckPih4x/wCFS3Guf2x/xMU1gWyzfZoeI9hO3bsx174zRRVT3l/X2kZx+BPz/wDccX+evqdYPG/iL/haU2jf2h/xL1sI5hD5Mf3y6AnO3PQnvXCp8WPGx8AXmpnWv9Mj1EQLJ9lh4TaDjGzHXvjNFFKppUaXf9TWkk6Um+6/9Ig/zbOx0/x54ln+If8AZUmpbrL+z0m8ryIx85kUE5256E9645Pix42PgK91M61/pkeoiBJPssPCbQcY2Y/Siis7u5lhPew3M99P/SIP822dPq/xC8UWvxXtNFh1Tbp0kKs0P2eI5JUk/MVz29ayB8T/ABj/AMKlu9b/ALY/4mMeri2Wb7NDxHszt27Mde+M0UV1YhJbf179vyCXT/t3/wBJZv6X498TXHj9dMl1LdZnTY5/L8iMfOXQE5256E8ZxWAPif4x/wCFTXmt/wBsf8TGPVxbLN9mh4j2Z27dmOvfGaKKwez+X/pSM6Lbw8W97r/03F/nr6nWP428Qj4rT6KNQ/4ly2KSiHyY+HLqCd23PQnvXKj4neMP+FSXmuf2v/xMY9XFss32aHiPbnbt2Y698Zoop1NJS+X/AKUjSP8ACv8A3l/6bi/z19TV1f4g+KLX4rWeiw6pt06SFWaH7PEckqSfmK57etZI+J3jD/hU17rf9r/8TGLVhbJN9mh4j2527dmPxxmiitsSktu3/t9vyFLZf9u/+ks39N8eeJbj4grpcupbrM6dHP5fkRj5zIoJztz0J4ziuRj+K3jVvAmpakda/wBLhv1hjk+yw8JgcY2Y7+lFFc0m7oeG1wvM97x/9Ig/zdzrtN8eeJbj4grpcupbrM6bHP5fkRj5zIoJztz0J4zisIfE3xgfhNf63/a//Exi1YWyTfZoeI9udu3Zj8cZooqpbP5f+lIzotvDRk97x/8ATcX+evqb2qePPEtt8Tzo8WpbbDyrZvK8iM8vcRI3O3PKsw6964k/Fvxx/wAIzd3n9t/v45mVX+yQcAOg6bMdCaKK9CjCLhWutk7f+BQ/zf3jpO9791/6bv8Anr6nS2fxF8Vy+P8AQ9MfVc2dzpK3M0f2eL5pDbO+7O3I+YA4BxWKvxU8aHwDf6n/AGz/AKZFqBhST7LDwmI+MbMfxHt3oorhqaVZL+tzSW6+X/pMjct/iJ4qk+Iei6W2q5srnShcSxfZ4vmk+zO+c7cj5gDgHFYS/FXxofAeo6kdZ/0yG/MMcn2WHhPk4xsx/Ee1FFKelRryX5ky3j/27/6RJnT2fj/xPL41bT31PNqNF+1eX5EX+t4+bO3P4dK5A/Frxv8A8Ize3f8Abf7+KVlR/skPADoOmzHQmiinl3vwrOWtoRfzvD/NlYjTMcRBbJxsui92e33HT2vxD8UyfEDSNLfVM2dxpC3Msf2eL5pPs7PuztyPmAOAcVhL8VPGh8B6nqR1n/TIb8wxyfZYflT93xjZj+I9u9FFa4hJSjb+X/25kS3X/bv/AKRJ/mdNZePvE8vjRtPfU82o0X7V5fkR/wCt4+bO3P4dKwP+FoeMf+FbX+rf2x/p0WpyW6S/ZoeIwIcDGzH8bc4zzRRXn0pSdrvpH8ka1lbH4qC2TjZdFpLbsb1n4+8Ty+NG099TzajRftXl+RH/AK3j5s7c/h0rB/4Wh4x/4Vtf6t/bH+nRanJAkv2aHiMeTgY2Y/jbnGeaKKVKUm1d9I/kgrK2PxUFsnGy6LSW3Y6iXxz4jX4i3GlDUcWSaP8AaVi8iPiTj5s7c/hnFcQfix42/wCEa1G7/tv9/DKyo/2WHgCRB02Y6Mfzoorvwi5vbX1tBNeWsP8ANnn4ScpTkm+lP8YSb+96s6ZfiH4pPxM0zSDqn+gTWDzSRfZ4uXEMjA5256qD17Vhp8UvGZ8B6tqR1n/TLe/MMUn2WH5UzHxjZg/ePUd6KK5abbjH/DH9D1cfFRxElFWXMv8A0mf+SN6b4g+KE8dNpq6pi0GjyXPl/Z4v9YI2IbO3PUDjOK5m5+K/jaPwY+oLrWLoarNbh/ssP+rVEIGNmOrHnrRRSwcnKtFS192P5M0x0Yxc+VW9+3y5dis/xd8cjwe9+Nc/0kX3kh/skH3NpOMbMVueFfib4v1Lwrf3t3q/mXERIR/s0Qx93sEx3NFFehOK/e6bRh+Ps7/fd/ezz4N+0iv7z/NnKzfGTx8tjHIuvYcwK5P2ODqXYf3PQCrXij4v+OtO1k29prnlxeTG237JAeSoJ6p60UVjL4p/4v8AM7HFexvbW8fykdfrvxE8VWcHhxrfVNhvLzyp/wDR4jvX91xyvH3m6etYHhb4reNdS1m6t7vWvMiTTZJ1X7LCMOIwQeE9e3SiiuWrJpTs+/8A6UZYlWq2X80v/Tlvy09CDwZ8WfG+rapdw3ut+bHHYzTKPssK4dVyDwgrS8W/E/xjpi3xs9Y8ryrsxp/o0LYXc4xyh/uj8qKK7MIlKdVPWyX/AKUjGD1l8/8A205E/Gn4g7Jz/wAJByrAD/Q7fjn/AHKdB8aPiC9rcu2v5ZFUqfscHGWA/uUUVrGKtDT7L/8Abjpilztev5MsTfGTx8mmwSrr2Ha33sfscHJ811z9z0AFWfFHxf8AHWnaybe01zy4vJjbb9kgPJUE9U9aKK46bvF37/5mtWMVSul/L/6Sz0q18a+IZLaJ31DLMiknyY+uB/s0UUV6ypwtsfR4bDUXBtwW8ui/mZ//2Q==)
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
Revision 1.5 (07-08-11) 8 SMSC LAN9303M/LAN9303Mi
DATASHEET
13.3.2.11 Port x PHY Interrupt Source Flags Register (PHY_INTERRUPT_SOURCE_x)........................................................................................... 225
13.3.2.12 Port x PHY Interrupt Mask Register (PHY_INTERRUPT_MASK_x) ............................................................................................................ 226
13.3.2.13 Port x PHY Special Control/Status Register (PHY_SPECIAL_CONTROL_STATUS_x).............................................................................. 227
13.4 Switch Fabric Control and Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
13.4.1 General Switch CSRs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
13.4.1.1 Switch Device ID Register (SW_DEV_ID) .................................................................................................................................................... 239
13.4.1.2 Switch Reset Register (SW_RESET) ........................................................................................................................................................... 240
13.4.1.3 Switch Global Interrupt Mask Register (SW_IMR)........................................................................................................................................ 241
13.4.1.4 Switch Global Interrupt Pending Register (SW_IPR).................................................................................................................................... 242
13.4.2 Switch Port 0, Port 1, and Port 2 CSRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243
13.4.2.1 Port x MAC Version ID Register (MAC_VER_ID_x) ..................................................................................................................................... 243
13.4.2.2 Port x MAC Receive Configuration Register (MAC_RX_CFG_x) ................................................................................................................. 244
13.4.2.3 Port x MAC Receive Undersize Count Register (MAC_RX_UNDSZE_CNT_x)........................................................................................... 245
13.4.2.4 Port x MAC Receive 64 Byte Count Register (MAC_RX_64_CNT_x).......................................................................................................... 246
13.4.2.5 Port x MAC Receive 65 to 127 Byte Count Register (MAC_RX_65_TO_127_CNT_x)................................................................................ 247
13.4.2.6 Port x MAC Receive 128 to 255 Byte Count Register (MAC_RX_128_TO_255_CNT_x)............................................................................ 248
13.4.2.7 Port x MAC Receive 256 to 511 Byte Count Register (MAC_RX_256_TO_511_CNT_x)............................................................................ 249
13.4.2.8 Port x MAC Receive 512 to 1023 Byte Count Register (MAC_RX_512_TO_1023_CNT_x)........................................................................ 250
13.4.2.9 Port x MAC Receive 1024 to Max Byte Count Register (MAC_RX_1024_TO_MAX_CNT_x) ..................................................................... 251
13.4.2.10 Port x MAC Receive Oversize Count Register (MAC_RX_OVRSZE_CNT_x)............................................................................................. 252
13.4.2.11 Port x MAC Receive OK Count Register (MAC_RX_PKTOK_CNT_x)......................................................................................................... 253
13.4.2.12 Port x MAC Receive CRC Error Count Register (MAC_RX_CRCERR_CNT_x).......................................................................................... 254
13.4.2.13 Port x MAC Receive Multicast Count Register (MAC_RX_MULCST_CNT_x) ............................................................................................. 255
13.4.2.14 Port x MAC Receive Broadcast Count Register (MAC_RX_BRDCST_CNT_x) ........................................................................................... 256
13.4.2.15 Port x MAC Receive Pause Frame Count Register (MAC_RX_PAUSE_CNT_x) ........................................................................................ 257
13.4.2.16 Port x MAC Receive Fragment Error Count Register (MAC_RX_FRAG_CNT_x)........................................................................................ 258
13.4.2.17 Port x MAC Receive Jabber Error Count Register (MAC_RX_JABB_CNT_x) ............................................................................................. 259
13.4.2.18 Port x MAC Receive Alignment Error Count Register (MAC_RX_ALIGN_CNT_x) ...................................................................................... 260
13.4.2.19 Port x MAC Receive Packet Length Count Register (MAC_RX_PKTLEN_CNT_x) ..................................................................................... 261
13.4.2.20 Port x MAC Receive Good Packet Length Count Register (MAC_RX_GOODPKTLEN_CNT_x) ................................................................ 262
13.4.2.21 Port x MAC Receive Symbol Error Count Register (MAC_RX_SYMBOL_CNT_x) ...................................................................................... 263
13.4.2.22 Port x MAC Receive Control Frame Count Register (MAC_RX_CTLFRM_CNT_x) .................................................................................... 264
13.4.2.23 Port x MAC Transmit Configuration Register (MAC_TX_CFG_x) ................................................................................................................ 265
13.4.2.24 Port x MAC Transmit Flow Control Settings Register (MAC_TX_FC_SETTINGS_x) .................................................................................. 266
13.4.2.25 Port x MAC Transmit Deferred Count Register (MAC_TX_DEFER_CNT_x) ............................................................................................... 267
13.4.2.26 Port x MAC Transmit Pause Count Register (MAC_TX_PAUSE_CNT_x) ................................................................................................... 268
13.4.2.27 Port x MAC Transmit OK Count Register (MAC_TX_PKTOK_CNT_x) ........................................................................................................ 269
13.4.2.28 Port x MAC Transmit 64 Byte Count Register (MAC_TX_64_CNT_x) ......................................................................................................... 270
13.4.2.29 Port x MAC Transmit 65 to 127 Byte Count Register (MAC_TX_65_TO_127_CNT_x) ............................................................................... 271
13.4.2.30 Port x MAC Transmit 128 to 255 Byte Count Register (MAC_TX_128_TO_255_CNT_x) ........................................................................... 272
13.4.2.31 Port x MAC Transmit 256 to 511 Byte Count Register (MAC_TX_256_TO_511_CNT_x) ........................................................................... 273
13.4.2.32 Port x MAC Transmit 512 to 1023 Byte Count Register (MAC_TX_512_TO_1023_CNT_x) ....................................................................... 274
13.4.2.33 Port x MAC Transmit 1024 to Max Byte Count Register (MAC_TX_1024_TO_MAX_CNT_x)..................................................................... 275
13.4.2.34 Port x MAC Transmit Undersize Count Register (MAC_TX_UNDSZE_CNT_x) .......................................................................................... 276
13.4.2.35 Port x MAC Transmit Packet Length Count Register (MAC_TX_PKTLEN_CNT_x) .................................................................................... 277
13.4.2.36 Port x MAC Transmit Broadcast Count Register (MAC_TX_BRDCST_CNT_x) .......................................................................................... 278
13.4.2.37 Port x MAC Transmit Multicast Count Register (MAC_TX_MULCST_CNT_x) ............................................................................................ 279
13.4.2.38 Port x MAC Transmit Late Collision Count Register (MAC_TX_LATECOL_CNT_x) ................................................................................... 280
13.4.2.39 Port x MAC Transmit Excessive Collision Count Register (MAC_TX_EXCCOL_CNT_x)............................................................................ 281
13.4.2.40 Port x MAC Transmit Single Collision Count Register (MAC_TX_SNGLECOL_CNT_x) ............................................................................. 282
13.4.2.41 Port x MAC Transmit Multiple Collision Count Register (MAC_TX_MULTICOL_CNT_x) ............................................................................ 283
13.4.2.42 Port x MAC Transmit Total Collision Count Register (MAC_TX_TOTALCOL_CNT_x)................................................................................ 284
13.4.2.43 Port x MAC Interrupt Mask Register (MAC_IMR_x) ..................................................................................................................................... 285
13.4.2.44 Port x MAC Interrupt Pending Register (MAC_IPR_x) ................................................................................................................................. 286
13.4.3 Switch Engine CSRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 287
13.4.3.1 Switch Engine ALR Command Register (SWE_ALR_CMD) ........................................................................................................................ 287
13.4.3.2 Switch Engine ALR Write Data 0 Register (SWE_ALR_WR_DAT_0) .......................................................................................................... 288
13.4.3.3 Switch Engine ALR Write Data 1 Register (SWE_ALR_WR_DAT_1) .......................................................................................................... 289
13.4.3.4 Switch Engine ALR Read Data 0 Register (SWE_ALR_RD_DAT_0)........................................................................................................... 291
13.4.3.5 Switch Engine ALR Read Data 1 Register (SWE_ALR_RD_DAT_1)........................................................................................................... 292
13.4.3.6 Switch Engine ALR Command Status Register (SWE_ALR_CMD_STS) .................................................................................................... 294
13.4.3.7 Switch Engine ALR Configuration Register (SWE_ALR_CFG) .................................................................................................................... 295
13.4.3.8 Switch Engine VLAN Command Register (SWE_VLAN_CMD).................................................................................................................... 296
13.4.3.9 Switch Engine VLAN Write Data Register (SWE_VLAN_WR_DATA).......................................................................................................... 297
13.4.3.10 Switch Engine VLAN Read Data Register (SWE_VLAN_RD_DATA) .......................................................................................................... 299
13.4.3.11 Switch Engine VLAN Command Status Register (SWE_VLAN_CMD_STS) ............................................................................................... 301
13.4.3.12 Switch Engine DIFFSERV Table Command Register (SWE_DIFFSERV_TBL_CFG)................................................................................. 302
13.4.3.13 Switch Engine DIFFSERV Table Write Data Register (SWE_DIFFSERV_TBL_WR_DATA) ...................................................................... 303
13.4.3.14 Switch Engine DIFFSERV Table Read Data Register (SWE_DIFFSERV_TBL_RD_DATA) ....................................................................... 304
13.4.3.15 Switch Engine DIFFSERV Table Command Status Register (SWE_DIFFSERV_TBL_CMD_STS) ............................................................ 305
13.4.3.16 Switch Engine Global Ingress Configuration Register (SWE_GLOBAL_INGRSS_CFG)............................................................................. 306
13.4.3.17 Switch Engine Port Ingress Configuration Register (SWE_PORT_INGRSS_CFG) ..................................................................................... 308
13.4.3.18 Switch Engine Admit Only VLAN Register (SWE_ADMT_ONLY_VLAN)..................................................................................................... 309
13.4.3.19 Switch Engine Port State Register (SWE_PORT_STATE)........................................................................................................................... 310
13.4.3.20 Switch Engine Priority to Queue Register (SWE_PRI_TO_QUE) ................................................................................................................ 311
13.4.3.21 Switch Engine Port Mirroring Register (SWE_PORT_MIRROR).................................................................................................................. 312
13.4.3.22 Switch Engine Ingress Port Type Register (SWE_INGRSS_PORT_TYP) ................................................................................................... 313
13.4.3.23 Switch Engine Broadcast Throttling Register (SWE_BCST_THROT) .......................................................................................................... 314
13.4.3.24 Switch Engine Admit Non Member Register (SWE_ADMT_N_MEMBER)................................................................................................... 315