OKI Semiconductor MSC23236C/CL-xxBS20/DS20 2,097,152-Word = 36-Bit DRAM MODULE : FAST PAGE MODE TYPE DESCRIPTION The OKI MSC23236C/CL-xxBS20/DS20 is a fully decoded 2,097,152-word x 36-bit CMOS Dynamic Random Access Memory Module composed of sixteen 4-Mb DRAMs (1M x 4) in SOJ packages and four 2-Mb DRAMs in SOJ (1M x 2) packages mounted with twenty decoupling capacitors on a 72-pin glass epoxy single-inline package. This module is generally used for memory expansion in parity applications such as workstations. The low-power version (CL) offers reduced power consumption for mobile computing applications like laptops and palmtops. FEATURES 2-Meg x 36-bit organization * 72-Pin Socket Insertable Module MSC23236C /CL-xxBS20 : Gold tab MSC23236C /CL-xxDS20: Solder tab * Single 5 V supply +10% tolerance * Access times : 60, 70, 80 ns Input : TTL compatible * Output : TTL compatible, 3-state * Refresh : 1024 cycles/16 ms (128 ms : L-version) * CAS before RAS refresh, CAS before RAS hidden refresh, RAS-only refresh capability * Multi-bit test mode capability * Fast Page Mode capability PRODUCT FAMILY Family Access Time (Max.)} Cycle Time Power Dissipation trac taa teac (Min,} Operating (Max.)| Standby (Max.) MSC23236C/CL-60BS20/DS20 | GOns | 30 ns | 15ns 110s 5555 mW 110 mw/ MSC23236C/CL-70BS20/0820 | 7Ons | 35ns | 20ns 136 ns . 005 mw 19,8 mW (L-version) MSG23236C/CL-80BS20/DS20 | 80ns | 40ns | 20ns 150 ns 4455 mW 169MSC23236C/CL-xxBS20/DS20 OKI Semiconductor PIN CONFIGURATION MSC23236C/CL-xxBS20/DS20 4 107.95 20.2 9.3 Max. $.38 20.2 101.19 Typ. J oO tM tJ jm] ci jm) Cr 63.18 | 25.4 +0.2 P~A T - TYP.) Typh D) 4. 10.16] 6 seh | [1 3.7 min { 2.03 Typ. R157 6.2 Min. Jj 95.25 | 1 The common size difference of the board width 12.5 mm ot its height is Specified as +0.2. The vatue above 12.5 mm is specified as +0.5. Pin No. |Pin Name! | Pin No. }|Pin Name|| Pin No. |Pin Name! Pin No. |Pin Name] | Pin No. /Pin Name 1 Vss 16 Ad 31 Ag 46 NC 61 DQ14 2 DAO 17 AS 32 Ag 47 WE 62 DQ33 3 Das 18 A6 33 RAS3 45 NC 63 DOQ15 4 pat 19 NC 34 RAS2 49 Das 64 0034 5 DQ19 20 DQd4 35 DQ26 50 0aQ27 65 DQ16 6 DQ2 21 DQ22 36 DOs 51 Da10 66 NC 7 0020 22 DOs 37 DQ17 52 DQ28 67 PD1 8 0Q3 23 nd23 38 DQ35 53 ba11 68 PD2 9 0021 24 DQ6 39 Vss 54 DQ29 69 PD3 10 Vec 25 DQ24 40 CASO 55 DQ12 70 PD4 11 NC 26 DQ? 41 CAS2 56 DQ30 71 NC 12 Ad 27 DQ25 42 AS3 57 0013 T2 Vss 13 Al 28 A7 43 AS 58 DQ31 14 A2 29 NC 44 RASO 59 Vec 15 A3 30 Vec 45 RAS1 60 DQ32 Presence Detect Pins . . MSGC23236C/CL | MSC23236C/CL | MSC23236C/CL Pin No. Pin Name -60BS20/DS20 | -70BS20/0820 | -80BS20/DS20 67 PD1 NG NC NC 68 PD2 NC NC NC 69 PD3 NG Ves NC 70 PD4 NC NC Vss 170OKI Semiconductor MS$C23236C/CL-xxBS20/DS20 BLOCK DIAGRAM AQ - Ag RAS RAS2 CASO CAS? E 44 ao-ag DG DOC DO gy. ag ly e+ Ao-ag OQ F- DOIB DO ag. ag Le tag (OO F- a2 DQ gag 09 -0020-7 Dd ae 0g }-paa oa we 02 [boat Ba ae GE OE OE OE Veco sg, Ib J Vee Vss Vcc Vss iy Jl Veo Vss #4 Ao-ag DO ;DO4 DO pg. ag Lg @| ao-ag OG | 0022 DO fo ag Le 4 Ras po + 005 4 DO RAS Lil RAS DQ | 0023-4 cA Ras tLe we OOP oe od ae cag Af 0024-7 D0 ae pe | pa7 4 pa I pa25 we (CUE We ol lo OWE Veo Vss Ib Jl Vee Ves Vee Vo5g ib bi Ver Vsg #4 ao-ag001 |~ pos J 0a1 ao-a9 He 4] ag-agoa1 / paze{ pot Ao- ag be @+4 RAS 002+ pa17-4 Do2 RAS -+-41 RAS Da? | oass paz AAS ++ CAST CAST CAST CAST CAS? TAS? CAS2 CAS2 WE CE te 80s WE tE te 460s WE Vee Vss Ib bl Veo Vss Vee Vcg Wa vl Vec Vss # Ao-a9 oe - 009 OO ag. ag 14 #41 Ag-ag DO | DO27 DO pg-ag te Ll pas (F-01000 ae tl mag (00 ;-0028-} 00 ae | 1) cag (Ff -daN- Dae a ee pof-pai2z-j pg SS - DO30} Veo Vg Ky Jl Veco Ves Vec Vg. Ib Jl Veo Vss LJ ag-ag 00 00134 DQ Ag-ag LJ Ao-ag OG F-DO31 DO ag. ag LI |_| DQ }-0014) D0 ARE | | Da | pa32] ba Tae | tag (DD F-001 Da ae = wag (OO F-asI-}DO ves pa F-00164 DO AS pg pasa] og YAS WE og o|OCWE: WE oF o.CN Veo Vg I vl Veco Vss Veco Vg, Ib wd Veco 2 Vss RA 1 RA a CAS! CAS3 Vee a +20 171MSC23236C/CL-xxBS20/DS20 OKI Semiconductor ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Parameter Symbol Rating Unit Voltage on Any Pin Relative to Vgs | Vin, Vour -1.0 ta 7.0 V Voltage Vec Supply Relative to Vss Vec 1.010 7.0 V Short Circuit Output Current los 50 mA Power Dissipation Pp 20 W Operating Temperature Topr Oto 70 C Storage Temperature Tstg -40 to 125 C Note: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Recommended Operating Conditions {Ta = 0C to 70C) Parameter Symbol Min. Typ. Max. Unit Veo 45 5.0 5.5 V Power Supply Voltage Ves 0 0 0 v laput High Voltage Vin 24 _ 6.5 V Input Low Voltage Vit -1.0 _ 0.8 Vv Capacitance (Ta = 25C, f = 1 MHz) Parameter Symbol Typ. Max. Unit input Capacitance (AG - AQ) Cins _ 135 pF input Capacitance (WE) Cine _ 165 pF input Capacitance (RASO - RASS) Cina = 43 oF input Capacitance (CASO - CAS3) Cina _ 43 pF 1/0 Capacitance (DQO - DQ35) Coo _ 20 pF Note: Capacitance measured with Boonton Meter. 172OKI Semiconductor DC Characteristics MSC23236C/CL-xxBS20/DS20 (Vcc = 5 V +10%, Ta = 0C to 70C) IMSC-23236C/C1,|MSC29236C/CLIMSC23236C/CL Parameter Symbol Condition -60BS20/D820 | -70BS20/0$20 | -806S20/D$20 | Unit |Note Min. | Max.| Min. | Max.| Min. | Max. OVSEVS65V; Input Leakage Current Iu [ Allother pins not | -200 | 200 | -200) 200 | -200! 200 pa under test = OV Output Leakage Current | tio owewes sy | 20]: 20 | -20| 20 | -20} 20 | ua Output High Voltage Vou | fon =5.0 mA 2.4 Voc 24 | Vec 24 1 Veo | V Output Low Voltage Vor | lop =4.2 mA 0 0.4 0 0.4 0 0.4 V Average Power : Supply Current lec RAS, CAS cycling, | 1010 | 90 | 810 | mA| 1,2 : tac = Min. (Operating) Power Supply RAS, CAS = Vin - 40 _ 40 _ 40 | mA; 1 Current (Standby) Igco | RAS, CAS _ 20 _ 20 _ 20 | mA| 1 2Vec 0.2 V _ 3.6 _ 3.6 _ 3.6 | mAs 1,5 Average Power RAS cycling, Supply Current keog | CAS = Vin, | 1010; | 910 | | 810,| maj 1,2 (RAS-only Refresh) tac = Min. Average Power RAS cycling, Supply Current loos | CAS beforeRAS, | | 1010] | 910 | | 810 | mal1.2 (CAS before RAS Refresh) tac = Min. Average Power RAS = Vit, Supply Current lcc7 | CAS cycling, | 810) | 720 | | 630 | mal 4,3 (Fast Page Mode} tec = Min. Average Power tre = 125 ps, 14 Supply Current iccio | CAS before _ 5.6 5.6 _ 5.6 | mA 5 (Battery Backup) RAS cycling Notes: Specified values are obtained with the output open. - . Address can be changed once or less while RAS=Vijr. Vee -02V s Vip S6.5V,-10VS Vy <02V. . L-version. 1. 2 3. Address can be changed once or less while CAS=Vjy;. 4 5 173MSC23236C/CL-xxBS20/DS20 AC Characteristics (1/2) Veco = 5 V 210%, Ta = 0C to 70C) OKI Semiconductor Note 1,2,3,9,10 MSC23236C/CL|MSC23236C/CL|MSC23236C/CL Parameter Symbol) -608S20/0$20 | -70BS20/DS20 | -808S20/DS20 | Unit| Note Min. | Max. | Min. | Max. | Min. | Max. Random Read or Write Cycle Time tac | 110, 130 _ 150 _ ns Fast Page Mode Cycle Time tes 40 _ 45 _ 50 _ ns Access Time from RAS trac | 60 _ 70 80 | ns 14,5,6 Access Time from CAS teac | 15 _ 20 20 ns | 4,5_ Access Time from Column Address taa _ 30 _ 35 _ 40 ns] 4.6 Access Time from CAS Precharge tea | | 35 | | 40 | | 45 | os] 4 Output Low Impedance Time from CAS teLz 0 0 _ 0 ns} 4 Output Buffer Turn-otf Delay Time torr 0 15 0 20 0 20 ns 7 Transition Time tr a 50 3 50 3 50 ns 3 Refresh Period tper _ 16 _ 16 _ 16 ms Refresh Period (L-version) tree | 128 _ 128 _ 128 | ms RAS Precharge Time tap | 40 _ 50 _ 60 | ons RAS Pulse Width tras 60 10K 70 10K 80 10K ns RAS Pulse Width (Fast Page Mode) trase| 60 | 100K | 70 | 400K | 80 | 100K | os RAS Hold Time tas 15 _ 20 _~ 20 _ ns CAS Precharge Time tcp | 10 10 | 1 | | os CAS Pulse Width teas | 15 10K | 20 10K | 20 10K | ns CAS Hold Time tesH | 60 70 80 | os CAS to RAS Precharge Time torr | 5 _ 5 _ 5 | os RAS to CAS Delay Time taco | 20 45 20 50 20 60 | ns] RAS to Column Address Delay Time tran | 15 30 15 35 15 40 | ns] 6 Row Address Set-up Time tasr 0 0 _ 0 _ ns Row Address Hold Time tray 10 _ 10 _ 10 _ ns Column Address Set-up Time tasc 0 _ 0 _ 0 _ ns Column Address Hold Time tcan | 15 _ 15 _ 15 _ ns Column Address Hold Time from RAS. tan 50 _ 55 _ 66 _ ns Column Address to RAS Lead Time tra. | 30 35 40 | ns 174OKI Semiconductor AC Characteristics (2/2) MSC23236C/CL-xxBS20/DS20 (Voc = 5 V 210%, Ta=0C to 70C) Note 1,2,3,9,10 MSC23296C/CLIMSC23236C/CL. MSC23236C/CL Parameter Symbol] -608S20/DS20 | -708$20/DS20 | -sons20/D$20 [Unit Min. Min, Min. Read Command Set-up Time tacs 0 0 0 ns Read Command Hold Time tacu 0 0 0 ns Read Command Hold Time referenced to RAS tRRH 0 0 0 ns Write Command Set-up Time twes 0 0 0 ns Write Command Hold Time twcn 10 10 10 ns Write Command Hold Time from BAS twen | 45 50 60 ns Write Command Pulse Width twe 10 10 10 ns Write Command to RAS Lead Time tam, | 15 20 20 ng Write Command to CAS Lead Time tow. | 15 20 20 ns Data-in Set-up Time tos 0 0 0 ns Data-in Hold Time tou 15 16 15 ns Data-in Hold Time from RAS tour | 50 55 60 ns TAS Active Delay Time from RAS Precharge! tapc 5 5 5 ns RAS to CAS Set-up Time (CAS before RAS)| tcsp 5 5 ns RAS to CAS Hold Time (CAS before RAS) teua | 10 10 10 ns CAS Precharge Time (Refresh Counter Test)| tcer | 30 35 40 ns WE to RAS Precharge Time (CAS before RAS) twap | 10 10 10 ns WE Hold Time from RAS (CAS before RAS) tway | 10 10 10 ns RAS to WE Set-up Time (Test Mode) twrs | 10 10 10 ns RAS to WE Hold Time (Test Mode) tw | 10 10 10 nsMSC23236C/CL-xxBS20/DS20 Notes: 176 1. 10. OKI Semiconductor A start-up delay of 200 us is required after power-up followed by a minimum of eight initialization cycles (RAS-only refresh or CAS before RAS refresh} before proper device operation is achieved. When using the internal refresh counter, a minimum of eight CAS before RAS initialization cycles is required. AC mesurement assume ty = 5 ns. Vin (Min.) and Vj, (Max.) are reference levels for measuring input timing signals. Transition times are measured between Vjy and Vii. . Measured with a load circuit equivalent to 2 TTL loads and 100 pF. Operation within the tcp (Max.) limit ensures that trac (Max.) can be met. trcp (Max.) is specified as a reference point only. Iftacpis greater than the specified trop (Max.} limit, access time is controlled by tcac. . Operation within the trap (Max.) limit ensures that trac (Max.} can be met. trap (Max.) is specified as a reference point only. If trapis greater than the specified trap (Max.) limit, access time is controlled by ta. . torr (Max.) defines the time at which the output achieves an open circuit condition and is not referenced to output voltage levels. trcH or tpry must be satisfied for a read cycle. . The test mode is initiated by performing a WE and CAS before RAS refresh cycle. This mode is latched and remains in effect until the exit cycle is generated. In a test mode CAO is not used and each DQ pin now accesses 2 bit locations. Ina read cycle, if the 2 data bits are equal, the DQ pin will indicate a high level. If the 2 data bits are not equal, the DQ pin will indicate a low level. The test mode is cleared and the memory device returned to its normal operating state by performing a RAS-only refresh cycle or a CAS before RAS refresh cycle. In a test mode read cycle, the access time parameters are delayed by 5 ns. The test mode parameters are obtained by adding 5 ns to the normal read cycle values. See ADDENDUM E for AC Timing Waveforms