www.ti.com
FEATURES
DGV, DW, OR PW PACKAGE
(TOP VIEW)
OE
VCC
A1
A2
A3
A4
GND
A5
A6
A7
A8
GND
DIR
VREF
B1
B2
B3
B4
GND
B5
B6
B7
B8
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
DESCRIPTION/ORDERING INFORMATION
SN74GTLPH3068-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
SCES284E – OCTOBER 1999 – REVISED APRIL 2005
•TI-OPC™ Circuitry Limits Ringing onUnevenly Loaded Backplanes•OEC™ Circuitry Improves Signal Integrity andReduces Electromagnetic Interference•Bidirectional Interface Between GTLP SignalLevels and LVTTL Logic Levels•LVTTL Interfaces Are 5-V Tolerant•Medium-Drive GTLP Outputs (50 mA)•LVTTL Outputs (–24 mA/24 mA)•GTLP Rise and Fall Times Designed forOptimal Data-Transfer Rate and SignalIntegrity in Distributed Loads•I
off
and Power-Up 3-State Support HotInsertion
•Bus Hold on A-Port Data Inputs•Latch-Up Performance Exceeds 100 mA PerJESD 78, Class II•ESD Protection Exceeds JESD 22– 2000-V Human-Body Model (A114-A)– 200-V Machine Model (A115-A)– 1000-V Charged-Device Model (C101)
The SN74GTLPH306 is a medium-drive, 8-bit bus transceiver that provides LVTTL-to-GTLP and GTLP-to-LVTTLsignal-level translation. The device provides a high-speed interface between cards operating at LVTTL logiclevels and a backplane operating at GTLP signal levels. High-speed (about three times faster than standardLVTTL or TTL) backplane operation is a direct result of GTLP's reduced output swing (<1 V), reduced inputthreshold levels, improved differential input, OEC™ circuitry, and TI-OPC™ circuitry. Improved GTLP OEC andTI-OPC circuits minimize bus-settling time and have been designed and tested using several backplane models.The medium drive allows incident-wave switching in heavily loaded backplanes with equivalent load impedancedown to 19 Ω.
GTLP is the Texas Instruments ( TI™) derivative of the Gunning Transceiver Logic (GTL) JEDEC standard JESD8-3. The ac specification of the SN74GTLPH306 is given only at the preferred higher-noise-margin GTLP, but theuser has the flexibility of using this device at either GTL (V
TT
= 1.2 V and V
REF
= 0.8 V) or GTLP (V
TT
= 1.5 V andV
REF
= 1 V) signal levels.
Normally, the B port operates at GTLP signal levels. The A-port and control inputs operate at LVTTL logic levels,but are 5-V tolerant and are compatible with TTL and 5-V CMOS inputs. V
REF
is the B-port differential inputreference voltage.
This device is fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitrydisables the outputs, preventing damaging current backflow through the device when it is powered down. Thepower-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,which prevents driver conflict.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.TI-OPC, OEC, TI are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1999–2005, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
<BR/>
SN74GTLPH306
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
SCES284E – OCTOBER 1999 – REVISED APRIL 2005
This GTLP device features TI-OPC circuitry, which actively limits overshoot caused by improperly terminatedbackplanes, unevenly distributed cards, or empty slots during low-to-high signal transitions. This improves signalintegrity, which allows adequate noise margin to be maintained at higher frequencies.
Active bus-hold circuitry holds unused or undriven LVTTL data inputs at a valid logic state. Use of pullup orpulldown resistors with the bus-hold circuitry is not recommended.
When V
CC
is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.However, to ensure the high-impedance state above 1.5 V, the output-enable ( OE) input should be tied to V
CCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of thedriver.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
Tube SN74GTLPH306DWSOIC – DW GTLPH306Tape and reel SN74GTLPH306DWR–40°C to 85°C
TSSOP – PW Tape and reel SN74GTLPH306PWR GH306TVSOP – DGV Tape and reel SN74GTLPH306DGVR GH306
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available atwww.ti.com/sc/package.
FUNCTIONAL DESCRIPTIONThe SN74GTLPH306 is an 8-bit bus transceiver and is designed for asynchronous communication between databuses. The device transmits data from the A port to the B port or from the B port to the A port, depending on thelogic level at the direction-control (DIR) input. OE can be used to disable the device so the buses are effectivelyisolated. Data polarity is noninverting.
For A-to-B data flow, when OE is low and DIR is high, the B outputs take on the logic value of the A inputs.When OE is high, the outputs are in the high-impedance state.
The data flow for B to A is similar to A to B, except OE and DIR are low.
FUNCTION TABLE
INPUTS
OUTPUT MODEOE DIR
H X Z IsolationL L B data to A port
True transparentL H A data to B port
2
www.ti.com
DIR
OE
A1 B1
To Seven Other Channels
24
3
1
22
VREF
23
Absolute Maximum Ratings
(1)
SN74GTLPH3068-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
SCES284E – OCTOBER 1999 – REVISED APRIL 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range –0.5 4.6 VA port and control inputs –0.5 7V
I
Input voltage range
(2)
VB port and V
REF
–0.5 4.6A port –0.5 7Voltage range applied to any output in theV
O
Vhigh-impedance or power-off state
(2)
B port –0.5 4.6A port 48I
O
Current into any output in the low state mAB port 100I
O
Current into any A port output in the high state
(3)
48 mAContinuous current through each V
CC
or GND ±100 mAI
IK
Input clamp current V
I
< 0 –50 mAI
OK
Output clamp current V
O
< 0 –50 mADGV package 86θ
JA
Package thermal impedance
(4)
DW package 46 °C/WPW package 88T
stg
Storage temperature range –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.(3) This current flows only when the output is in the high state and V
O
> V
CC
.(4) The package thermal impedance is calculated in accordance with JESD 51-7.
3
www.ti.com
Recommended Operating Conditions
(1) (2) (3) (4)
SN74GTLPH306
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
SCES284E – OCTOBER 1999 – REVISED APRIL 2005
MIN NOM MAX UNIT
V
CC
Supply voltage 3.15 3.3 3.45 VGTL 1.14 1.2 1.26V
TT
Termination voltage VGTLP 1.35 1.5 1.65GTL 0.74 0.8 0.87V
REF
Reference voltage VGTLP 0.87 1 1.1B port V
TTV
I
Input voltage VExcept B port V
CC
5.5B port V
REF
+ 0.05V
IH
High-level input voltage VExcept B port 2B port V
REF
– 0.05V
IL
Low-level input voltage VExcept B port 0.8I
IK
Input clamp current –18 mAI
OH
High-level output current A port –24 mAA port 24I
OL
Low-level output current mAB port 50∆t/ ∆v Input transition rise or fall rate Outputs enabled 10 ns/V∆t/ ∆V
CC
Power-up ramp rate 20 µs/VT
A
Operating free-air temperature –40 85 °C
(1) All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.(2) Proper connection sequence for use of the B-port I/O precharge feature is GND and BIAS V
CC
= 3.3 V first, I/O second, and V
CC
= 3.3 Vlast, because the BIAS V
CC
precharge circuitry is disabled when any V
CC
pin is connected. The control and V
REF
inputs can beconnected anytime, but normally are connected during the I/O stage. If B-port precharge is not required, any connection sequence isacceptable, but generally, GND is connected first.(3) V
TT
and R
TT
can be adjusted to accommodate backplane impedances if the dc recommended I
OL
ratings are not exceeded.(4) V
REF
can be adjusted to optimize noise margins, but normally is two-thirds V
TT
. TI-OPC circuitry is enabled in the A-to-B direction and isactivated when V
TT
> 0.7 V above V
REF
. If operated in the A-to-B direction, V
REF
should be set to within 0.6 V of V
TT
to minimize currentdrain.
4
www.ti.com
Electrical Characteristics
Hot-Insertion Specifications for A Port
Hot-Insertion Specifications for B Port
SN74GTLPH3068-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
SCES284E – OCTOBER 1999 – REVISED APRIL 2005
over recommended operating free-air temperature range for GTLP (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
V
IK
V
CC
= 3.15 V, I
I
= –18 mA –1.2 VV
CC
= 3.15 V to 3.45 V, I
OH
= –100 µA V
CC
– 0.2V
OH
A port I
OH
= –12 mA 2.4 VV
CC
= 3.15 V
I
OH
= –24 mA 2V
CC
= 3.15 V to 3.45 V, I
OL
= 100 µA 0.2A port I
OL
= 12 mA 0.4V
CC
= 3.15 VV
OL
I
OL
= 24 mA 0.5 VI
OL
= 40 mA 0.4B port V
CC
= 3.15 V
I
OL
= 50 mA 0.55V
I
= 0 or V
CC
±5A-port andcontrol inputsI
I
(2)
V
CC
= 3.45 V V
I
= 5.5 V ±20 µAB port V
I
= 0 to 1.5 V ±5I
BHL
(3)
A port V
CC
= 3.15 V, V
I
= 0.8 V 75 µAI
BHH
(4)
A port V
CC
= 3.15 V, V
I
= 2 V –75 µAI
BHLO
(5)
A port V
CC
= 3.45 V, V
I
= 0 to V
CC
500 µAI
BHHO
(6)
A port V
CC
= 3.45 V, V
I
= 0 to V
CC
–500 µAOutputs high 20V
CC
= 3.45 V, I
O
= 0,I
CC
A or B port V
I
(A-port or control input) = V
CC
or GND, Outputs low 20 mAV
I
(B port) = V
TT
or GND
Outputs disabled 20V
CC
= 3.45 V, One A-port or control input at V
CC
– 0.6 V,∆I
CC
(7)
1.5 mAOther A-port or control inputs at V
CC
or GNDC
i
Control inputs V
I
= 3.15 V or 0 4.5 5 pFA port V
O
= 3.15 V or 0 7.5 9C
io
pFB port V
O
= 1.5 V or 0 7.5 9
(1) All typical values are at V
CC
= 3.3 V, T
A
= 25°C.(2) For I/O ports, the parameter I
I
includes the off-state output leakage current.(3) The bus-hold circuit can sink at least the minimum low sustaining current at V
IL
max. I
BHL
should be measured after lowering V
IN
to GNDand then raising it to V
IL
max.(4) The bus-hold circuit can source at least the minimum high sustaining current at V
IH
min. I
BHH
should be measured after raising V
IN
to V
CCand then lowering it to V
IH
min.(5) An external driver must source at least I
BHLO
to switch this node from low to high.(6) An external driver must sink at least I
BHHO
to switch this node from high to low.(7) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V
CC
or GND.
over recommended operating free-air temperature range
PARAMETER TEST CONDITIONS MIN MAX UNIT
I
off
V
CC
= 0, V
I
or V
O
= 0 to 5.5 V 10 µAI
OZPU
V
CC
= 0 to 1.5 V, V
O
= 0.5 V to 3 V, OE = 0 ±30 µAI
OZPD
V
CC
= 1.5 V to 0, V
O
= 0.5 V to 3 V, OE = 0 ±30 µA
over recommended operating free-air temperature range
PARAMETER TEST CONDITIONS MIN MAX UNIT
I
off
V
CC
= 0, V
I
or V
O
= 0 to 1.5 V 10 µAI
OZPU
V
CC
= 0 to 1.5 V, V
O
= 0.5 V to 1.5 V, OE = 0 ±30 µAI
OZPD
V
CC
= 1.5 V to 0, V
O
= 0.5 V to 1.5 V, OE = 0 ±30 µA
5
www.ti.com
Switching Characteristics
SN74GTLPH306
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
SCES284E – OCTOBER 1999 – REVISED APRIL 2005
over recommended ranges of supply voltage and operating free-air temperature,V
TT
= 1.5 V and V
REF
= 1 V for GTLP (see Figure 1)
FROM TOPARAMETER MIN TYP
(1)
MAX UNIT(INPUT) (OUTPUT)
t
PLH
1 7.5A B nst
PHL
1 7.5t
en
1 8OE B nst
dis
1 8t
r
Rise time, B outputs (20% to 80%) 2.2 nst
f
Fall time, B outputs (80% to 20%) 2.1 nst
r
Rise time, A outputs (10% to 90%) 4.1 nst
f
Fall time, A outputs (90% to 10%) 3.3 nst
PLH
1 7B A nst
PHL
1 7t
en
1 8OE A nst
dis
1 8
(1) All typical values are at V
CC
= 3.3 V, T
A
= 25°C.
6
www.ti.com
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT FOR A OUTPUTS
S1 Open
GND
500 Ω
500 Ω
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
6 V
GND
tPLH tPHL
Output
Control
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
3 V
0 V
VOH
VOL
0 V
VOL + 0.3 V
VOH − 0.3 V
≈0 V
Input
3 V
3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(A port to B port)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
(A port)
Output
1.5 V
Test
Point
CL = 30 pF
(see Note A)
From Output
Under Test
25 Ω
LOAD CIRCUIT FOR B OUTPUTS
0 V
VOH
VOL
Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(B port to A port)
Output
1.5 V
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≈ 10 MHz, ZO = 50 Ω, tr ≈ 2 ns, tf ≈ 2 ns.
D. The outputs are measured one at a time, with one transition per measurement.
6 V
tPLH tPHL
1.5 V 1.5 V
1.5 V
1.5 V
1.5 V
1.5 V 1.5 V
1.5 V
1 V 1 V
1 V 1 V
SN74GTLPH3068-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
SCES284E – OCTOBER 1999 – REVISED APRIL 2005
Figure 1. Load Circuits and Voltage Waveforms
7
www.ti.com
Distributed-Load Backplane Switching Characteristics
From Output
Under Test Test
Point
1.5 V
CL = 9 pF
19 Ω
LL = 19 nH
Drvr
1.5 V
0.25” 2”
1” 1”
1.5 V
1”1”
2” 0.25”
Rcvr Rcvr Rcvr
Slot 1 Slot 2 Slot 9 Slot 10
Conn. Conn. Conn. Conn.
ZO = 70 Ω
38Ω
38Ω
Switching Characteristics
SN74GTLPH306
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
SCES284E – OCTOBER 1999 – REVISED APRIL 2005
The preceding switching characteristics table shows the switching characteristics of the device into a lumpedload (Figure 1). However, the designer's backplane application probably is a distributed load. The physicalrepresentation is shown in Figure 2. This backplane, or distributed load, can be approximated closely to aresistor inductance capacitance (RLC) circuit, as shown in Figure 3. This device has been designed for optimumperformance in this RLC circuit. The following switching characteristics table shows the switching characteristicsof the device into the RLC load, to help the designer better understand the performance of the GTLP device inthis typical backplane. See www.ti.com/sc/gtlp for more information.
Figure 3. Medium-Drive RLC Network
Figure 2. Medium-Drive Test Backplane
over recommended ranges of supply voltage and operating free-air temperature,V
TT
= 1.5 V and V
REF
= 1 V for GTLP (see Figure 3)
FROM TOPARAMETER TYP
(1)
UNIT(INPUT) (OUTPUT)
t
PLH
3.6A B nst
PHL
4.1t
en
4.4OE B nst
dis
4.6t
r
Rise time, B outputs (20% to 80%) 1.2 nst
f
Fall time, B outputs (80% to 20%) 2.2 ns
(1) All typical values are at V
CC
= 3.3 V, T
A
= 25°C. All values are derived from TI-SPICE models.
8
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
74GTLPH306DGVRE4 ACTIVE TVSOP DGV 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74GTLPH306DGVRG4 ACTIVE TVSOP DGV 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74GTLPH306DGVR ACTIVE TVSOP DGV 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74GTLPH306DW ACTIVE SOIC DW 24 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74GTLPH306DWG4 ACTIVE SOIC DW 24 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74GTLPH306DWR ACTIVE SOIC DW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74GTLPH306DWRE4 ACTIVE SOIC DW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74GTLPH306DWRG4 ACTIVE SOIC DW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74GTLPH306PW ACTIVE TSSOP PW 24 60 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74GTLPH306PWE4 ACTIVE TSSOP PW 24 60 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74GTLPH306PWG4 ACTIVE TSSOP PW 24 60 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74GTLPH306PWR ACTIVE TSSOP PW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74GTLPH306PWRE4 ACTIVE TSSOP PW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74GTLPH306PWRG4 ACTIVE TSSOP PW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
PACKAGE OPTION ADDENDUM
www.ti.com 24-May-2007
Addendum-Page 1
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 24-May-2007
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74GTLPH306DGVR TVSOP DGV 24 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74GTLPH306DWR SOIC DW 24 2000 330.0 24.4 10.75 15.7 2.7 12.0 24.0 Q1
SN74GTLPH306PWR TSSOP PW 24 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Jul-2010
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74GTLPH306DGVR TVSOP DGV 24 2000 346.0 346.0 29.0
SN74GTLPH306DWR SOIC DW 24 2000 346.0 346.0 41.0
SN74GTLPH306PWR TSSOP PW 24 2000 346.0 346.0 33.0
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Jul-2010
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50 4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
112
24 13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
382416
4,90
5,103,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products Applications
Audio www.ti.com/audio Communications and Telecom www.ti.com/communications
Amplifiers amplifier.ti.com Computers and Peripherals www.ti.com/computers
Data Converters dataconverter.ti.com Consumer Electronics www.ti.com/consumer-apps
DLP® Products www.dlp.com Energy and Lighting www.ti.com/energy
DSP dsp.ti.com Industrial www.ti.com/industrial
Clocks and Timers www.ti.com/clocks Medical www.ti.com/medical
Interface interface.ti.com Security www.ti.com/security
Logic logic.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense
Power Mgmt power.ti.com Transportation and www.ti.com/automotive
Automotive
Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video
RFID www.ti-rfid.com Wireless www.ti.com/wireless-apps
RF/IF and ZigBee® Solutions www.ti.com/lprfTI E2E Community Home Page e2e.ti.com
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2011, Texas Instruments Incorporated
