1. General description
The 74AHC123A; 74AHCT123A are high-speed Si-gate CMOS devices and are pin
compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with
JEDEC standard no. 7A.
The 74AHC123A; 74 AHCT123A are dual retr igg er able mo no stable multivib ra to rs with
output pulse width control by three methods. The basic pulse time is programmed by
selection of an external resistor (REXT) and capacitor (CEXT). The external resistor and
capacitor are normally connected as shown in Figure 11.
Once triggered, the basic output pulse width may be extended by retriggering the gated
active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating
this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as
desired. Alternatively an ou tput delay can be terminate d at any time by a LOW- going edge
on input nRD, which also inhibits the triggering.
An internal conn ection from nRD to the input gate makes it possible to trigger th e circuit by
a positive-going signal at input nRD as shown in Table 3. Figure 8 and Figure 9 illustrate
pulse control by retriggering and early reset. The ba sic output pulse width is essentially
determined by the value of the external timing components REXT and CEXT. When
CEXT 10 nF, the typical output pulse width is define d as: tW=R
EXT CEXT where
tW= pulse width in ns; REXT = external resistor in k; CEXT = external capacitor in pF.
Schmitt-trigger action at all input s makes the circuit highly tolerant to slower input r ise and
fall times.
2. Features and benefits
All inputs have a Schmitt-trigger action
Inputs accept voltages higher tha n VCC
DC triggered from active HIGH or active LOW inputs
Retriggerable for very long pulses up to 100 % duty factor
Direct reset termin ate s ou tp ut puls e
For 74AHC123A only: operates with CMOS input levels
For 74AHCT123A only: operates with TTL input levels
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
Rev. 4 — 8 November 2011 Product data sheet
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 2 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
3. Ordering information
4. Functional diagram
Tabl e 1. Ordering information
Type number Package
Temperatur e ra nge Name Description Version
74AHC123AD 40 C to +125 C SO16 plastic small outline package; 16 leads;
body width 3.9 mm SOT109-1
74AHCT123AD
74AHC123APW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm SOT403-1
74AHCT123APW
74AHC123ABQ 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 3.5 0.85 mm
SOT763-1
74AHCT123ABQ
Fig 1. Logic symbol Fig 2. IEC logic symbol
001aae521
14
1
2
3
1A
1B
1RD
9
10
11
2A
2B
2RD
15
S
Q
Q
T
RD
13
4
1CEXT
1REXT/CEXT
1Q
1Q
6
7
5
12
2CEXT
2REXT/CEXT
2Q
2Q
1
2
3
13
CX
&
RCX
R
R
14
4
15
001aae522
9
10
11
5
CX
&
RCX
6
12
7
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 3 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
Fig 3. Functional dia g ra m
1Q
Q
2RD
RD
S13
1REXT/CEXT
15
1CEXT
14
1Q
Q4
9
aaa-000650
1RD
2A
1
1A
10
2B
2
11
3
1B
T
Q
RD
S
2REXT/CEXT
7
2CEXT
6
2Q
5
Q2Q
12
T
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 4 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
For minimum noise generation it is recommended to ground pins 6 (2CEXT) and 14 (1CEXT) externally to pin 8 (GND).
Fig 4. Functional dia g ra m
001aae524
V
CC
nREXT/CEXT
Q
Q
CL CL
R
CL
CLCL V
CC
V
CC
RR
RD
R
A
B
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 5 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
5. Pinning information
5.1 Pinning
5.2 Pin description
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
a supply pin or input.
Fig 5. Pin configuration SO16 , TSSO P1 6 Fig 6. Pin configuration DHVQFN1 6
74AHC123A
74AHCT123A
1A VCC
1B 1REXT/CEXT
1RD 1CEXT
1Q 1Q
2Q 2Q
2CEXT 2RD
2REXT/CEXT 2B
GND 2A
001aah068
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
001aah067
74AHC123A
74AHCT123A
2REXT/CEXT 2B
2CEXT 2RD
2Q 2Q
1Q 1Q
1RD 1CEXT
1B 1REXT/CEXT
GND
2A
1A
V
CC
Transparent top view
7 10
6 11
5 12
413
3 14
2 15
8
9
1
16
terminal 1
index area
GND
(1)
Table 2. Pin description
Symbol Pin Description
1A 1 negative-edge triggered input 1
1B 2 positive-edge triggered input 1
1RD 3 direct reset LOW and positive-edge triggered input 1
1Q 4 active LOW output 1
2Q 5 active HIGH output 2
2CEXT 6 external capacitor connection 2
2REXT/CEXT 7 external resistor and capacitor connection 2
GND 8 ground (0 V)
2A 9 negative-edge triggered input 2
2B 10 positive-edge triggered input 2
2RD 11 direct reset LOW and positive-edge triggered input 2
2Q 12 active LO W output 2
1Q 13 active HIGH output 1
1CEXT 14 external capacitor connection 1
1REXT/CEXT 15 external resistor and capacitor connection 1
VCC 16 supply vol tage
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 6 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
6. Functional description
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
= LOW-to-HIGH transition;
= HIGH-to-LOW transition;
= one HIGH level output pulse;
= one LOW level output pulse.
[2] If the monostable multivibrator was triggered before this condition was established, the pulse will continue as programmed.
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Ptot derates linearly with 8 mW/K above 70 C.
[3] Ptot derates linearly with 5.5 mW/K above 60 C.
[4] Ptot derates linearly with 4.5 mW/K above 60 C.
Table 3. Function table[1]
Input Output
nRDnA nB nQ nQ
LXXLH
XHXL
[2] H[2]
XXLL
[2] H[2]
HL
HH
LH
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7.0 V
VIinput voltage 0.5 +7.0 V
IIK input clamping current VI < 0.5 V [1] 20 - mA
IOK output clamping current VO<0.5 V or VO>V
CC +0.5V [1] -20 mA
IOoutput curren t VO = 0.5 V to (VCC +0.5V) - 25 mA
ICC supply current - 75 mA
IGND ground current 75 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb = 40 C to +125 C
SO16 package [2] - 500 mW
TSSOP16 package [3] - 500 mW
DHVQFN16 package [4] - 500 mW
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 7 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
8. Recommended operating conditions
9. Static characteristics
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 74AHC123A 74AHCT123A Unit
Min Typ Max Min Typ Max
VCC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V
VIinput voltage 0 - 5.5 0 - 5.5 V
VOoutput voltage 0 - VCC 0- V
CC V
Tamb ambient temperature 40 +25 +125 40 +25 +125 C
t/V input transition rise
and fall rate VCC = 3.3 V 0.3 V - - 100 - - - ns/V
VCC = 5.0 V 0.5 V - - 20 - - 20 ns/V
Table 6. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
74AHC123A
VIH HIGH-level
input voltage VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V
VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V
VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V
VIL LOW-level
input voltage VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V
VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V
VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V
VOH HIGH-level
output
voltage
VI= VIH or VIL
IO= 50 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO= 50 A; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V
IO= 50 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO= 4.0 m A; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V
IO= 8.0 mA; VCC = 4.5 V 3.94 - - 3.8 - 3.70 - V
VOL LOW-level
output
voltage
VI= VIH or VIL
IO= 50 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO= 50 A; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V
IO= 50 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO= 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V
IO= 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V
IIinput leakage
current VI=5.5VorGND;
VCC = 0 V to 5.5 V
nREXT/CEXT [1] --0.25 - 2.5 - 10.0 A
pins nA, nB, nRD--0.1 - 1.0 - 2.0 A
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 8 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
[1] Voltage on nREXT/CEXT = 0.5 VCC and pin nREXT/CEXT in OFF-state during test.
ICC supply
current VI=V
CC or GND; IO = 0 A;
VCC =5.5V --4.0 - 40 - 80A
active state (per circuit);
VI=V
CC or GND [1]
VCC = 3.0 V - 160 250 - 280 - 280 A
VCC = 4.5 V - 380 500 - 650 - 650 A
VCC = 5.5 V - 560 750 - 975 - 975 A
CIinput
capacitance - 5.0 10 - 10 - 10 pF
COoutput
capacitance -4.0 - - - - - pF
74AHCT123A
VIH HIGH-level
input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V
VIL LOW-level
input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V
VOH HIGH-level
output
voltage
VI= VIH or VIL; VCC = 4.5 V
IO= 50 A 4.4 4.5 - 4.4 - 4.4 - V
IO= 8.0 mA 3.94 - - 3.8 - 3.70 - V
VOL LOW-level
output
voltage
VI= VIH or VIL; VCC = 4.5 V
IO= 50 A - 0 0.1 - 0.1 - 0.1 V
IO= 8.0 mA - - 0.36 - 0.44 - 0.55 V
IIinput leakage
current nREXT/CEXT;
VI=5.5VorGND;
VCC = 0 V to 5.5 V
[1] --0.25 - 2.5 - 10.0 A
pins nA, nB, nRD;
VI=V
CC or GND;
VCC =5.5V
--0.1 - 1.0 - 2.0 A
ICC supply
current VI=V
CC or GND; IO = 0 A;
VCC =5.5V --4.0 - 40 - 80A
active state (per circuit);
VI=V
CC or GND [1]
VCC = 4.5 V - 380 500 - 650 - 650 A
VCC = 5.5 V - 560 750 - 975 - 975 A
CIinput
capacitance - 3 10 - 10 - 10 pF
COoutput
capacitance -4.0 - - - - - pF
Table 6. Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 9 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; For test circuit see Figure 12.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max Min Max
74AHC123A
tpd propagation
delay nA and nB to nQ and nQ;
see Figure 7 [2]
VCC = 3.0 V to 3.6 V
CL= 15 pF - 7.4 20.6 1.0 24.0 1.0 26.0 ns
CL= 50 pF - 10.5 24.1 1.0 27.5 1.0 30.0 ns
VCC = 4.5 V to 5.5 V
CL= 15 pF - 5.1 12.0 1.0 14.0 1.0 15.5 ns
CL= 50 pF - 7.3 14.0 1.0 16.0 1.0 17.5 ns
nRD to nQ and nQ;
see Figure 7 [2]
VCC = 3.0 V to 3.6 V
CL= 15 pF - 8.2 22.4 1.0 26.0 1.0 28.0 ns
CL= 50 pF - 11.7 25.9 1.0 29.5 1.0 32.0 ns
VCC = 4.5 V to 5.5 V
CL= 15 pF - 5.6 12.9 1.0 15.0 1.0 16.5 ns
CL= 50 pF - 8.1 14.9 1.0 17.0 1.0 19.0 ns
nRD to nQ and nQ (reset);
see Figure 7 [2]
VCC = 3.0 V to 3.6 V
CL= 15 pF - 6.4 15.8 1.0 18.5 1.0 20.0 ns
CL= 50 pF - 9.2 19.3 1.0 22.0 1.0 24.5 ns
VCC = 4.5 V to 5.5 V
CL= 15 pF - 4.4 9.4 1.0 11.0 1.0 12.0 ns
CL= 50 pF - 6.3 11.4 1.0 13.0 1.0 14.5 ns
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 10 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
tWpulse width inputs; nA = LOW;
see Figure 7
VCC = 3.0 V to 3.6 V 5.0 - - 5.0 - 5.0 - ns
VCC = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns
inputs; nB = HIGH;
see Figure 7
VCC = 3.0 V to 3.6 V 5.0 - - 5.0 - 5.0 - ns
VCC = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns
inputs; nRD = LOW;
see Figure 7
VCC = 3.0 V to 3.6 V 5.0 - - 5.0 - 5.0 - ns
VCC = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns
outputs; nQ = LOW and
nQ = HIGH; CL=50pF;
see Figure 7, Figure 8,
Figure 9 and Figure 10
[3]
CEXT = 28 pF; REXT =2k
VCC = 3.0 V to 3.6 V - 115 240 - 300 - 300 ns
VCC = 4.5 V to 5.5 V - 100 200 - 240 - 240 ns
CEXT = 0.01 F;
REXT =10k
VCC = 3.0 V to 3. 6 V 90 100 110 90 110 85 115 s
VCC = 4.5 V to 5. 5 V 90 100 110 90 110 85 115 s
CEXT = 0.1 F;
REXT =10k;
VCC = 3.0 V to 3.6 V 0.9 1 1.1 0.9 1.1 0.85 1.15 ms
VCC = 4.5 V to 5.5 V 0.9 1 1.1 0.9 1.1 0.85 1.15 ms
trtrig retrigger
time nA to nB; CEXT = 100 pF;
REXT =1k; CL=50pF;
see Figure 8 and Figure 10
VCC = 3.0 V to 3.6 V - 60 - - - - - ns
VCC = 4.5 V to 5.5 V - 39 - - - - - ns
nA to nB; CEXT = 0.01 F;
REXT =1k; CL=50pF;
see Figure 8 and Figure 10
VCC = 3.0 V to 3.6 V - 1.5 - - - - - s
VCC = 4.5 V to 5.5 V - 1.2 - - - - - s
CPD power
dissipation
capacitance
CL=50pF; f
i = 1 MHz;
VI=GNDtoV
CC
[4] -57- - - - -pF
Table 7. Dynamic characteristics …continued
GND = 0 V; For test circuit see Figure 12.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max Min Max
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 11 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
74AHCT123A
tpd propagation
delay nA and nB to nQ and nQ;
see Figure 7 [2]
VCC = 4.5 V to 5.5 V
CL= 15 pF - 5.0 12.0 1.0 14.0 1.0 15.5 ns
CL= 50 pF - 7.1 14.0 1.0 16.0 1.0 17.5 ns
nRD to nQ and nQ;
see Figure 7 [2]
VCC = 4.5 V to 5.5 V
CL= 15 pF - 5.2 12.9 1.0 15.0 1.0 16.5 ns
CL= 50 pF - 7.5 14.9 1.0 17.0 1.0 18.5 ns
nRD to nQ and nQ (reset);
see Figure 7 [2]
VCC = 4.5 V to 5.5 V
CL= 15 pF - 4.7 9.4 1.0 11.0 1.0 12.0 ns
CL= 50 pF - 6.7 11.4 1.0 13.0 1.0 14.5 ns
tWpulse width inputs; nA = LOW;
CL= 50 pF; see Figure 7
VCC = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns
inputs; nB = HIGH;
CL= 50 pF; see Figure 7
VCC = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns
inputs; nRD = LOW;
CL= 50 pF; see Figure 7
VCC = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns
outputs; nQ = LOW and
nQ = HIGH; CL=50pF;
CEXT = 28 pF; REXT =2k;
see Figure 7, Figure 8,
Figure 9 and Figure 10
[3]
VCC = 4.5 V to 5.5 V - 100 200 - 240 - 240 ns
CEXT = 0.01 F;
REXT =10k
VCC = 4.5 V to 5.5 V 90 100 110 90 110 85 115 s
CEXT = 0.1 F;
REXT =10k
VCC = 4.5 V to 5.5 V 0.9 1 1.1 0.9 1.1 0.85 1.15 ms
Table 7. Dynamic characteristics …continued
GND = 0 V; For test circuit see Figure 12.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max Min Max
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 12 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
[1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).
[2] tpd is the same as tPLH and tPHL; CEXT = 0 pF; REXT =5 k.
[3] For CEXT 10 nF the typical value of the pulse width tW (s) = CEXT (nF) REXT (k).
[4] CPD is used to determine the dynamic power dissipation PD(W).
PD=C
PD VCC2fi+(CLVCC2fo)where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V.
[5] CEXT has no limits.
trtrig retrigger
time nA to nB; CEXT = 100 pF;
REXT =1k; CL=50pF;
see Figure 8 and Figure 10
VCC = 4.5 V to 5.5 V - 60 - - - - - ns
nA to nB; CEXT = 0.01 F;
REXT =1k; CL=50pF;
see Figure 8 and Figure 10
VCC = 4.5 V to 5.5 V - 1.5 - - - - - s
CPD power
dissipation
capacitance
CL=50pF; f
i = 1 MHz;
VI=GNDtoV
CC
[4] -58- - - - -pF
External components
REXT external
resistance VCC = 2. 0 V 5 - - - - - - k
VCC > 3.0 V 1 - - - - - - k
CEXT external
capacitance VCC = 2.0 V [5] ---- - - -pF
VCC > 3.0 V [5] ---- - - -pF
Table 7. Dynamic characteristics …continued
GND = 0 V; For test circuit see Figure 12.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max Min Max
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 13 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
11. Waveforms
Measurement points are given in Table 8.
Fig 7. Propagation delay input (nA, nB, nRD) to output (nQ, nQ)
001aae528
nB input
(nA LOW)
tW
tW
tPLH
VM
VM
VM
tW
tPLH
tW
tPHL
tPHL
VM
tW
tPLH
nA input
(nB HIGH)
nRD input
nQ output
nQ output
VM
tPHL
tPHL tPLH
RESET
Table 8. Measurement points
Type Input Output
VMVM
74AHC123A 0.5VCC 0.5VCC
74AHCT123A 1.5 V 0.5VCC
nRD = HIGH
Fig 8. Output pulse control us in g re trigger pulse
001aae526
nB input
nQ output
nA input
t
rtrig
t
W
t
W
t
W
t
W
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 14 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
nA = LOW
Fig 9. Outp ut pulse control usin g reset input nRD
001aae527
nB input
nQ output
nRD input
t
W
t
W
Fig 10. Input and output timing
trt
tWtWtW + trt
nA input
nB input
nRD input
nREXT/CEXT
nQ output
nQ output
001aah086
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 15 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
Fig 11. Timing co mponent connections
VCC
REXT
to nCEXT
(pin 14 or 6) to nREXT/CEXT
(pin 15 or 7)
CEXT
mna519
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistor
S1 = Test selection switch
Fig 12. Load circuitry for switching times
Table 9. Test data
Type Input Load S1 position
VItr, tfCLRLtPHL, tPLH tPZH, tPHZ tPZL, tPLZ
74AHC123A VCC 3.0 ns 15 pF, 50 pF 1 kopen GND VCC
74AHCT123A 3.0 V 3.0 ns 15 pF, 50 pF 1 kopen GND VCC
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 16 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
12. Package outline
Fig 13. Package outline SOT109-1 (SO16)
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
8
9
1
16
y
pin 1 index
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75 0.25
0.10 1.45
1.25 0.25 0.49
0.36 0.25
0.19 10.0
9.8 4.0
3.8 1.27 6.2
5.8 0.7
0.6 0.7
0.3 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT109-1 99-12-27
03-02-19
076E07 MS-012
0.069 0.010
0.004 0.057
0.049 0.01 0.019
0.014 0.0100
0.0075 0.39
0.38 0.16
0.15 0.05
1.05
0.041
0.244
0.228 0.028
0.020 0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
0 2.5 5 mm
scale
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 17 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
Fig 14. Package outline SOT403-1 (TSSOP16)
UNIT A1A2A3bpcD
(1) E(2) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.95
0.80 0.30
0.19 0.2
0.1 5.1
4.9 4.5
4.3 0.65 6.6
6.2 0.4
0.3 0.40
0.06 8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT403-1 MO-153 99-12-27
03-02-18
wM
bp
D
Z
e
0.25
18
16 9
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
HE
E
c
vMA
X
A
y
0 2.5 5 mm
scale
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
A
max.
1.1
pin 1 index
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 18 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
Fig 15. Package outline SOT763-1 (DHVQFN 16)
terminal 1
index area
0.51
A1Eh
b
UNIT ye
0.2
c
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 3.6
3.4
Dh
2.15
1.85
y1
2.6
2.4 1.15
0.85
e1
2.5
0.30
0.18
0.05
0.00 0.05 0.1
DIMENSIONS (mm are the original dimensions)
SOT763-1 MO-241 - - -- - -
0.5
0.3
L
0.1
v
0.05
w
0 2.5 5 mm
scale
SOT763-1
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
A(1)
max.
AA1c
detail X
y
y1C
e
L
Eh
Dh
e
e1
b
27
15 10
9
8
1
16
X
D
E
C
BA
terminal 1
index area
AC
CB
vM
wM
E(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D(1)
02-10-17
03-01-27
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 19 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
13. Abbreviations
14. Revision history
Table 10. Abbreviations
Acronym Description
CDM Charged-Device Model
CMOS Complementary Metal Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74AHC_AHCT123A v.4 20111108 Product data sheet - 74AHC_AHCT123A v.3
Modifications: Legal pages updated.
74AHC_AHCT123A v.3 20110908 Product data sheet - 74AHC_AHCT123A v.2
74AHC_AHCT123A v.2 20080118 Product data sheet - 74AHC_AHCT123A v.1
74AHC_AHCT123A v.1 20000315 Product specification - -
74AHC_AHCT123A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 8 November 2011 20 of 22
NXP Semiconductors 74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre vail.
Product specificatio nThe information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors doe s not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect , incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ ag gregate and cumulati ve liability toward s
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors product s are not designed,
authorized or warranted to be suit able for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applicati ons or customer product
design. It is customer’s sole responsibility to determine whet her the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for th e customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the