±
SLLS408G − JANUARY 2000 − REVISED MARCH 2004
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DRS-232 Bus-Pin ESD Protection Exceeds
±15 kV Using Human-Body Model (HBM)
DMeets or Exceeds the Requirements of
TIA/EIA-232-F and ITU v.28 Standards
DOperates With 3-V to 5.5-V VCC Supply
DOperates Up To 250 kbit/s
DTwo Drivers and Two Receivers
DLow Standby Current...1 µA Typical
DExternal Capacitors ...4 × 0.1 µF
DAccepts 5-V Logic Input With 3.3-V Supply
DAlternative High-Speed Pin-Compatible
Device (1 Mbit/s)
− SNx5C3222
DApplications
− Battery-Powered Systems, PDAs,
Notebooks, Laptops, Palmtop PCs, and
Hand-Held Equipment
description/ordering information
The MAX3222 consists of two line drivers, two line receivers, and a dual charge-pump circuit with
±15-kV ESD protection pin to pin (serial-port connection pins, including GND). The device meets the
requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication
controller and the serial-port connector. The charge pump and four small external capacitors allow operation
from a single 3-V to 5.5-V supply. The device operates at data signaling rates up to 250 kbit/s and a maximum
of 30-V/µs driver output slew rate.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
SOIC (DW)
Tube of 25 MAX3222CDW
MAX3222C
SOIC (DW) Reel of 2000 MAX3222CDWR MAX3222C
−0°C to 70°C
SSOP (DB)
Tube of 70 MAX3222CDB
MA3222C
−0°C to 70°CSSOP (DB) Reel of 2000 MAX3222CDBR MA3222C
TSSOP (PW)
Tube of 70 MAX3222CPW
MA3222C
TSSOP (PW) Reel of 2000 MAX3222CPWR MA3222C
SOIC (DW)
Tube of 25 MAX3222IDW
MAX3222I
SOIC (DW) Reel of 2000 MAX3222IDWR MAX3222I
−40°C to 85°C
SSOP (DB)
Tube of 70 MAX3222IDB
MB3222I
−40°C to 85°CSSOP (DB) Reel of 2000 MAX3222IDBR MB3222I
TSSOP (PW)
Tube of 70 MAX3222IPW
MB3222I
TSSOP (PW)
Reel of 2000 MAX3222IPWR
MB3222I
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright 2004, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DB, DW, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
EN
C1+
V+
C1−
C2+
C2−
V−
DOUT2
RIN2
ROUT2
PWRDOWN
VCC
GND
DOUT1
RIN1
ROUT1
NC
DIN1
DIN2
NC
NC − No internal connection
!"#$ % &'!!($ #% )'*+&#$ ,#$(
!,'&$% &!" $ %)(&&#$% )(! $-( $(!"% (.#% %$!'"($%
%$#,#!, /#!!#$0 !,'&$ )!&(%%1 ,(% $ (&(%%#!+0 &+',(
$(%$1 #++ )#!#"($(!%
±
SLLS408G − JANUARY 2000 − REVISED MARCH 2004
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description/ordering information (continued)
The MAX3222 can be placed in the power-down mode by setting PWRDOWN low, which draws only 1 µA from
the power supply. When the device is powered down, the receivers remain active while the drivers are placed
in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to
VCC, and V− is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting
EN high. Function Tables
EACH DRIVER
INPUTS
OUTPUT
DIN PWRDOWN
OUTPUT
DOUT
X L Z
LHH
H H L
H = high level, L = low level, X = irrelevant,
Z = high impedance
EACH RECEIVER
INPUTS
OUTPUT
RIN EN
OUTPUT
ROUT
L L H
HLL
XHZ
Open L H
H = high level, L = low level, X = irrelevant,
Z = high impedance (off), Open = input
disconnected or connected driver off
logic diagram (positive logic)
DIN2 DOUT2
12 8
Powerdown
RIN1
16
20
15
PWRDOWN
ROUT1
DIN1 DOUT1
13 17
RIN2
910
ROUT2
1
EN
±
SLLS408G − JANUARY 2000 − REVISED MARCH 2004
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) −0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Positive output supply voltage range, V+ (see Note 1) −0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Negative output supply voltage range, V− (see Note 1) 0.3 V to −7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage difference, V+ − V− (see Note 1) 13 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI: Drivers, EN, PWRDOWN −0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receivers −25 V to 25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO: Drivers −13.2 V to 13.2 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receivers −0.3 V to VCC + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Notes 2 and 3): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to network GND.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4 and Figure 5)
MIN NOM MAX UNIT
Supply voltage
VCC = 3.3 V 3 3.3 3.6
V
Supply voltage VCC = 5 V 4.5 5 5.5 V
VIH
Driver and control high-level input voltage
DIN, EN, PWRDOWN
VCC = 3.3 V 2
V
VIH Driver and control high-level input voltage DIN, EN, PWRDOWN VCC = 5 V 2.4 V
VIL Driver and control low-level input voltage DIN, EN, PWRDOWN 0.8 V
VIDriver and control input voltage DIN, EN, PWRDOWN 0 5.5 V
VIReceiver input voltage −25 25 V
TA
Operating free-air temperature
MAX3222C 0 70
°C
T
A
Operating free-air temperature
MAX3222I −40 85 °
C
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ±0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ±0.5 V.
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 5)
PARAMETER TEST CONDITIONS MIN TYP‡MAX UNIT
IIInput leakage current (EN, PWRDOWN)±0.01 ±1µA
ICC
Supply current No load, PWRDOWN at VCC 0.3 1 mA
I
CC Supply current (powered off) No load, PWRDOWN at GND 1 10 µA
‡All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ±0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ±0.5 V.
±
SLLS408G − JANUARY 2000 − REVISED MARCH 2004
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 5)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VOH High-level output voltage DOUT at RL = 3 kΩ to GND, DIN = GND 5 5.4 V
VOL Low-level output voltage DOUT at RL = 3 kΩ to GND, DIN = VCC −5 −5.4 V
IIH High-level input current VI = VCC ±0.01 ±1µA
IIL Low-level input current VI at GND ±0.01 ±1µA
VCC = 3.6 V,
VO = 0 V
IOS
Short-circuit output current‡
V
CC
= 3.6 V, V
O
= 0 V
±35
±60
mA
IOS Short-circuit output current
‡
VCC = 5.5 V, VO = 0 V ±35 ±60 mA
roOutput resistance VCC, V+, and V− = 0 V, VO = ±2 V 300 10M Ω
Ioff
Output leakage current
PWRDOWN = GND,
VCC = 3 V to 3.6 V VO = ±12 V, ±25
µA
I
off
Output leakage current
PWRDOWN = GND,
VCC = 4.5 V to 5.5 V VO = ±10 V, ±25
µ
A
†All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
‡Short-circuit durations should be controlled to prevent exceeding the device absolute power-dissipation ratings, and not more than one output
should be shorted at a time.
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ±0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ±0.5 V.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 5)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
Maximum data rate
CL = 1000 pF,
RL = 3 k
Ω,
150
250
kbit/s
Maximum data rate
CL = 1000 pF,
One DOUT switching,
RL = 3 kΩ
,
See Figure 1 150 250 kbit/s
tsk(p) Pulse skew§CL = 150 pF to 2500 pF,
See Figure 2 RL = 3 kΩ to 7 kΩ,300 ns
SR(tr)
Slew rate, transition region
RL = 3 k
Ω
to 7 k
Ω
,
CL = 150 pF to 1000 pF 6 30
V/µs
SR(tr)
Slew rate, transition region
(See Figure 1)
RL = 3 kΩ to 7 kΩ,
VCC = 3.3 V CL = 150 pF to 2500 pF 4 30
V/
µ
s
†All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
§Pulse skew is defined as |tPLH − tPHL| of each channel of the same device.
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ±0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ±0.5 V.
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RECEIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 5)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VOH High-level output voltage IOH = −1 mA VCC − 0.6 V VCC − 0.1 V V
VOL Low-level output voltage IOL = 1.6 mA 0.4 V
VIT+
Positive-going input threshold voltage
VCC = 3.3 V 1.5 2.4
V
VIT+ Positive-going input threshold voltage VCC = 5 V 1.8 2.4 V
VIT−
Negative-going input threshold voltage
VCC = 3.3 V 0.6 1.2
V
VIT− Negative-going input threshold voltage VCC = 5 V 0.8 1.5 V
Vhys Input hysteresis (VIT+ − VIT−) 0.3 V
Ioff Output leakage current EN = VCC ±0.05 ±10 µA
riInput resistance VI = ±3 V to ±25 V 3 5 7 kΩ
†All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ±0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ±0.5 V.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
tPLH Propagation delay time, low- to high-level output CL = 150 pF, See Figure 3 300 ns
tPHL Propagation delay time, high- to low-level output CL= 150 pF, See Figure 3 300 ns
ten Output enable time CL= 150 pF, RL = 3 kΩ,
See Figure 4 200 ns
tdis Output disable time CL= 150 pF, RL = 3 kΩ,
See Figure 4 200 ns
tsk(p) Pulse skew‡See Figure 3 300 ns
†All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
‡Pulse skew is defined as |tPLH − tPHL| of each channel of the same device.
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ±0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ±0.5 V.
±
SLLS408G − JANUARY 2000 − REVISED MARCH 2004
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
50 Ω
TEST CIRCUIT VOLTAGE WAVEFORMS
−3 V
−3 V
3 V
3 V
0 V
3 V
1.5 V1.5 V
Output
Input
VOL
VOH
tTLH
Generator
(see Note B) RL
RS-232
Output
tTHL
CL
(see Note A)
SR(tr) +6V
tTHL or tTLH
3 V
PWRDOWN
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 1. Driver Slew Rate
50 Ω
TEST CIRCUIT VOLTAGE WAVEFORMS
0 V
3 V
Output
Input
VOL
VOH
tPLH
Generator
(see Note B) RL
3 V
PWRDOWN
RS-232
Output
tPHL
CL
(see Note A)
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, Z
O
= 50 Ω, 50% duty cycle, t
r
≤10 ns, t
f
≤ 10 ns.
50% 50%
1.5 V 1.5 V
Figure 2. Driver Pulse Skew
TEST CIRCUIT VOLTAGE WAVEFORMS
50 Ω
50%
50%
−3 V
3 V
1.5 V1.5 V
Output
Input
VOL
VOH
tPHL
Generator
(see Note B) tPLH
Output
EN
0 V
CL
(see Note A)
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 3. Receiver Propagation Delay Times
±
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
TEST CIRCUIT VOLTAGE WAVEFORMS
50 Ω
Generator
(see Note B)
3 V or 0 V
Output
VOL
VOH
tPZH
(S1 at GND)
tPLZ
(S1 at VCC)
tPHZ
S1 at GND)
tPZL
(S1 at VCC)
1.5 V1.5 V 3 V
0 V
50%
0.3 V
Output
Input
50%
0.3 V
EN
RL
S1
VCC GND
CL
(see Note A)
Output
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 4. Receiver Enable and Disable Times
±
SLLS408G − JANUARY 2000 − REVISED MARCH 2004
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
15
14
8
1
2
3
4
7
DIN1
PWRDOWN
NC
13
DOUT1
20
17
16
19
18
ROUT1
5
6
+
−
C3†
VCC
C2+
C1
C2
C1+
GND
V−
C1−
RIN1
C2−
+
−
CBYPASS
= 0.1 µF
V+
+
−
+
−
DOUT2
VCC C1 C2, C3, and C4
3.3 V " 0.3 V
5 V " 0.5 V
3 V to 5.5 V
0.1 µF
0.047 µF
0.1 µF 0.47 µF
0.33 µF
0.1 µF
VCC vs CAPACITOR VALUES
EN
C4+
−
9
10
Powerdown
12
11
DIN2
NC
RIN2
ROUT2
†C3 can be connected to VCC or GND.
NOTES: A. Resistor values shown are nominal.
B. NC − No internal connection
C. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be
connected as shown.
Figure 5. Typical Operating Circuit and Capacitor Values
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
MAX3222CDB ACTIVE SSOP DB 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CDBE4 ACTIVE SSOP DB 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CDBG4 ACTIVE SSOP DB 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CDBR ACTIVE SSOP DB 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CDBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CDBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CDW ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CDWE4 ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CDWG4 ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CDWR ACTIVE SOIC DW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CDWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CDWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CPW ACTIVE TSSOP PW 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CPWE4 ACTIVE TSSOP PW 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CPWG4 ACTIVE TSSOP PW 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CPWR ACTIVE TSSOP PW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CPWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222CPWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IDB ACTIVE SSOP DB 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IDBE4 ACTIVE SSOP DB 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IDBG4 ACTIVE SSOP DB 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IDBR ACTIVE SSOP DB 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IDBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IDBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IDW ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 18-Sep-2008
Addendum-Page 1
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
MAX3222IDWE4 ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IDWG4 ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IDWR ACTIVE SOIC DW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IDWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IDWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IPW ACTIVE TSSOP PW 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IPWE4 ACTIVE TSSOP PW 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IPWG4 ACTIVE TSSOP PW 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IPWR ACTIVE TSSOP PW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IPWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
MAX3222IPWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
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to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Sep-2008
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
MAX3222CDBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1
MAX3222CDWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
MAX3222CPWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
MAX3222IDBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1
MAX3222IDWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
MAX3222IPWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
MAX3222CDBR SSOP DB 20 2000 367.0 367.0 38.0
MAX3222CDWR SOIC DW 20 2000 367.0 367.0 45.0
MAX3222CPWR TSSOP PW 20 2000 367.0 367.0 38.0
MAX3222IDBR SSOP DB 20 2000 367.0 367.0 38.0
MAX3222IDWR SOIC DW 20 2000 367.0 367.0 45.0
MAX3222IPWR TSSOP PW 20 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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