DEMO MANUAL DC1795A LTC6950 1.4GHz Low Phase Noise, Low Jitter PLL with Clock Distribution Description Demonstration circuit 1795A features the LTC(R)6950, a 1.4GHz low phase noise, low jitter PLL with clock distribution. For ease of use, the DC1795A comes installed with a 100MHz reference and a 1GHz VCSO, voltage controlled SAW oscillator with sine wave output. All differential inputs and outputs have 0.5" spaced SMA connectors. The DC1795A has four AC coupled LVPECL outputs with 50 transmission lines making them suitable to drive 50 impedance instruments. The LVDS/CMOS output is DC coupled. The LTC6950's EZSyncTM function is made available via a turret and an SMA connector. Ribbon cable connection to DC590 LVDS/CMOS DC-coupled Outputs, SMA Stat Outputs, turrets For the evaluation of the LTC6950 with other VCOs and references, the DC1795A can be modified to accommodate different on-board or external components. It also allows the user the option of a passive or active loop filter. A DC590 USB serial controller board is used for SPI communication with the LTC6950, controlled by the supplied ClockWizardTM software. Design files for this circuit board are available at http://www.linear.com/demo/DC1795A L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and EZSync and ClockWizard are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. EZSyncTM SYNC Input, SMA & turret PECL0 AC Coupled Outputs, SMA PECL1 AC Coupled Outputs, SMA 3.3V DC Supply, BNC & turret 5V U4 (VCXO) DC Supply, turret External VCO Input, SMA PECL2 AC Coupled Outputs, SMA U3 (VCO) DC Supply, turret 5V DC Supply, BNC & turret External VCO Charge Pump Output, SMA and turret Active Loop Filter Op-amp (U2) DC Supply, turret Frequency Reference Input, SMA PECL3 AC Coupled Outputs, SMA Figure 1. DC1795A Connections dc1795af 1 DEMO MANUAL DC1795A Quick Start Procedure The DC1795A is easy to set up to evaluate the performance of the LTC6950. Follow the procedure below. Connect the DC590 to one of your computer's USB ports with the included USB cable. The DC590 and ClockWizard application are required to control the DC1795A through a personal computer (PC). ClockWizard Installation DC590 Configuration Place the DC590 jumpers in the following positions (refer to Figure 2): JP4: EE - Must be in the EN position. The ClockWizard software is used to communicate with the LTC6950. It uses the DC590 to translate between USB and SPI-compatible serial communications formats. It also includes advanced PLL design and simulation capabilities. The following are the ClockWizard system requirements: JP5: ISO - ON must be selected. * Windows Operating System: Windows XP, Windows 2003 Server, Windows Vista, Windows 7 JP5: SW - ON must be selected. * Microsoft .NET 3.5 SP1 or later JP6: VCCIO - 3.3V or 5V must be selected. This sets the SPI port to 3.3V or 5V operation. 3.3V operation is recommended. * Windows Installer 3.1 or later * Linear Technology's DC590 hardware J4, ribbon cable connection to the DC1795 J3, USB connection to PC JP4 jumper JP6 jumpers JP5 jumpers Figure 2. DC590 Jumper and Connector Locations 2 dc1795af DEMO MANUAL DC1795A Quick Start Procedure Download the ClockWizard setup file at www.linear.com/ ClockWizard. 2. Connect the DC590 to the DC1795A with the provided ribbon cable. Run the ClockWizard setup file and follow the instructions given on the screen. The setup file will verify and/or install Microsoft .NET and install the ClockWizard. Refer to the Help menu for software operation. 3. Run the ClockWizard application. DC1795A Configuration 1. Connect the GND, V+ = 3.15V to 3.45V, V+ to 5.25V and V+ VCXO turrets to a power supply and apply power (see Figure 1 and the Typical DC1795A Requirements and Characteristics table). 4. In ClockWizard, click File > Load Settings and point to the "LTC6950_PECL0_250MHz.clkset" file. The green "STAT1" LED on the DC1795A should turn on and the "STAT2" LED should turn off indicating that the loop is locked at 1000MHz. A 250MHz signal should be present on the PECL0 outputs. Be sure to power down or terminate any unused RF output with 50, or poor spurious performance may result. Figure 3. ClockWizard Screenshot dc1795af 3 DEMO MANUAL DC1795A Quick Start Procedure Troubleshooting If the green LED does not illuminate, follow the instructions below: 1. Verify that you are able to communicate with the DC1795A. The bottom status line in ClockWizard should read "LTC6950" and "Comm Enabled." 2. Verify that V+ = 3.15V to 3.45V, V+ to 5.25V and V+ VCXO turrets have the correct voltages on them (see the Typical DC1795A Requirements and Characteristics table). 3. Select "Status" Output = 2 in ClockWizard's System Tab. Click "Read All." See if the NO_VCO or NO_REF boxes in the second column are checked. a. If NO_REF is checked, verify the "V+ XO" test point voltage is set to 3.3V. Verify R73 is installed (0 ohm) b. IF NO_VCO is checked, verify the components between U4 and U1 match the default BOM. Contact the factory for further troubleshooting. DC1795A Reconfiguration The DC1795A allows the use of a variety of references, VCOs and active or passive loop filters. The following covers the hardware reconfiguration of the DC1795A. Refer to ClockWizard and the LTC6950 data sheet to better understand how to change programmed parameters on the DC1795A. LTC6950 CLKSET Files The ClockWizard provides three different clkset files for evaluation purposes. These files were made for the default bill of materials. If board modifications are made, these files or the loop filter may need to be modified for the LTC6950 to lock correctly. 1. LTC6950_PECL0_250MHz.clkset: Produces a 250MHz output on PECL0. All other outputs are powered down. 2. LTC6950_Figure16_250MHZ.clkset: Matches Figure 16 of the LTC6950 data sheet. To sync outputs, refer to the EZSync Function section. 3. LTC6950_ALL_CHAN_250MHz.clkset: Produces a 250MHz output on all five outputs. To sync outputs, refer to the EZSync Function section. 4 EZSync Function Apply a 1ms or longer high pulse to the SYNC SMA connector to take advantage of the EZSync function. Refer to the LTC6950 data sheet for SYNC timing and level requirements. LVPECL Output Options The DC1795A has four AC coupled LVPECL outputs. Internal biasing (IBIASx = H) is required with this default termination network. The DC1795A has options for pull down or series resistors to accommodate the other LVPECL termination networks described in the data sheet. LVDS/CMOS Output Options The LVDS/CMOS output is DC coupled without on-board termination by default. The DC1795A provides pull down, series and a differential termination resistor options to accommodate other termination networks described in the data sheet. dc1795af DEMO MANUAL DC1795A DC1795A Reconfiguration Reference Options Clock Follower Table 1 details the available reference options and board modifications for each available option. The CLKSET files described above assume the noise profile of the default reference. If a different reference is used, change the reference noise profile in ClockWizard before simulating the LTC6950 under the Loop Design tab. When using the LTC6950 as a clock follower the LTC6950's PLL circuitry can be powered down by setting the PDPLL bit in ClockWizard. This will reduce the LTC6950's overall power consumption. Table 2 describes how to reconfigure the board for a differential external input when using the LTC6950 as a clock follower. Refer to the EZSync Function section and to the data sheet for more details on using the LTC6950 as a clock follower. VCO Input Options Table 2 describes the available VCO input options. Board modifications and power requirements for each option are also provided in Table 2. There are two different oscillator footprints on the board: U3, which accommodates the popular 0.5" x 0.5" package, and U4, which accommodates another common 14mm x 9mm package with four or six pins. U4 also accommodates the smaller 5mm x 7.5mm package. An external connectorized VCO can also drive the LTC6950 through SMA connector J15. The CLKSET files described above assume the noise profile for the default VCO. If a different VCO is used, change the VCO noise profile in ClockWizard before simulating the LTC6950 under the Loop Design tab. Loop Filter Design and Installation Tables 3, 4 and 5 cross reference the loop filter options shown in ClockWizard's Loop Design tab with the DC1795A component reference designators. Table 3 is dedicated to the default oscillator, component U4. Table 4 is dedicated to another common oscillator footprint, component U3. Table 5 can be used with external oscillators. Use ClockWizard to select, design and simulate different loop filters. Some VCO tuning voltage ranges are greater than the LTC6950 charge pump voltage range (refer to the LTC6950 data sheet). In such cases, an active loop filter using an op amp can deliver the required tuning voltage. When satisfied with the loop filter design, use Tables 3, 4 and 5 to help identify which components should be modified. The loop filter components are located on the bottom side of the DC1795A. Table 1. Reference Options and Board Modifications DEFAULT OPTION l REFERENCE OPTION INSTALL DEPOPULATE LTC6950 PERFORMANCE U9 can accommodate any 5mm x 7.5mm or 9mm x 14mm oscillator package For improved performance connect J4 to a very low noise reference, such as the Wenzel 501-04517D On-Board NA NA Limited by on board reference at frequency offsets <10kHz External C67 0402 0.1F R73, C71 Best performance when using an ultralow noise external reference COMMENTS dc1795af 5 DEMO MANUAL DC1795A DC1795A Reconfiguration Table 2. VCO Input Options: Power Settings and Board Modifications BOARD MODIFICATIONS DEFAULT OPTION OSCILLATOR l OSCILLATOR POWER SETTINGS V+ OA V+ VXCO TURRET V+ VCO TURRET EN TURRET - Connects to pin 2 of U4. Not used with Default U4 Refer to Table 3: loop filter component selections for U4 INSTALL DEPOPULATE U4 NA (Default) NA (Default) U3 U3, *C38 0402 0 *R43 [For Active Filters Only] Determined by U3 VTUNE specification. Must be less than 24V - Determined by U3 VCC specification. Must be less than 24V - Refer to Table 4: loop filter component selections for U3 Single-Ended External *C25 0402 0 *R25, R40, R41 [For Active Filters Only] Determined by External Oscillator VTUNE specification, must be less than 24V - - - Connect signal to J15. Refer to Table 5: loop filter component selections. Differential External *C25, C26 0402 0 C69 0402 ~100pF *R25, R40, R41 [For Active Filters Only] Determined by External Oscillator VTUNE specification, must be less than 24V - - - Connect signals to J14 and J15. [For External Oscillator Only] Refer to Table 5: loop filter component selections. TURRET Determined [For Active Filters by U4 VCC Only] Determined by U4 VTUNE specification. specification. 5V for Default 5V for Default U4. Must be less than 24V U4. Must be less than 24V COMMENTS * General Recommendations: There are several termination and common mode options on the DC1795A for different input signal types. Refer to the DC1795A schematic, the LTC6950 data sheet and the data sheet for the VCO or clock distribution component used for an optimum termination network. Table 3. Loop Filter Selection for U4 Oscillator (Refer to ClockWizard's Loop Design Tab) CLOCKWIZARD AND BOM CROSS REFERENCE OTHER MODIFICATIONS DEFAULT OPTION LOOP FILTER TYPE RZ CI CP R1 C2 L1 INSTALL DEPOPULATE COMMENTS l Filter 1 (Passive) RZ_P CI1_P + CI2_P CP_P - - - - - RZ_P, CI1_P, CI2_P, CP_P populated with default values Filter 2 (Passive) RZ_P CI1_P + CI2_P CP_P R12 C22 - - - Filter 3 (Passive) RZ_P CI1_P + CI2_P CP_P R72 C22 R12 - - Filter 4 (Active) RZ_A CI1_A + CI2_A CP_A R12 C22 - R69, R71 (0402 0) R70, R72 Select CPINV under the ClockWizard System tab Table 4. Loop Filter Selection for U3 Oscillator (Refer to ClockWizard's Loop Design Tab) CLOCKWIZARD AND BOM CROSS REFERENCE DEFAULT OPTION LOOP FILTER TYPE RZ CI CP R1 6 OTHER MODIFICATIONS C2 L1 INSTALL DEPOPULATE Filter 1 (Passive) RZ_P CI1_P + CI2_P CP_P - - - R18 (0402 0) R12 Filter 2 (Passive) RZ_P CI1_P + CI2_P CP_P R18 C29 - Filter 3 (Passive) RZ_P CI1_P + CI2_P CP_P R72 C29 R18 - R12 Filter 4 (Active) RZ_A CI1_A + CI2_A CP_A R18 C29 - R69, R71 (0402 0) R12, R70, R72 COMMENTS R12 Select CPINV under the ClockWizard System tab dc1795af DEMO MANUAL DC1795A DC1795A Reconfiguration Table 5. Loop Filter Selection for External Oscillator (Refer to ClockWizard's Loop Design Tab) DEFAULT OPTION CLOCKWIZARD AND BOM CROSS REFERENCE OTHER MODIFICATIONS LOOP FILTER TYPE RZ CI CP INSTALL DEPOPULATE COMMENTS Filter 1 (Passive) RZ_P CI1_P + CI2_P CP_P R68 (0402 0) R72 Connect CPOUT turret to VTUNE of external oscillator Filter 4 (Active) RZ_A CI1_A + CI2_A CP_A R67, R69 (0402 0) R70, R72 Select CPINV under the ClockWizard System tab. Connect CPOUT turret to VTUNE of external oscillator Typical DC1795A Requirements and Characteristics PARAMETER INPUT OR OUTPUT PHYSICAL LOCATION 3.3V Power Supply Input J2 BNC connector, or V+ = 3.15V to 3.45V turret Charge Pump Power Supply Input J1 BNC connector, or V+ to 5.25V turret VCXO/VCSO Power Supply Input V+ VCXO turret LVDS/CMOS+, LVDS/CMOS- Two Outputs J19 and J18 SMA connectors** DC coupled, 250MHz, (if enabled)*. Refer to LTC6950 data sheet for output levels for LVDS and CMOS option. PECL0+, PECL0- Two Outputs J17 and J16 SMA connectors** AC coupled, 250MHz, 800mVP differential*. Must have LTC6950's IBIAS0 = H with default BOM. DC1795A has options for an external pull down resistor if IBIAS0 = L. PECL1+, PECL1- Two Outputs J13 and J12 SMA connectors** PECL2+, PECL2- Two Outputs J8 and J7 SMA connectors** PECL3+, PECL3- AC coupled, 250MHz, 800mVP differential (if enabled)*. Must have LTC6950's IBIASX = H with default BOM. DC1795A has options for an external pull down resistor if IBIASX = L. Two Outputs J11 and J10 SMA connectors** SYNC Input SYNC turret or J9 SMA connector STAT1, STAT2 Output STAT1 and STAT2 turret Loop Bandwidth VCO Power Supply Active Loop Filter Supply - DETAILS Low-noise and spur-free 3.3V, 500mA default (200mA configured*). Powers LTC6950, U6, U7, U8 and U9 Low-noise and spur-free 5V, 35mA*. Powers LTC6950 and provides common mode to U2 Low-noise and spur-free 5V, 20mA*. Powers U4 EZSync, 0V to 3.3V control signal, refer to the data sheet STAT1 GREEN LED, if ON LTC6950 is locked*. STAT2 RED LED, if ON indicates issue*. Refer to the troubleshooting section and data sheet Set by loop filter component values 4.2kHz* Input V+ VCO turret Board Modifications required for use, see Table 2 Input V+ OA turret Board Modifications required for use, see Table 2 REF, External Reference Input J4 SMA connector VCO+, VCO-, External VCO or Input for clock distribution Input J14 and J15 SMA connectors CPOUT Output CPOUT Turret Board Modifications required for use, see Table 1 Board Modifications required to use External VCO. See Tables 2 and 5. Clock Distribution, see Table 2 only Used with External VCO, connect to external VCO's VTUNE voltage * These values are for the "LTC6950_PECL0_250MHz" file and the default on board VCO and Reference. ** Any unused RF output must be powered down or terminated with 50, or poor spurious performance may result. dc1795af 7 DEMO MANUAL DC1795A Layout Top Layer 8 dc1795af DEMO MANUAL DC1795A Parts List ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER 1 2 0 CI1_A, C22, C29, CP_A CAP., 0603 OPT 1 CI1_P CAP., X7R, 0.1F, 25V, 10%, 0603 AVX, 06033C104KAT2A 3 0 CI2_A CAP., 1206 OPT 4 1 CI2_P CAP., X7R, 0.56F, 25V, 10%, 1206 AVX, 12063C564KAT2A 5 1 CP_P CAP., X7R, 0.056F, 16V, 10%, 0603 AVX, 0603YC563KAT2A 6 3 C1, C3, C7 CAP., TANT, 47F, 20V, 20%, 7343 AVX, TAJD476M020HNJ 7 2 C2, C8 CAP., X7R, 1F, 10V, 10%, 0603 AVX, 0603ZC105KAT2A 8 20 C4, C9-C19, C42-C48, C60 CAP., X7R, 0.01F, 6.3V, 10%, 0201 AVX, 02016C103KAT2A 9 3 C5, C24, C32 CAP., X7R, 0.1F, 50V, 10%, 0805 AVX, 08055C104KAT2A 10 29 C6, C28, C31, C33-C36, C39-C41, C49-C58, C61-C66, C71, C73, C74 CAP., X7R, 0.1F, 10V, 10%, 0402 AVX, 0402ZC104KAT2A 11 3 C23, C30, C59 CAP., TANT, 47F, 35V, 10%, 7361 AVX, TAJV476K035RNJ 12 0 C25-C27, C38, C67, C69, C70 CAP., 0402 OPT 13 2 C68, C72 CAP., NPO, 100pF, 25V, 10%, 0402 AVX, 04023A101KAT2A 14 1 D1 LED, GREEN, LED-ROHM-SML-010FT ROHM, SML-010FTT86L 15 1 D2 LED, RED, LED-ROHM-SML-010VT ROHM, SML-010VTT86L 16 15 E1-E11, E16, E17, E20, E21 TURRET, TESTPOINT 0.064" MILL-MAX, 2308-2-00-80-00-00-07-0 17 2 J1, J2 CONN, BNC, 5 PINS CONNEX, 112404 18 2 J3, J9 CONN., SMA 50 STRAIGHT MOUNT CONNEX, 132134 19 13 J4, J7, J8, J10-J19 CONN., SMA 50 EDGE-LAUNCH EMERSON, 142-0701-851 20 1 J5 CONN., HEADER, 14 PIN, 2mm MOLEX, 87831-1420 21 1 RZ_P RES., CHIP, 196, 1/16W, 1%, 0603 VISHAY, CRCW0603196RFKEA 22 5 R1, R2, R4, R5, R10 RES., CHIP, 4.99k, 1/16W, 1% 0402 VISHAY, CRCW04024K99FKED 23 0 R6, R9, R17, R19, R21-R24, R26, R30-R33, R36, R38, R42, R46, R52, R57, R60, R61 RES., 0402 OPT 24 4 R7, R16, R28, R29 RES., CHIP, 49.9, 1/16W, 1% 0402 VISHAY, CRCW040249R9FKED 25 15 R8, R43, R44, R55, R56, R62-R66, R74-R78 RES., CHIP, 0, 0402 VISHAY, CRCW04020000Z0ED 26 5 R11, R12, R70, R72, R73 RES., CHIP, 0, 0603 YAGEO, RC0603JR-070RL 27 5 R13-R15, R35, R58 RES., CHIP, 200K, 1/16W, 1% 0402 VISHAY, CRCW0402200KFKED 2rls 28 0 R18, R67-R69, R71, RZ_A, R53 RES., 0603 OPT 29 5 R20, R51, R54, R59, R79 RES., CHIP, 100, 1/16W, 1% 0402 NIC, NRC04F1000TRF 30 2 R25, R40 RES., CHIP, 150, 1/16W, 1% 0402 VISHAY, CRCW0402150RFKED 31 2 R37, R39 RES., CHIP, 330, 1/16W, 1% 0402 VISHAY, CRCW0402330RFKED 32 1 R41 RES., CHIP, 37.4, 1/16W, 1% 0402 VISHAY, CRCW040237R4FKED 33 1 U1 I.C. LTC6950IUHH, QFN48UHH-5X9 LINEAR TECH., LTC6950IUHH#PBF 34 1 U2 I.C. LT1678IS8, SO8 LINEAR TECH., LT1678IS8#PBF 35 0 U3 VCO, 0.5" x 0.5" OPT 36 1 U4 VCSO, 1GHz 5V CRYSTEK, CVCSO-914-1000.000 37 1 U5 I.C., SERIAL EEPROM, TSSOP8 MICROCHIP, 24LC025-I /ST 38 2 U6, U7 I.C., DUAL BUFFER, SC70-6 FAIRCHILD SEMI., NC7WZ17P6X 39 1 U8 I.C., DUAL TRANSCEIVER, SOT363 NXP, 74LVC1T45GW 40 1 U9 CLOCK OSCILLATOR, 100MHz, 3.3V CRYSTEK, CCHD-575-25-100.000 dc1795af 9 1 2 3 E2 E7 J3 E4 E16 E17 J15 E8 E5 E6 J14 J9 E9 E10 V+OA V+VCO V+VCXO OPT R30 3 2 1 0805 OPT R32 GND GND RFOUT GND 0.1uF 12 11 10 9 C38 C22 OPT C30 35V 7361 47uF 0805 C5 0.1uF 0603 + 1. ALL RESISTORS ARE IN OHMS, 0402 2. ALL CAPACITORS ARE IN MICROFARADS, 0402 A R43 OPT 4 5 6 OPT 0 V+VCXO R44 OPT 0805 C23 47uF 35V 7361 C24 C25 OUT+ OUT- VCC 47uF 7361 0.1uF CVCSO-914-1000 GND EN VTUNE U4 C59 35V C32 C26 0 U3 OPT OUTB -INB U2 V+ B A 1 2 3 4 OUTA -INA +INA V- B * 1 2 3 4 0603 R12 GND VTUNE GND GND LT1678IS8 OPT 0603 +INB V+OA 8 7 6 5 R67 150 R25 R36 OPT 37.4 OPT R41 OPT 0603 R68 V+VCO OPT R26 C27 B 0 R72 0 0603 100pF OPT C3 20V R1 C6 47uF 7343 4.99K 0.1uF 0603 1206 CI1_A OPT CI2_A R71 OPT 0603 R18 OPT 0603 C29 OPT 0603 R29 49.9 R28 49.9 R37 330 CS SDO SCLK SDI 0.1uF C28 C40 R69 OPT 0603 R70 0 0603 CP_P 0.056uF 0603 0.1uF R2 4.99K V+CP 0603 0603 CP_A OPT RZ_A OPT RZ_P 196 0603 0603 CI1_P 0.1uF 1206 CI2_P 0.56uF R35 200K SML-010MT SML-010VT D1 GRN D2 RED R39 330 C CP V+CP V+ C THE LAYOUT FOOTPRINT FOR U4 AND U9 ACCEPTS MOST OSCILLATORS IN 9mm X 14mm OR 5mm X 7.5mm PACKAGES WITH EITHER FOUR OR SIX PINS. R40 150 C68 100pF C72 R38 OPT C69 OPT + NOTE: UNLESS OTHERWISE SPECIFIED V+OA GND CPOUT CPOUT V+VCO GND VCO- EN V+VCXO GND VCO+ SYNC SYNC STAT1 (LOK) STAT2 (ERR) 8 1 2 4 6 1 2 E11 7 GND GND 13 GND 5 GND GND 15 VCC 14 GND GND 16 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 CP V+CP GND V+ V+VCO VCO- VCO+ V+VCO V+ GND SYNC STAT1 STAT2 SDI SCLK V+ 21 R56 0 U1 LTC6950IUHH V+ V+P3 PECL3- PECL3+ V+P3 V+P2 PECL2- PECL2+ V+P2 V+P1 PECL1- PECL1+ V+P1 V+P0 PECL0- PECL0+ V+P0 OPT R53 CUSTOMER NOTICE 0.1uF C57 0.1uF C58 V+ OPT R42 OPT R46 OPT 1 2 3 4 D THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. OPT R19 OPT 100 OPT OPT OPT SCALE = NONE 6 5 4 R17 OPT APPROVED J12 J13 J16 J17 J18 J19 VTUNE 1 2 3 EN-XO DATE: N/A SIZE LTC6950IUHH E DEMO CIRCUIT 1795A 03/24/2014, 05:07 PM IC NO. SHEET 1 2 OF 2 REV. 1.4 GHZ LOW PHASE NOISE, LOW JITTER PLL WITH CLOCK DISTRIBUTION 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only C66 0.1uF CCHD-575-25-100 VCC GND REF PECL3- PECL3+ PECL2- PECL2+ PECL1- PECL1+ PECL0- PECL0+ LVDS/CMOS- LVDS/CMOS+ EN J4 J10 J11 J7 J8 DATE MICHEL A. 03-24-14 OUT- OUT+ U9 0 TECHNOLOGY 0603 R73 0 V+XO R9 R23 R33 R20 KIM T. MICHEL A. TITLE: SCHEMATIC APPROVALS R7 49.9 C70 R16 0.1uF 49.9 OPT C71 R8 0 R21 OPT C49 0.1uF R64 OPT C50 0.1uF R65 0.1uF C51 0 R66 0 R22 OPT R24 0.1uF C52 0.1uF 0 R74 0 C53 0 R75 C54 0.1uF R76 0.1uF 0 R52 0.1uF C56 C55 0 R78 PRODUCTION R77 OPT 5 6 8 E DESCRIPTION REVISION HISTORY OPT R57 OPT R60 OPT R61 2 7 C67 __ REV R31 R6 OPT R55 0 0 0 R62 R63 ECO 9 10 11 12 13 14 15 16 D LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. 42 V+REF 43 REF44 SDO 23 CS 22 LV/CM+ 20 LV/CM- 19 V+ REF+ 45 GND 41 V+ 17 GND 18 V+ V+REF 46 V+ 47 GND 48 GND 49 + + * 10 * A 1 2 3 4 DEMO MANUAL DC1795A Schematic Diagram dc1795af Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 1 2 3 A GND V+ = 3.15V - 3.45V GND 20V + 7343 V+ 20V + 7343 1 V+ 2 5V 6 CS 4 SCK/SCL 7 MOSI/SDA 5 MISO 10 EEVCC 9 EESDA 11 EESCL 12 EEGND 14 AUX J5 HD2X7-079-MOLEX E20 J2 BNC E3 E21 J1 BNC C8 1.0uF 0603 C2 1.0uF 0603 C4 0.01uF 0201 C9 0.01uF 0201 WP R5 4.99K EEGND R4 4.99K SDO 6 5 7 3 2 1 SCL SDA WP A2 A1 A0 U5 24LC025-I /ST R10 4.99K V+DIG CS SCLK SDI DC590 SPI INTERFACE C7 47uF C1 47uF V+CP B NOTE: EEPROM FOR BOARD IDENTIFICATION 13 8 GND 3 GND GND 4 E1 ARRAY V+ TO 5.25V R11 0 0603 C31 0.1uF C10 0.01uF 0201 LTC6950 BYPASS AND BULK CAPACITORS B EEPROM 8 VCC GND 4 A R14 200K C13 0.01uF 0201 C43 0.01uF 0201 C41 0.1uF 3 2 1 5 2 C 5 GND DIR VCC(B) 4 5 6 V+ 0.1uF R15 200K C34 C35 0.1uF D SCALE = NONE SDO SDI SCLK CS C18 0.01uF 0201 C48 0.01uF 0201 C65 0.1uF C74 0.1uF 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only C19 0.01uF 0201 C60 0.01uF 0201 C73 0.1uF E DATE: N/A SIZE LTC6950IUHH E DEMO CIRCUIT 1795A 03/24/2014, 05:07 PM IC NO. SHEET 2 2 OF 2 REV. 1.4 GHZ LOW PHASE NOISE, LOW JITTER PLL WITH CLOCK DISTRIBUTION TECHNOLOGY C17 0.01uF 0201 C47 0.01uF 0201 C64 0.1uF 0.1uF R59 100 C36 R54 100 R51 100 C16 0.01uF 0201 C46 0.01uF 0201 C63 0.1uF MICHEL A. TITLE: SCHEMATIC KIM T. APPROVALS VCC(A) U8 74LVC1T45GW V+ VCC 4 GND 3 2 6 1 U7 NC7WZ17P6X 4 3 VCC 6 V+ C15 0.01uF 0201 1 GND D C45 0.01uF 0201 C62 0.1uF U6 NC7WZ17P6X C14 0.01uF 0201 C44 0.01uF 0201 C61 0.1uF THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. CUSTOMER NOTICE C33 0.1uF R13 200K R58 200K C12 0.01uF 0201 C42 0.01uF 0201 C39 0.1uF R79 100 V+ V+ V+ LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. C11 0.01uF 0201 C 1 2 3 4 DEMO MANUAL DC1795A Schematic Diagram Note: The buffers shown on sheet 2 of 2 of the schematic are used to protect the LTC6950 when connected to the DC590 before the LTC6950 is powered up. There is no need for such circuitry if the SPI bus is not active before powering up the LTC6950. The EEPROM is for identification and is not needed to program the LTC6950. dc1795af 11 DEMO MANUAL DC1795A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user's responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 Copyright (c) 2004, Linear Technology Corporation 12 Linear Technology Corporation dc1795af LT 0714 * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com LINEAR TECHNOLOGY CORPORATION 2014