SR1730ABA
+5/-5V 4/8-CHANNE L
MR READ/WRITE DEVICE
1
May, 2000
DESCRIPTION
The TI SR1730ABA is a BiCMOS monolithic
integrated circuit designed for use with four-terminal
Magneto-Resistive recording heads. The reader
architecture is MR current bias/voltage sense and
will support a user data rate of up to 500 Mbits/sec.
A read/write c ap abl e s eri al p or t is pr ov id ed t o e nable
the implementation of on-chip MR bias and Write
current DACs. The device provides a write driver,
low-noise read amplifier, serial port controlled head
selection, write current, MR read bias current and
read and wr ite fault detecti on circuitr y for u p to eight
channels. The device requires +5V and -5V and
comes in die form or in a 48-pin TQFP package.
FEATURES
•
••
• +5V ±
±±
±10%, -5V ±
±±
±10% supplies
•
••
• Designed for four-terminal MR heads with
minimum external components
•
••
• DC blocking capacitors int egrat ed on chip
•
••
• Truly differential current bias/voltage sense
MR read Amp
•
••
• MR head bias current range = 2.1 – 9.6 mA
(5-bit)
•
••
• MR read gain = 93 V/V and 137 V/V @ 45 Ω
ΩΩ
Ω
•
••
• MR read input noise = .70 nV/√
√√
√Hz @ 45 Ω
ΩΩ
Ω
•
••
• Read bandwidth = 300 MHz
•
••
• Differential PECL write data input, 3V logic
compatible
•
••
• Head voltage swing = 12 Vp-p
•
••
• Write current range = 15.8 - 63 mA (5-bit)
•
••
• Write current rise/fall time = 0.8 ns (Lh = 80
nH, Rh = 11 Ω,
Ω, Ω,
Ω, 50% boost)
•
••
• Servo bank write capability
•
••
• Read and write unsafe detection
•
••
• Thermal asperity detection and fast recovery
•
••
• Power supply fault protection
•
••
• Serial port controls head selection, write
current, MR read bias current
5/18/00