© Semiconductor Components Industries, LLC, 2006
August, 2006 Rev. 4
1Publication Order Number:
MTP3055VL/D
MTP3055VL
Preferred Device
Power MOSFET
12 Amps, 60 Volts, Logic
Level
NChannel TO220
This Power MOSFET is designed to withstand high energy in the
avalanche and commutation modes. Designed for low voltage, high
speed switching applications in power supplies, converters and power
motor controls, these devices are particularly well suited for bridge
circuits where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected voltage
transients.
Avalanche Energy Specified
IDSS and VDS(on) Specified at Elevated Temperature
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating Symbol Value Unit
DrainSource Voltage VDSS 60 Vdc
DrainGate Voltage (RGS = 1.0 MΩ) VDGR 60 Vdc
GateSource Voltage
Continuous
Single Pulse (tp 50 μs)
VGS
VGSM
±15
±20
Vdc
Vpk
Drain Current Continuous @ 25°C
Drain Current Continuous @ 100°C
Drain Current Single Pulse (tp 10 μs)
ID
ID
IDM
12
8.0
42
Adc
Apk
Total Power Dissipation @ 25°C
Derate above 25°C
PD48
0.32
Watts
W/°C
Operating and Storage Temperature
Range
TJ, Tstg 55 to
175
°C
Single Pulse DraintoSource Avalanche
Energy Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 5.0 Vdc,
IL = 12 Apk, L = 1.0 mH, RG =25 Ω)
EAS 72 mJ
Thermal Resistance
Junction to Case
Junction to Ambient
RθJC
RθJA
3.13
62.5
°C/W
Maximum Lead Temperature for Soldering
Purposes, 1/8 from case for 10
seconds
TL260 °C
12 AMPERES
60 VOLTS
RDS(on) = 180 mΩ
Preferred devices are recommended choices for future use
and best overall value.
Device Package Shipping
ORDERING INFORMATION
MTP3055VL TO220AB 50 Units/Rail
TO220AB
CASE 221A
STYLE 5
123
4
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NChannel
D
S
G
MARKING DIAGRAM
& PIN ASSIGNMENT
MTP3055VL = Device Code
LL = Location Code
Y = Year
WW = Work Week
MTP3055VL
LLYWW
1
Gate
3
Source
4
Drain
2
Drain
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ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
DrainSource Breakdown Voltage
(VGS = 0 Vdc, ID = 250 μAdc)
Temperature Coefficient (Positive)
V(BR)DSS
60
62
Vdc
mV/°C
Zero Gate Voltage Drain Current
(VDS = 60 Vdc, VGS = 0 Vdc)
(VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150°C)
IDSS
10
100
μAdc
GateBody Leakage Current (VGS = ±15 Vdc, VDS = 0) IGSS 100 nAdc
ON CHARACTERISTICS (Note 1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 μAdc)
Temperature Coefficient (Negative)
VGS(th)
1.0
1.6
3.0
2.0
Vdc
mV/°C
Static DrainSource OnResistance (VGS = 5.0 Vdc, ID = 6.0 Adc) RDS(on) 0.12 0.18 Ohm
DrainSource OnVoltage (VGS = 5.0 Vdc)
(ID = 12 Adc)
(ID = 6.0 Adc, TJ = 150°C)
VDS(on)
1.6
2.6
2.5
Vdc
Forward Transconductance (VDS = 8.0 Vdc, ID = 6.0 Adc) gFS 5.0 8.8 mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
Ciss 410 570 pF
Output Capacitance Coss 114 160
Reverse Transfer Capacitance Crss 21 40
SWITCHING CHARACTERISTICS (Note 2)
TurnOn Delay Time
(VDD = 30 Vdc, ID = 12 Adc,
VGS = 5.0 Vdc,
RG = 9.1 Ω)
td(on) 9.0 20 ns
Rise Time tr85 190
TurnOff Delay Time td(off) 14 30
Fall Time tf43 90
Gate Charge
(See Figure 8)
(VDS = 48 Vdc, ID = 12 Adc,
VGS = 5.0 Vdc)
QT8.1 10 nC
Q11.8
Q24.2
Q33.8
SOURCEDRAIN DIODE CHARACTERISTICS
Forward OnVoltage (Note 1) (IS = 12 Adc, VGS = 0 Vdc)
(IS = 12 Adc, VGS = 0 Vdc, TJ = 150°C)
VSD
0.97
0.86
1.3
Vdc
Reverse Recovery Time
(See Figure 14)
(IS = 12 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/μs)
trr 55.7 ns
ta37
tb18.7
Reverse Recovery Stored
Charge
QRR 0.116 μC
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from contact screw on tab to center of die)
(Measured from the drain lead 0.25 from package to center of die)
LD
3.5
4.5
nH
Internal Source Inductance
(Measured from the source lead 0.25 from package to source bond pad)
LS7.5 nH
1. Pulse Test: Pulse Width ≤300 μs, Duty Cycle 2%.
2. Switching characteristics are independent of operating junction temperature.
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TYPICAL ELECTRICAL CHARACTERISTICS
RDS(on), DRAIN−TO−SOURCE RESISTANCE (OHMS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
01 2 3 5
0
8
16
24
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. OnRegion Characteristics
ID, DRAIN CURRENT (AMPS)
2.0 3.0 4.0 5.0 6.0
0
4
8
16
24
ID, DRAIN CURRENT (AMPS)
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
0481216 24
0.02
0.14
0.26
0.32
RDS(on), DRAIN−TO−SOURCE RESISTANCE (OHMS)
0 4 12 16 20 24
0.07
0.12
0.17
0.22
0.27
ID, DRAIN CURRENT (AMPS)
Figure 3. OnResistance versus Drain Current
and Temperature
ID, DRAIN CURRENT (AMPS)
Figure 4. OnResistance versus Drain Current
and Gate Voltage
−50
0
0.5
1.0
1.5
01020 405060
0.1
100
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. OnResistance Variation with
Temperature
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 6. DrainToSource Leakage
Current versus Voltage
IDSS , LEAKAGE (nA)
−25 0 25 50 75 100 125 150
TJ = 25°CVGS = 10 V 5 V
4.5 V
3 V
2.5 V
3.5 V
VGS = 5 V
TJ = 100°C
25°C
−55°C
VDS 10 V TJ = −55°C
25°C100°C
TJ = 25°C
VGS = 10 V
5 V
VGS = 0 V
TJ = 125°C
4
12
20
4
12
20
20 8
30
4 V
2.5 3.5 4.5 5.5
0.20
0.08
1.0
10
2.0
VGS = 5 V
ID = 6 A
100°C
175
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POWER MOSFET SWITCHING
Switching behavior is most easily modeled and predicted
by recognizing that the power MOSFET is charge
controlled. The lengths of various switching intervals (Δt)
are determined by how fast the FET input capacitance can
be charged by current from the generator.
The published capacitance data is difficult to use for
calculating rise and fall because draingate capacitance
varies greatly with applied voltage. Accordingly, gate
charge data is used. In most cases, a satisfactory estimate of
average input current (IG(AV)) can be made from a
rudimentary analysis of the drive circuit so that
t = Q/IG(AV)
During the rise and fall time interval when switching a
resistive load, VGS remains virtually constant at a level
known as the plateau voltage, VSGP
. Therefore, rise and fall
times may be approximated by the following:
tr = Q2 x RG/(VGG VGSP)
tf = Q2 x RG/VGSP
where
VGG = the gate drive voltage, which varies from zero to VGG
RG = the gate drive resistance
and Q2 and VGSP are read from the gate charge curve.
During the turnon and turnoff delay times, gate current is
not constant. The simplest calculation uses appropriate
values from the capacitance curves in a standard equation for
voltage change in an RC network. The equations are:
td(on) = RG Ciss In [VGG/(VGG VGSP)]
td(off) = RG Ciss In (VGG/VGSP)
The capacitance (Ciss) is read from the capacitance curve at
a voltage corresponding to the offstate condition when
calculating td(on) and is read at a voltage corresponding to the
onstate when calculating td(off).
At high switching speeds, parasitic circuit elements
complicate the analysis. The inductance of the MOSFET
source lead, inside the package and in the circuit wiring
which is common to both the drain and gate current paths,
produces a voltage at the source which reduces the gate drive
current. The voltage is determined by Ldi/dt, but since di/dt
is a function of drain current, the mathematical solution is
complex. The MOSFET output capacitance also
complicates the mathematics. And finally, MOSFETs have
finite internal gate resistance which effectively adds to the
resistance of the driving source, but the internal resistance
is difficult to measure and, consequently, is not specified.
The resistive switching time variation versus gate
resistance (Figure 9) shows how typical switching
performance is affected by the parasitic circuit elements. If
the parasitics were not present, the slope of the curves would
maintain a value of unity regardless of the switching speed.
The circuit used to obtain the data is constructed to minimize
common inductance in the drain and gate circuit loops and
is believed readily achievable with board mounted
components. Most power electronic loads are inductive; the
data in the figure is taken with a resistive load, which
approximates an optimally snubbed inductive load. Power
MOSFETs may be safely operated into an inductive load;
however, snubbing reduces switching losses.
10 5 0 10 20 25
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
C, CAPACITANCE (pF)
Figure 7. Capacitance Variation
VGS VDS
1400
1000
600
0
Ciss
Coss
Crss
515
Crss
1200
800
400
200
VDS = 0 V VGS = 0 V
Ciss
TJ = 25°C
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VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
DRAINTOSOURCE DIODE CHARACTERISTICS
0.50 0.60 0.70 0.80 0.90
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 8. GateToSource and DrainToSource
Voltage versus Total Charge
IS, SOURCE CURRENT (AMPS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
RG, GATE RESISTANCE (OHMS)
1 10 100
t, TIME (ns)
VDD = 30 V
ID = 12 A
VGS = 5 V
TJ = 25°C
VGS = 0 V
TJ = 25°C
Figure 10. Diode Forward Voltage versus Current
0
QT, TOTAL CHARGE (nC)
246810
ID = 12 A
TJ = 25°C
0
6
8
10
12
1000
100
10
1
2
0
6
4
60
50
40
30
20
10
0
tf
td(off)
td(on)
tr
VGS
Q2
4
Q3
QT
Q1
VDS
2
0.55 0.65 0.75 0.85 0.95 1.0
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous draintosource voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (TC) of 25°C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal
ResistanceGeneral Data and Its Use.”
Switching between the offstate and the onstate may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10 μs. In addition the total
power averaged over a complete switching cycle must not
exceed (TJ(MAX) TC)/(RθJC).
A Power MOSFET designated EFET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases nonlinearly with an
increase of peak current in avalanche and peak junction
temperature.
Although many EFETs can withstand the stress of
draintosource avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry
custom. The energy rating must be derated for temperature
as shown in the accompanying graph (Figure 12). Maximum
energy at currents below rated continuous ID can safely be
assumed to equal the values indicated.
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SAFE OPERATING AREA
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
0.1 1.0 100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
ID, DRAIN CURRENT (AMPS)
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
10
VGS = 5 V
SINGLE PULSE
TC = 25°C
t, TIME (s)
Figure 13. Thermal Response
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
RθJC(t) = r(t) RθJC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TC = P(pk) RθJC(t)
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
Figure 14. Diode Reverse Recovery Waveform
di/dt
trr
ta
tp
IS
0.25 IS
TIME
IS
tb
1.0
10
100
0.1
1.0
0.1
0.01
1.0E−05 1.0E−04 1.0E−03 1.0E−02 1.0E−01 1.0E+00 1.0E+01
0.2
D = 0.5
0.1
0.05
0.01
SINGLE PULSE
0.02
dc
100 μs
1 ms
10 ms
10 μs
TJ, STARTING JUNCTION TEMPERATURE (°C)
E
AS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
25 50 75 100 125
ID = 12 A
150
0
75
25
50
175
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PACKAGE DIMENSIONS
TO220 THREELEAD
TO220AB
CASE 221A09
ISSUE AA
STYLE 5:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.570 0.620 14.48 15.75
B0.380 0.405 9.66 10.28
C0.160 0.190 4.07 4.82
D0.025 0.035 0.64 0.88
F0.142 0.147 3.61 3.73
G0.095 0.105 2.42 2.66
H0.110 0.155 2.80 3.93
J0.018 0.025 0.46 0.64
K0.500 0.562 12.70 14.27
L0.045 0.060 1.15 1.52
N0.190 0.210 4.83 5.33
Q0.100 0.120 2.54 3.04
R0.080 0.110 2.04 2.79
S0.045 0.055 1.15 1.39
T0.235 0.255 5.97 6.47
U0.000 0.050 0.00 1.27
V0.045 −−− 1.15 −−−
Z−−− 0.080 −−− 2.04
B
Q
H
Z
L
V
G
N
A
K
F
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SEATING
PLANE
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MTP3055VL/D
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