© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice 1
CAT5114
32-Tap Digitally Programmable Potentiometer (DPP™)
Doc. No. 2007, Rev. M
APPLICATIONS
Automated product calibration
Remote control adjustments
Offset, gain and zero control
Tamper-proof calibrations
Contrast, brightness and volume controls
Motor controls and feedback systems
Programmable analog functions
FEATURES
32-position linear taper potentiometer
Non-volatile EEPROM wiper storage
10nA ultra-low standby current
Single supply operation: 2.5V-6.0V
Increment Up/Down serial interface
Resistance values: 10k
, 50k
and 100k
Available in PDIP, SOIC, TSSOP, MSOP and space
saving 2x3mm TDFN packages
new system values without effecting the stored
setting. Wiper-control of the CAT5114 is
accomplished with three input control pins, CS, U/D,
and INC. The INC input increments the wiper in the
direction which is determined by the logic state of
the U/D input. The CS input is used to select the
device and also store the wiper position prior to
power down.
The digitally programmable potentiometer can be
used as a three-terminal resistive divider or as a
two-terminal variable resistor. DPPs bring variability and
programmability to a wide variety of applications
including control, parameter adjustments, and
signal processing.
FUNCTIONAL DIAGRAM
DESCRIPTION
The CAT5114 is a single digitally programmable
potentiometer (DPP™) designed as a electronic
replacement for mechanical potentiometers and trim
pots. Ideal for automated adjustments on high volume
production lines, they are also well suited for
applications where equipment requiring periodic
adjustment is either difficult to access or located in a
hazardous or remote environment.
The CAT5114 contains a 32-tap series resistor array
connected between two terminals RH and RL. An up/
down counter and decoder that are controlled by three
input pins, determines which tap is connected to the
wiper, RW. The wiper setting, stored in nonvolatile
memory, is not lost when the device is powered
down and is automatically reinstated when power
is returned. The wiper can be adjusted to test
GENERAL DETAILED ELECTRONIC POTENTIOMETER
IMPLEMENTATION
R
H
V
W
L
R
R
H
V
V
W
L
/
/
/
ONE
OF
THIRTY TWO
DECODER
31
30
29
28
2
1
0
TRANSFER
GATES RESISTOR
ARRAY
R
H
L
R
H
V
V
L
/
/
V
W
R
W
/
5-BIT
NONVOLATILE
MEMORY
STORE AND
RECALL
CONTROL
CIRCUITRY
U/D
INC
CS
Vcc
V
SS
5-BIT
UP/DOWN
COUNTER
(INC)
(U/D)
(CS)
Control
and
Memory
INCREMENT
UP/DOWN
DEVICE SELECT
Vcc
(Supply Voltage)
GENERAL
RH
V
W
L
R
R
H
V
V
W
L/
/
/
POR
GND
CAT5114
2
Doc. No. 2007, Rev. M © 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
RW: Wiper Potentiometer Terminal
RW is the wiper terminal of the potentiometer. Its position
on the resistor array is controlled by the control inputs,
INC, U/D and CS. Voltage applied to the RW terminal
cannot exceed the supply voltage, VCC or go below
ground, GND.
RL: Low End Potentiometer Terminal
RL is the low end terminal of the potentiometer. It is not
required that this terminal be connected to a potential
less than the RH terminal. Voltage applied to the RL
terminal cannot exceed the supply voltage, VCC or go
below ground, GND. RL and RH are electrically
interchangeable.
CSCS
CSCS
CS: Chip Select
The chip select input is used to activate the control input
of the CAT5114 and is active low. When in a high
state, activity on the INC and U/D inputs will not
affect or change the position of the wiper.
PIN DESCRIPTIONS
INCINC
INCINC
INC: Increment Control Input
The INC input moves the wiper in the up or down
direction determined by the condition of the U/D input.
U/DD
DD
D: Up/Down Control Input
The U/D input controls the direction of the wiper
movement. When in a high state and CS is low, any high-
to-low transition on INC will cause the wiper to move one
increment toward the RH terminal. When in a low state
and CS is low, any high-to-low transition on INC will
cause the wiper to move one increment towards the
RL terminal.
RH: High End Potentiometer Terminal
RH is the high end terminal of the potentiometer. It is not
required that this terminal be connected to a potential
greater than the RL terminal. Voltage applied to the RH
terminal cannot exceed the supply voltage, VCC or go
below ground, GND.
PIN FUNCTIONS
Pin Name Function
INC Increment Control
U/DUp/Down Control
RHPotentiometer High Terminal
GND Ground
RWPotentiometer Wiper Terminal
RLPotentiometer Low Terminal
CS Chip Select
VCC Supply Voltage
PIN CONFIGURATION
DIP Package (P, L, GL) TSSOP Package (U, Y, GY)
MSOP Package (R, Z, GZ)
CS
INC VCC
U/D
GND
RHRL
RW
1
2
3
4
8
7
6
5
INC
VCC
CS
U/D
GND
R
W
R
H
R
L
1
2
3
4
8
7
6
5
V
CC
R
R
GND
R
INC
U/DCS
W
L
H
1
2
3
4
8
7
6
5
SOIC Package (S, V, GV)
CS
INC VCC
U/D
GND
RHRL
RW
1
2
3
4
8
7
6
5
CS
VCC
INC
U/D
GND RL
RW
1
2
3
4
8
7
6
5
RH
TDFN Package (SP2, VP2, GP2)
Top View
CAT5114
3Doc. No. 2007, Rev. M
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
DEVICE OPERATION
The CAT5114 operates like a digitally controlled
potentiometer with RH and RL equivalent to the high
and low terminals and RW equivalent to the mechanical
potentiometer's wiper. There are 32 available tap posi-
tions including the resistor end points, RH and RL. There
are 31 resistor elements connected in series between
the RH and RL terminals. The wiper terminal is
connected to one of the 32 taps and controlled by three
inputs, INC, U/D and CS. These inputs control a five-bit
up/down counter whose output is decoded to select the
wiper position. The selected wiper position can be
stored in nonvolatile memory using the INC and
CS inputs.
With CS set LOW the CAT5114 is selected and will
respond to the U/D and INC inputs. HIGH to LOW
transitions on INC wil increment or decrement the
wiper (depending on the state of the U/D input and five-
bit counter). The wiper, when at either fixed terminal,
acts like its mechanical equivalent and does not move
beyond the last position. The value of the counter is
stored in nonvolatile memory whenever CS transitions
HIGH while the INC input is also HIGH. When the
CAT5114 is powered-down, the last stored wiper counter
position is maintained in the nonvolatile memory. When
power is restored, the contents of the memory are
recalled and the counter is set to the value stored.
With INC set low, the CAT5114 may be de-selected
and powered down without storing the current wiper
position in nonvolatile memory. This allows the
system to always power up to a preset value stored
in nonvolatile memory.
OPERATION MODES
RL
CL
CH
RH
CW
RW
Rwi
Potentiometer Equivalent Circuit
INC CS U/D Operation
High to Low Low High Wiper toward H
High to Low Low Low Wiper toward L
High Low to High X Store Wiper Position
Low Low to High X No Store, Return to Standby
X High X Standby
CAT5114
4
Doc. No. 2007, Rev. M © 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
RELIABILITY CHARACTERISTICS
Symbol Parameter Test Method Min Typ Max Units
VZAP(1) ESD Susceptibility MIL-STD-883, Test Method 3015 2000 Volts
ILTH(1)(2) Latch-Up JEDEC Standard 17 100 mA
TDR Data Retention MIL-STD-883, Test Method 1008 100 Years
NEND Endurance MIL-STD-883, Test Method 1003 1,000,000 Stores
Power Supply
Symbol Parameter Conditions Min Typ Max Units
VCC Operating Voltage Range 2.5 6.0 V
ICC1 Supply Current (Increment) VCC = 6V, f = 1MHz, IW=0 100 µA
VCC = 6V, f = 250kHz, IW=0 50
ICC2 Supply Current (Write) Programming, VCC = 6V 1 mA
VCC = 3V 500 µA
ISB1 (2) Supply Current (Standby) CS=VCC-0.3V 0.01 1 µA
U/D, INC=VCC-0.3V or GND
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
VCC to GND ......................................0.5V to +7V
Inputs
CS to GND .............................0.5V to VCC +0.5V
INC to GND ............................0.5V to VCC +0.5V
U/D to GND ............................0.5V to VCC +0.5V
H to GND................................0.5V to VCC +0.5V
L to GND ................................0.5V to VCC +0.5V
W to GND ...............................0.5V to VCC +0.5V
Operating Ambient Temperature
Commercial (C or Blank suffix) ...... 0°C to +70°C
Industrial (I suffix)...................... 40°C to +85°C
Junction Temperature ..................................... +150°C
Storage Temperature ....................... 65°C to +150°C
Lead Soldering (10 sec max) .......................... +300°C
* Stresses above those listed under Absolute Maximum Ratings may
cause permanent damage to the device. Absolute Maximum Ratings
are limited values applied individually while other parameters are
within specified operating conditions, and functional operation at any
of these conditions is NOT implied. Device performance and reliability
may be impaired by exposure to absolute rating conditions for extended
periods of time.
NOTES: (1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) Latch-up protection is provided for stresses up to 100mA on address and data pins from 1V to VCC + 1V
(3) IW=source or sink
(4) These parameters are periodically sampled and are not 100% tested.
DC Electrical Characteristics: VCC = +2.5V to +6.0V unless otherwise specified
Symbol Parameter Conditions Min Typ Max Units
IIH Input Leakage Current VIN = VCC 10 µA
IIL Input Leakage Current VIN = 0V 10 µA
VIH1 TTL High Level Input Voltage 4.5V VCC 5.5V 2 VCC V
VIL1 TTL Low Level Input Voltage 0 0.8 V
VIH2 CMOS High Level Input Voltage 2.5V VCC 6V VCC x 0.7 VCC + 0.3 V
VIL2 CMOS Low Level Input Voltage -0.3 VCC x 0.2 V
Logic Inputs
CAT5114
5Doc. No. 2007, Rev. M
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Symbol Parameter Conditions Min Typ Max Units
-10 Device 10
RPOT Potentiometer Resistance -50 Device 50 k
-00 Device 100
RTOL Pot Resistance Tolerance ± 20 %
VRH Voltage on RH pin 0 VCC V
VRL Voltage on RL pin 0 VCC V
RES Resolution 3.2 %
INL Integral Linearity Error IW 2µA 0.5 1 LSB
DNL Differential Linearity Error IW 2µA 0.25 0.5 LSB
RWi Wiper Resistance VCC = 5V, IW = 1mA 400
VCC = 2.5V, IW = 1mA 1 k
IWWiper Current 1 mA
TCRPOT TC of Pot Resistance 300 ppm/oC
TCRATIO Ratiometric TC 20 ppm/oC
RISO Isolation Resistance TBD
VNNoise 100kHz / 1kHz 8/24 nV/Hz
CH/CL/CWPotentiometer Capacitances 8/8/25 pF
fc Frequency Response Passive Attenuator, 10k 1.7 MHz
Potentiometer Parameters
CAT5114
6
Doc. No. 2007, Rev. M © 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
VCC Range 2.5V VCC 6V
Input Pulse Levels 0.2VCC to 0.7VCC
Input Rise and Fall Times 10ns
Input Reference Levels 0.5VCC
AC CONDITIONS OF TEST
A. C. TIMING
(1) Typical values are for TA=25oC and nominal supply voltage.
(2) This parameter is periodically sampled and not 100% tested.
(3) MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position.
CS
INC
U/D
RW
t
CI
t
CYC
t
IL
MI(3)
90% 90%
10%
(store)
t
F
t
R
t
IW
tID
tDI
t
IH
t
CPH
t
IC
Symbol Parameter Min Typ(1) Max Units
tCI CS to INC Setup 100 ns
tDI U/D to INC Setup 50 ns
tID U/D to INC Hold 100 ns
tIL INC LOW Period 250 ns
tIH INC HIGH Period 250 ns
tIC INC Inactive to CS Inactive 1 µs
tCPH CS Deselect Time (NO STORE) 100 ns
tCPH CS Deselect Time (STORE) 10 ms
tIW INC to VOUT Change 1 5 µs
tCYC INC Cycle Time 1 µs
tR, tF(2) INC Input Rise and Fall Time 500 µs
tPU(2) Power-up to Wiper Stable 1 msec
tWR Store Cycle 5 10 ms
AC OPERATING CHARACTERISTICS:
VCC = +2.5V to +6.0V, VH = VCC, VL = 0V, unless otherwise specified
CAT5114
7Doc. No. 2007, Rev. M
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
APPLICATION INFORMATION
Potentiometer Configurations
(a) resistive divider (b) variable resistance (c) two-port
{
{
555
+5V
.01µF
8
3
5
21
4
6
}
}
57
RA
RB
R1
R2
pRPOT
(1-p)RPOT
C
.01µF,
.003µF
3
6
Applications
Programmable Instrumentation Amplifier Programmable Sq. Wave Oscillator (555)
+
+
+
V1
(-)
V2
(+)
R1R2
R2
R3
R3R4
VO
A3
R4+2.5V
10
1
A1
A2
2
3
4
5
6
7
8
9
11
+5V
DPP
CAT5114 CAT5114
+5V
28
1
7
4
CAT5114
+5V
28
1
7
4
+5V
28
1
7
4
+5V
28
1
7
4
CAT5114
6
5
3R3
10k
R2
820
11k
R16.8µF
V0 (REG)
GND
SD
VIN (UNREG)
SHUTDOWN
1µF
2952
FB 1.23V
VOUT
100k
.1
Programmable Voltage Regulator
+
+
+5V +5V
}
}
pR (1-p)R
2
27
7
4
4
33
+2.5V
A1
66
A2
1M330330
IS
10k
6
53
VO
LT1097
Programmable I to V convertor
CAT5114
8
Doc. No. 2007, Rev. M © 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
APPLICATION INFORMATION
+
+5V
VO
+2.5V
1F
C1
.001
A1
C2
4
7
2
3
R2
10k
R3
100k
R1
50k
.001 6
VS
+
+
+
+5V
CHI
CLO
IC3
CAT5114
6
5
3
VS+2.5V
0 < VS < 2.5V
OSC
IC2
74HC132
+5V
IC1
393
2
3
VLL R1
R2R3
VUL
2.5V < VO < 5V
VO
AI
IC4
6
5
+5V
1
7
10k 0.1µF
10k
Programmable Bandpass Filter
Automatic Gain Control
CAT5114
+5V
28
1
7
4
+5V
28
1
7
4
CAT5114
9Doc. No. 2007, Rev. M
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
8-PAD TDFN 2 x 3 mm PACKAGE (SP2, VP2, GP2)
0.08C
DAP SIZE 1.7 X 2.1
C0.35
1.50 + 0.10
0.30 + 0.10 (8X)
0.50 TYP. (6X)
1.50 REF. (2X)
0.25 + 0.05 (8X)
8X 0.10 M CAB
4
1
1.85 + 0.10
0.0 - 0.05
0.10C
C
0.20 REF.
2.00 + 0.10
(S) 2X
2X0.15C
0.15C
PIN 1 INDEX AREA
8X
AB
3.00 + 0.10
(S)
NOTE:
1. ALL DIMENSIONS IN MM. ANGLES IN DEGREES.
2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMNALS. COPLANARITY SHALL NOT EXCEED 0.08 MM.
3. WARPAGE SHALL NOT EXCEED 0.10 MM.
4. PACKAGE LENGTH / PACKAGE WIDTH ARE NOT CONSIDERED AS SPECIAL CHARACTERISTIC.
0.75 + 0.05 MAX.
Top Marking
Device 1 2
CAT5114SP2-00 D D
CAT5114SP2-10 D E
CAT5114SP2-50 D G
CAT5114VP2-00 D H
CAT5114VP2-10 D J
CAT5114VP2-50 D K
123
456
78
Top Side Marking
CAT5114
10
Doc. No. 2007, Rev. M © 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
ORDERING INFORMATION
Notes:
(1) The device used in the above example is a CAT5114 SI-10TE13 (SOIC, 10K Ohms, Industrial Temperature, Tape & Reel)
Prefix Device # Suffix
5114
Product Number
CAT
Optional
Company ID
I-10
Resistance
-10: 10kohms
-50: 50kohms
-00: 100kohms
S
Package
P: PDIP
S: SOIC
U: TSSOP
R: MSOP
SP2: TDFN
L: PDIP (Lead free, Halogen free)
V: SOIC (Lead free, Halogen free)
Y: TSSOP (Lead free, Halogen free)
Z: MSOP (Lead free, Halogen free)
VP2: TDFN (Lead free, Halogen free)
GL: PDIP (Lead-free, Halogen-free, NiPdAu lead plating)
GV: SOIC, JEDEC (Lead-free, Halogen-free, NiPdAu lead plating)
GY: TSSOP (Lead-free, Halogen-free, NiPdAu lead plating)
GZ: MSOP (Lead-free, Halogen-free, NiPdAu lead plating)
GP2: TDFN (Lead-free, Halogen-free, NiPdAu lead plating)
TE13
Tape & Reel: TE13
SOIC: 2000/Reel
TSSOP: 2000/Reel
MSOP: 2500/Reel
Tape & Reel: TE7
TDFN: 2000/Reel
Catalyst Semiconductor, Inc.
Corporate Headquarters
1250 Borregas Avenue
Sunnyvale, CA 94089
Phone: 408.542.1000
Fax: 408.542.1200
www.caalyst-semiconductor.com
Copyrights, Trademarks and Patents
Trademarks and registered trademarks of Catalyst Semiconductor include each of the following:
DPP ™ AE2 MiniPot™
Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products. For a complete list of patents
issued to Catalyst Semiconductor contact the Company’s corporate office at 408.542.1000.
CATALYST SEMICONDUCTOR MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS
PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE
RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING
OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES.
Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or
other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a
situation where personal injury or death may occur.
Catalyst Semiconductor reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets
labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale.
Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate
typical semiconductor applications and may not be complete.
Publication #: 2007
Revison: M
Issue date: 07/28/05
REVISION HISTORY
Date Rev. Reason
10/9/2003 G Revised Features
Revised DC Electrical Characteristics
3/10/2004 H Update Potentiometer Parameters
3/29/2004 I Changed Green Package marking for SOIC from W to V
Updated Ordering Information (removed old 5112
references)
4/12/2004 J Updated Reel Ordering Information
8/31/2004 K Added TDFN package in all areas
04/08/2005 L Update Ordering Information
07/28/2005 M Update Pin Configuration
Application Information
Ordering Information