VCA810IDR - Texas Instruments High-Performance Analog

VCA810

+5V

-5V

VOUT

0 2V® -

- ®40dB +40dB Gain

VCA810

V+

V-

Gain

Adjust

VCA810

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SBOS275F –JUNE 2003–REVISED DECEMBER 2010

High Gain Adjust Range, Wideband,

VARIABLE GAIN AMPLIFIER

Check for Samples: VCA810

Operating from ±5V supplies, the gain control voltage

1FEATURES for the VCA810 will adjust the gain from –40dB at 0V

2• HIGH GAIN ADJUST RANGE: ±40dB input to +40dB at –2V input. Increasing the control

• DIFFERENTIAL IN/SINGLE-ENDED OUT voltage above ground will attenuate the signal path to

greater than 80dB. Signal bandwidth and slew rate

• LOW INPUT NOISE VOLTAGE: 2.4nV/√Hz remain constant over the entire gain adjust range.

• CONSTANT BANDWIDTH vs GAIN: 35MHz This 40dB/V gain control is accurate within ±1.5dB

• HIGH dB/V GAIN LINEARITY: ±0.3dB (±0.9dB for high grade), allowing the gain control

• GAIN CONTROL BANDWIDTH: 25MHz voltage in an AGC application to be used as a

Received Signal Strength Indicator (RSSI) with

• LOW OUTPUT DC ERROR: < ±40mV ±1.5dB accuracy.

• HIGH OUTPUT CURRENT: ±60mA Excellent common-mode rejection and

• LOW SUPPLY CURRENT: 24.8mA common-mode input range at the two

(max for −40°C to +85°C temperature range) high-impedance inputs allow the VCA810 to provide a

differential receiver operation with gain adjust. The

APPLICATIONS output signal is referenced to ground. Zero differential

• OPTICAL RECEIVER TIME GAIN CONTROL input voltage gives a 0V output with a small dc offset

error. Low input noise voltage ensures good output

• SONAR SYSTEMS SNR at the highest gain settings.

• VOLTAGE-TUNABLE ACTIVE FILTERS

• LOG AMPLIFIERS In applications where pulse edge information is

critical, and the VCA810 is being used to equalize

• PULSE AMPLITUDE COMPENSATION varying channel loss, minimal change in group delay

• AGC RECEIVERS WITH RSSI over gain setting will retain excellent pulse edge

• IMPROVED REPLACEMENT FOR VCA610 information.

An improved output stage provides adequate output

current to drive the most demanding loads. While

principally intended to drive analog-to-digital

converters (ADCs) or second-stage amplifiers, the

±60mA output current will easily drive

doubly-terminated 50Ωlines or a passive post-filter

stage over the ±1.7V output voltage range.

VCA810 RELATED PRODUCTS

GAIN

ADJUST INPUT SIGNAL

RANGE NOISE BANDWIDTH

SINGLES DUALS (dB) (nV/√Hz) (MHz)

VCA811 — 80 2.4 80

—VCA2612 45 1.25 80

—VCA2613 45 1 80

—VCA2614 45 3.6 40

DESCRIPTION —VCA2616 45 3.3 40

The VCA810 is a dc-coupled, wideband, continuously VCA2618 45 5.5 30

variable, voltage-controlled gain amplifier. It provides

a differential input to single-ended output conversion

with a high-impedance gain control input used to vary

the gain over a –40dB to +40dB range linear in dB/V.

1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Gain

Control,

-VS

+VS

-In

A(1)

VOUT

VCA810

GND

+In

NC(2)

VCA810

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ORDERING INFORMATION(1)

SPECIFIED

PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT

PRODUCT PACKAGE-LEAD DESIGNATOR RANGE MARKING NUMBER MEDIA, QUANTITY

VCA810ID Rails, 75

VCA810ID SO-8 D –40°C to +85°C VCA810 VCA810IDR Tape and Reel, 2500

VCA810AID Rails, 75

VCA810AID SO-8 D –40°C to +85°C VCA810A(2) VCA810AIDR Tape and Reel, 2500

(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the

device product folder at www.ti.com.

(2) The Aindicating high grade appears opposite the pin 1 marking indicator.

ABSOLUTE MAXIMUM RATINGS(1)

Over operating free-air temperature range, unless otherwise noted. VCA810 UNIT

Power supply ±6.5 V

Internal power dissipation See Thermal Analysis section

Differential input voltage ±VSV

Input common-mode voltage range ±VSV

Storage temperature range, D package –65 to +125 °C

Junction temperature (TJ) +150 °C

Human body model (HBM) 2000 V

ESD ratings Charge device model (CDM) 1500 V

Machine model 200 V

(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may

degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond

those specified is not implied.

PIN CONFIGURATIONS

D PACKAGE

SO-8

(TOP VIEW)

(1) High grade version indicator.

(2) NC = Not connected.

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SBOS275F –JUNE 2003–REVISED DECEMBER 2010

ELECTRICAL CHARACTERISTICS: VS= ±5V

Boldface limits are tested at +25°C.

At RL= 500Ω, and VIN = single-ended input on V+ with V−at ground,, unless otherwise noted.

VCA810

MIN/MAX OVER

TYP TEMPERATURE

0°C to –40°C to MIN/ TEST

PARAMETER CONDITIONS +25°C +25°C(2) +70°C(3) +85°C(3) UNITS MAX LEVEL(1)

AC PERFORMANCE

Small-signal bandwidth (see Figure 29)−2V ≤VC≤0V 35 30 29 29 MHz min B

Large-signal bandwidth VO= 2VPP,−2≤VC≤ −1 35 30 29 29 MHz min B

Frequency response peaking VO< 500mVPP,−2V ≤VC≤0V 0.1 0.5 0.5 0.5 dB min B

Slew rate VO= 3.5V Step, −2≤VC≤ −1, 10% to 90% 350 300 300 295 V/ms min B

Settling time to 0.01% VO= 1V Step, −2≤VC≤ −1 30 40 41 41 ns min B

Rise-and-fall time VO= 1V Step, −2≤VC≤ −1 10 12 12.1 12.1 ns min B

Group delay G = 0dB, VC=−1V, f = 5MHz, VO= 500mVPP 6.2 ns typ C

Group delay variation VO< 500mVPP,−2V ≤VC≤0V, f = 5MHz 3.5 ns typ C

Harmonic distortion

Second harmonic VO= 1VPP, f = 1MHz, VC=−1V, G = 0dB –71 –51 –50 –49 dBc min B

Third harmonic VO= 1VPP, f = 1MHz, VC=−1V, G = 0dB −35 –34 –32 –29 dBc min B

Input voltage noise VC=−2V 2.4 2.8 3.4 3.5 nV/√Hz max B

Input current noise −2V ≤VC≤0V 1.4 1.8 2.0 2.1 pA/√Hz max B

Fully attenuated feedthrough f ≤1MHz, VC> +200mV −80 −70 dB max B

Overdrive recovery VIN = 2V to 0V, VC=−2V, G = 40dB 100 150 ns min B

DC PERFORMANCE Single-ended or differential input

Output offset voltage (both inputs −2V ≤VC≤0V ±4 ±22 ±30 ±32 mV max A

grounded)(4)

Output offset voltage drift ±125 ±125 V/°C max B

Input offset voltage(4) Both inputs grounded ±0.1 ±0.25 ±0.30 ±0.35 mV max A

input offset voltage drift ±1 ±1.2 mV/°C max B

Input bias current −2V ≤VC≤0V −6–10 −12 −14 mA max A

Input bias current drift ±25 ±30 nA/°C max B

Input offset current −2V ≤VC≤0V ±100 ±600 ±700 ±800 nA max A

Input offset current drift ±1.4 ±2.2 nA/°C max B

INPUT

Common-mode input range ±2.4 ±2.3 ±2.3 ±2.2 V min A

Common-mode rejection ratio VCM = 0.5V, VC=−2V, Input-referred 95 85 83 80 dB min A

Input impedance VCM = 0V, Single-ended 1|| 1 MΩ|| pF typ C

VCM = 0V, Differential > 10 || < 2 MΩ|| pF typ C

Differential input range(5) VC= 0V, VCM = 0V 3 VPP typ C

OUTPUT

Voltage output swing VC=−2V, RL= 100Ω±1.8 ±1.7 ±1.4 ±1.3 V min A

VC=−2V, RL= 100Ω±1.7 ±1.6 ±1.3 ±1.2 V min A

Output current VO= 0V ±60 ±40 ±35 ±32 mA min A

Output short-circuit current VO= 0V ±120 mA typ C

Output impedance VO= 0V, f < 100kHz 0.2 Ωtyp C

(1) Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization

and simulation. (C) Typical value; only for information.

(2) Junction temperature = ambient for +25°C tested specifications.

(3) Junction temperature = ambient at low temperature limit; junction temperature = ambient +30°C at high temperature limit for over

temperature specifications.

(4) Total output offset is: (Output Offset Voltage ± Input Offset Voltage x Gain).

(5) Maximum input at minimum gain for < 1dB gain compression.

Product Folder Link(s): VCA810

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SBOS275F –JUNE 2003–REVISED DECEMBER 2010

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ELECTRICAL CHARACTERISTICS: VS= ±5V (continued)

Boldface limits are tested at +25°C.

At RL= 500Ω, and VIN = single-ended input on V+ with V−at ground,, unless otherwise noted.

VCA810

MIN/MAX OVER

TYP TEMPERATURE

0°C to –40°C to MIN/ TEST

PARAMETER CONDITIONS +25°C +25°C(2) +70°C(3) +85°C(3) UNITS MAX LEVEL(1)

GAIN CONTROL (VC, Pin 3) Single-ended or differential input

Specified gain range ΔVC/ΔdB = 25mV/dB ±40 dB typ C

Maximum control voltage G = −40dB 0 V typ C

Minimum control voltage G = +40dB –2 V typ C

Gain accuracy −1.8V ≤VC≤ −0.2V ±0.4 ±1.5 ±2.5 ±3.5 dB max A

VC<−1.8V, VC>−0.2V ±0.5 ±2.2 ±3.7 ±4.7 dB max A

Gain drift −1.8V ≤VC≤ −0.2V ±0.02 ±0.03 dB/°C max B

VC<−1.8V, VC>−0.2V ±0.03 ±0.04 dB/°C max B

Gain control slope –40 db/V typ C

Gain control linearity(6) −1.8V ≤VC≤0V ±0.3 ±1 ±1.1 ±1.2 dB max A

VC<−1.8V ±0.7 ±1.6 ±2.5 ±3.2 dB max A

Gain control bandwidth 25 20 19 19 MHz min B

Gain control slew rate 80dB Gain Step 900 dB/ns typ C

Gain settling time 1%, 80dB Step 0.8 ms typ C

Input bias current VC=−1V –1.5 –3.5 –4.5 –8 mA max A

Gain + Power-supply rejection ratio VC=−2V, G = +40dB, +VS= 5V ±0.5V 0.5 1.5 1.8 2 dB/V max A

Gain – Power-supply rejection ratio VC=−2V, G = +40dB, –VS= –5V ±0.5V 0.7 1.5 1.8 2 dB/V max A

POWER SUPPLY

Specified operating voltage ±5 V typ C

Minimum operating voltage ±4 ±4 ±4 V min A

Maximum operating voltage ±6 ±6 ±6 V max A

Positive supply quiescent current

Maximum quiescent current +VS= +5V, G = −40dB 10 12.5 12.6 12.7 mA min A

Minimum quiescent current +VS= +5V, G = −40dB 10 7.5 7.2 7.1 mA max A

Maximum quiescent current +VS= +5V, G = +40dB 18 20.5 22 22.3 mA min A

Minimum quiescent current +VS= +5V, G = +40dB 18 15.5 14.5 13.5 mA max A

Negative supply quiescent current(7)

Maximum quiescent current −VS=−5V, G = −40dB 12 14.5 14.6 14.7 mA max A

Minimum quiescent current −VS=−5V, G = −40dB 12 9.5 9.4 9.3 mA min A

Maximum quiescent current −VS=−5V, G = +40dB 20 22.5 24.5 24.8 mA max A

Minimum quiescent current −VS=−5V, G = +40dB 20 17.5 16.5 16 mA min A

Positive power-supply rejection ratio (+PSRR) Input-referred, VC=−2V 90 75 75 73 dB min A

Negative power-supply rejection ratio Input-referred, VC=−2V 85 70 70 68 dB min A

(–PSRR)

THERMAL CHARACTERISTICS

Specified operating range, ID package –40 to +85 °C typ C

Thermal resistance, qJA Junction-to-ambient

D SO-8 80 °C/W typ C

(6) Maximum deviation from best line fit.

(7) Magnitude.

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SBOS275F –JUNE 2003–REVISED DECEMBER 2010

HIGH GRADE DC SPECIFICATIONS: VS= ±5V (VCA810AID)

Boldface limits are tested at +25°C.

At RL= 500Ω, and VIN = single-ended input on V+ with V−at ground,, unless otherwise noted.

VCA810AID

MIN/MAX OVER

TYP TEMPERATURE

0°C to –40°C to MIN/ TEST

PARAMETER CONDITIONS +25°C +25°C(2) +70°C(3) +85°C(3) UNITS MAX LEVEL(1)

DC PERFORMANCE Single-ended or differential input

Output offset voltage −2V < VC< 0V ±4 ±14 ±24 ±26 mV max A

Input offset voltage ±0.1 ±0.2 ±0.25 ±0.3 mV max A

Input offset current ±100 ±500 ±600 ±700 mA max A

GAIN CONTROL (VC, Pin 3) Single-ended or differential input

Gain accuracy −1.8V ≤VC≤ −0.2V ±0.4 ±0.9 ±1.9 ±2.9 dB max A

VC<−1.8V, VC>−0.2V ±0.5 ±1.5 ±3.0 ±4.0 dB max A

Gain control linearity(4) −1.8V ≤VC≤0V ±0.3 ±0.6 ±0.7 ±0.8 dB max A

VC<−1.8V ±0.7 ±1.1 ±1.9 ±2.7 dB/V max A

POWER SUPPLY

Positive supply quiescent current

Maximum quiescent current +VS= +5V, G = −40dB 10 11.5 11.6 11.7 mA min A

Minimum quiescent current +VS= +5V, G = −40dB 10 8.5 8.2 8.1 mA max A

Maximum quiescent current +VS= +5V, G = +40dB 18 19.5 21 21.3 mA min A

Minimum quiescent current +VS= +5V, G = +40dB 18 16.5 15.5 14.5 mA max A

Negative supply quiescent current(5)

Maximum quiescent current −VS=−5V, G = −40dB 12 14 14.1 14.2 mA min A

Minimum quiescent current −VS=−5V, G = −40dB 12 10 9.9 9.8 mA max A

Maximum quiescent current −VS=−5V, G = +40dB 20 22 24 24.3 mA min A

Minimum quiescent current −VS=−5V, G = +40dB 20 18 17 16.5 mA max A

(1) Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization

and simulation. (C) Typical value; only for information.

(2) Junction temperature = ambient for +25°C tested specifications.

(3) Junction temperature = ambient at low temperature limit; junction temperature = ambient +30°C at high temperature limit for over

temperature specifications.

(4) Maximum deviation from best line fit.

(5) Magnitude.

Product Folder Link(s): VCA810

Gain (dB)

Frequency (MHz)

1 10 100 1000

V = 10mV , V = 1V

IN PP OUT PP

V = 100m ,V VV = 1

IN PP OUT PP

V = 1 ,V VV = 1

IN PP OUT PP

V = 2 , VV V= 200m

OUT PP IN PP

V = 2 , VV V= 20m

OUT PP IN PP

Frequency (MHz)

1 10 100

R = 500W

V = 1V-+ 10mV

C DC PP

18-

Gain (dB)

Time (20ns/div)

V = 2V

IN PP

G = 20dB-

G = 40dB-

Output Voltage (mV)

150

100

150-

Time (20ns/div)

V = 10mV

IN PP

G = +40dB

G = +20dB

Output Voltage (V)

0.6

0.4

0.2

0.4

0.6

1.2

1.0

0.8

0.6

0.4

0.2

0.2-

Output Voltage (V)

Time (20ns/div)

G = 0dB to 40dB, V = 1V-IN DC

G = 0dB to +40dB, V = 10mV

IN DC

100

Gain (dB)

Control Voltage, V (V)

0.5 0 -0.5 -1.0 -2.0-1.5 -2.5

Specified Operating Range

Output Disabled for

+0.15V V£ £ +2V

VCA810

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

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TYPICAL CHARACTERISTICS: VS= ±5V

At RL= 500Ωand VIN = single-ended input on V+ with V−at ground, unless otherwise noted.

SMALL−SIGNAL FREQUENCY RESPONSE GAIN CONTROL FREQUENCY RESPONSE

Figure 1. Figure 2.

ATTENUATED PULSE RESPONSE HIGH GAIN PULSE RESPONSE

Figure 3. Figure 4.

GAIN CONTROL PULSE RESPONSE GAIN vs CONTROL VOLTAGE

Figure 5. Figure 6.

Product Folder Link(s): VCA810

Frequency (MHz)

0.1 1 10

G = 0dB, Third Harmonic

G = +40dB, Third Harmonic

G = 0dB, Second Harmonic

G = +40dB, Second Harmonic

V = 1V

O PP

R = 500W

-30

Harmonic Distortion (dBc)

Load ( )W

100 1000

G = 0dB, Third Harmonic

G = +40dB, Third Harmonic

G = 0dB, Second Harmonic

G = +40dB, Second Harmonic

f = 1MHz

V = 1V

O PP

R = 500W

-20

Harmonic Distortion (dBc)

Output Voltage (V )

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

G = 0dB, Third Harmonic

G = +40dB, Second Harmonic

G = 0dB, Second Harmonic

G = +40dB, Third Harmonic

f = 1MHz

R = 500W

-20

100

Harmonic Distortion (dBc)

Gain (dB)

0 5 10 15 20 25 30 35 40

Third Harmonic

f = 1MHz

V = 1V

O PP

R = 500W

Second Harmonic

-20

Harmonic Distortion (dBc)

Gain (dB)

-40 -30 -20 -10 0 10 20 30 40

Max Useful

Input Voltage Range

Resulting

Output Voltage

Input and Output Measured at 1dB Compression

Resulting

Input Voltage

Max Useful

Output Voltage

Range

Input

Limited

Output

Limited

0.1

0.01

Input/Output Voltage (V )

Attenuation (dB)

-40 -35 -30 -25 -20 -15 -10 -5 0

f = 1MHz

V = 1V

IN PP

R = 500W

LThird Harmonic

Second Harmonic

-20

Harmonic Distortion (dBc)

VCA810

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SBOS275F –JUNE 2003–REVISED DECEMBER 2010

TYPICAL CHARACTERISTICS: VS= ±5V (continued)

At RL= 500Ωand VIN = single-ended input on V+ with V−at ground, unless otherwise noted.

HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs RLOAD

Figure 7. Figure 8.

HARMONIC DISTORTION vs OUTPUT VOLTAGE HARMONIC DISTORTION vs GAIN

Figure 9. Figure 10.

INPUT/OUTPUT RANGE vs GAIN HARMONIC DISTORTION vs ATTENUATION

Figure 11. Figure 12.

Product Folder Link(s): VCA810

Frequency (Hz)

100 1k 10k 100k 1M 10M

Current Noise (1.8pA/ Hz)Ö

Each Input

Differential Input

Voltage Noise (2.4nV/ Hz)Ö

e (nV/ )

nHz

i (pA/ )

nHz

Control Voltage (V)

0-0.2 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 -1.8 -2.0

Input-Referred Voltage Noise Density

Output-Referred Voltage Noise Density

R = 20W

on Each Input

10000

1000

100

e (nV/ )

nHz

e (nV/ )

OHz

Frequency (Hz)

1M 10M 100M

V = +0.1V

V = +0.2V

100

120

Isolation (dB)

Gain (dB)

-40 -30 -20 -10 0 10 20 30 40

Maximum Error Band

Typical Devices

50-

Output Offset Error (mV)

Control Voltage (V)

0-0.5 -1-1.5 -2

Deviation from 40dB/V Gain Slope-

0.4

0.3

0.2

0.1

0.2

0.3

0.4

0.5

Gain Error (dB)

Total Tested = 1462 G = +40dB

Output Offset Voltage (mV)

< 50-

< 45-

< 40-

< 35-

< 30-

< 25-

< 20-

< 15-

< 10-

< 5-

<10

<15

<20

<25

<30

<35

<40

<45

<50

>50

250

200

150

100

Count

VCA810

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

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TYPICAL CHARACTERISTICS: VS= ±5V (continued)

At RL= 500Ωand VIN = single-ended input on V+ with V−at ground, unless otherwise noted.

NOISE DENSITY vs CONTROL VOLTAGE INPUT VOLTAGE AND CURRENT NOISE

Figure 13. Figure 14.

OUTPUT OFFSET VOLTAGE

FULLY ATTENUATED ISOLATION vs FREQUENCY TOTAL ERROR BAND vs GAIN

Figure 15. Figure 16.

TYPICAL GAIN ERROR PLOT OUTPUT OFFSET VOLTAGE DISTRIBUTION

Figure 17. Figure 18.

Product Folder Link(s): VCA810

Gain (dB)

-40 -30 -20 -10 0 10 20 30 40

V = 1V

O PP

R = 500W

1MHz

5MHz

10MHz

Group Delay (ns)

Frequency (MHz)

1 10 100

V = 1V

O PP

R = 500W

G = 0dB

G = +40dB

Group Delay (ns)

Time (100ns/div)

VOUT

10x VIN

2.5

2.0

1.5

1.0

0.5

1.0

1.5

2.0

2.5-

Input/Output Voltage (V)

Time (100ns/div)

VOUT

VIN

200

25-

Input/Output Voltage (mV)

Gain (dB)

-40 -30 -20 -10 0 10 20 30 40

CMRR

PSRR

Input-Referred

110

100

CMRR (dB)

PSRR (dB)

110

100

CMRR (dB)

PSRR (dB)

Frequency (MHz)

0.1 1 10 100

PSRR, G = 0dB

CMRR,

G = 40dB±

PSRR,

G = +40dB

CMRR,

G = 0dB

VCA810

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SBOS275F –JUNE 2003–REVISED DECEMBER 2010

TYPICAL CHARACTERISTICS: VS= ±5V (continued)

At RL= 500Ωand VIN = single-ended input on V+ with V−at ground, unless otherwise noted.

GROUP DELAY vs GAIN GROUP DELAY vs FREQUENCY

Figure 19. Figure 20.

OVERDRIVE RECOVERY AT MAXIMUM GAIN OVERDRIVE RECOVERY AT MAXIMUM ATTENUATION

Figure 21. Figure 22.

COMMON−MODE REJECTION RATIO AND COMMON−MODE REJECTION RATIO AND

POWER−SUPPLY REJECTION RATIO vs GAIN POWER−SUPPLY REJECTION RATIO vs FREQUENCY

Figure 23. Figure 24.

Product Folder Link(s): VCA810

Frequency (Hz)

1k 10k 100k 1M 10M 100M

Gain (dB)

Frequency (Hz)

1k 10k 100k 1M 10M 100M

Input Bias and Offset Current ( A)m

Output Offset Voltage (mA)

Temperature ( C)°

-50 -25 250 50 10075 125

Output Offset Voltage (V )

Input Bias Current (I )

10x Input Offset Current (I )

Control Voltage (V)

0-0.5 -1.0 -1.5 -2.0

Quiescent Current

for V-S

Quiescent Current

for +VS

Supply Current (mA)

VCA810

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

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TYPICAL CHARACTERISTICS: VS= ±5V (continued)

At RL= 500Ωand VIN = single-ended input on V+ with V−at ground, unless otherwise noted.

GAIN CONTROL +PSRR AT MAX GAIN GAIN CONTROL −PSRR AT MAX GAIN

Figure 25. Figure 26.

TYPICAL DC DRIFT vs TEMPERATURE TYPICAL SUPPLY CURRENT vs CONTROL VOLTAGE

Figure 27. Figure 28.

Product Folder Link(s): VCA810

+5V

-5V

VOUT

0 2V® -

- ®40dB +40dB Gain

VCA810

V+

V-

Gain

Adjust

VCA810

+5V

25W

500W

0.1 Fm

6.8 Fm

-5V

0.1 Fm

6.8 Fm

50W

Source

G =

(V/V) 10-2(V + 1)

VCA810

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SBOS275F –JUNE 2003–REVISED DECEMBER 2010

APPLICATION INFORMATION

Thus, G(dB) varies linearly over the specified −40dB to

CIRCUIT DESCRIPTION +40dB range as VCvaries from 0V to −2V. Optionally,

making VCslightly positive (≥+0.15V) effectively

The VCA810 is a high gain adjust range, wideband, disables the amplifier, giving greater than 80dB of

voltage amplifier with a voltage-controlled gain, as signal path attenuation at low frequencies.

shown in Figure 29. The circuit’s basic voltage

amplifier responds to the control of an internal Internally, the gain-control circuit varies the amplifier

gain-control amplifier. At its input, the voltage gain by varying the transconductance, gm, of a bipolar

amplifier presents the high impedance of a differential transistor using the transistor bias current. Varying

stage, permitting flexible input impedance matching. the bias currents of differential stages varies gmto

To preserve termination options, no internal circuitry control the voltage gain of the VCA810. A gm-based

connects to the input bases of this differential stage. gain adjust normally suffers poor thermal stability.

For this reason, the user must provide dc paths for The VCA810 includes circuitry to minimize this effect.

the input base currents from a signal source, either

through a grounded termination resistor or by a direct VCA810 OPERATION

connection to ground. The differential input stage also

permits rejection of common-mode signals. At its Figure 30 shows the circuit configuration used as the

output, the voltage amplifier presents a low basis of the Electrical Characteristics and Typical

impedance, simplifying impedance matching. An Characteristics. Voltage swings reported in the

open-loop design produces wide bandwidth at all gain specifications are taken directly at the input and

settings. A ground-referenced differential to output pins. For test purposes, the input impedance is

single-ended conversion at the output retains the low set to 50Ωwith a resistance to ground. A 25Ω

output offset voltage. resistance (RT) is included on the V−input to get bias

current cancellation. Proper supply bypassing is

shown in Figure 30, and consists of two capacitors on

each supply pin: one large electrolytic capacitor

(2.2mF to 6.8mF), effective at lower frequencies, and

one small ceramic capacitor (0.1mF) for

high-frequency decoupling. For more information on

decoupling, refer to the Board Layout section.

Figure 29. Block Diagram of the VCA810

A gain control voltage, VC, controls the amplifier gain

magnitude through a high-speed control circuit. Gain

polarity can be either inverting or noninverting,

depending upon the amplifier input driven by the input

signal. The gain control circuit presents the high-input

impedance of a noninverting op amp connection. The

control voltage pin is referred to ground as shown in Figure 30. Variable Gain, Specification and Test

Figure 29. The control voltage VCvaries the amplifier Circuit

gain according to the exponential relationship:

Notice that both inverting and noninverting inputs are

connected to ground with a resistor (RSand RT).

This translates to the log gain relationship: Matching the dc source impedance looking out of

G(dB) = –40 ●(VC+ 1)dB. each input will minimize input offset voltage error.

Product Folder Link(s): VCA810

VCA810

20W

ADC

and DSP

-2V

Time-Gain Compensated Control Voltage

OPA657

-VB

20kW

VCA810

0.1 Fm

V-

VIN

OPA820

V = V

OUT PEAK R

1kWHP5082

50kW

2mV to 2V

100kHz

RSSI

Port

50kWCC

47pF

0.1 VDC

100W

Time (5 s/div)m

V = 10mV

IN PP

V = 100mV

IN PP

V = 1V

IN PP

0.15

0.10

0.05

0.10

0.15

0.20-

Output Voltage (50mV/div)

VCA810

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

www.ti.com

RANGE-FINDING TGC AMPLIFIER charging the holding capacitor. This charge drives the

capacitor voltage in a positive direction, reducing the

The block diagram in Figure 31 illustrates the amplifier gain. R3and the CHlargely determine the

fundamental configuration common to pulse-echo attack time of this AGC correction. Between gain

range finding systems. A photodiode preamp corrections, resistor R1charges the capacitor in a

provides an initial gain stage to the photodiode. negative direction, increasing the amplifier gain. R1,

R2, and CHdetermine the release time of this action.

Resistor R2forms a voltage divider with R1, limiting

the maximum negative voltage developed on CH. This

limit prevents input overload of the VCA810 gain

control circuit.

Figure 33 shows the AGC response for the values

shown in Figure 32.

Figure 31. Typical Range-Finding Application

The control voltage VCvaries the amplifier gain for a

basic signal-processing requirement: compensation

for distance attenuation effects, sometimes called

time-gain compensation (TGC). Time-gain Figure 32. 60dB Input Range AGC

compensation increases the amplifier gain as the

signal moves through the air to compensate for signal

attenuation. For this purpose, a ramp signal applied

to the VCA810 gain control input linearly increases

the dB gain of the VCA810 with time.

WIDE-RANGE AGC AMPLIFIER

The voltage-controlled gain feature of the VCA810

makes this amplifier ideal for precision AGC

applications with control ranges as large as 60dB.

The AGC circuit of Figure 32 adds an op amp and

diode for amplitude detection, a hold capacitor to

store the control voltage and resistors R1through R3

that determine attack and release times. Resistor R4

and capacitor CCphase-compensate the AGC

feedback loop. The op amp compares the positive

peaks of output VOwith a dc reference voltage, VR.Figure 33. AGC Output Voltage for 100kHz

Whenever a VOpeak exceeds VR, the OPA820 Sinewave at 10mVPP, 100mVPP, and 1VPP

output swings positive, forward-biasing the diode and

Product Folder Link(s): VCA810

f =

2 R CpW W

VCA810

1 Fm

V-

OPA820 VR

0.1 VDC

V = V

OPEAK R

1kWHP5082

50kW

CW1

4700pF

100W

50kW

RW1

300W

RW2

300W

CW2

4700pF

10pF

f = 1/2 R CpW1 W1

R = R

W1 W2

C = C

W1 W2

VCA810

www.ti.com

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

STABILIZED WEIN-BRIDGE OSCILLATOR magnitude of CWequals RW, and inspection of the

circuit shows that this condition produces a feedback

Adding Wein-bridge feedback to the above AGC factor of 1/3. Thus, self-sustaining oscillation requires

amplifier produces an amplitude-stabilized oscillator. a gain of three through the amplifier. The AGC

As Figure 34 shows, this alternative requires the circuitry establishes this gain level. Following initial

addition of just two resistors (RW1, RW2) and two circuit turn-on, R1begins charging CHnegative,

capacitors (CW1, CW2). increasing the amplifier gain from its minimum. When

this gain reaches three, oscillation begins at fW; the

Connecting the feedback network to the amplifier continued charging effect of R1makes the oscillation

noninverting input introduces positive feedback to amplitude grow. This growth continues until that

induce oscillation. The feedback factor displays a amplitude reaches a peak value equal to VR. Then,

frequency dependence due to the changing the AGC circuit counteracts the R1effect, controlling

impedances of the CWcapacitors. As frequency the peak amplitude at VRby holding the amplifier gain

increases, the decreasing impedance of the CW2 at a level of three. Making VRan ac signal, rather

capacitor increases the feedback factor. than a dc reference, produces amplitude modulation

Simultaneously, the decreasing impedance of the of the oscillator output.

CW1 capacitor decreases this factor. Analysis shows

that the maximum factor occurs at Hz,

making this the frequency most conducive to

oscillation. At this frequency, the impedance

Figure 34. Amplitude-Stabilized Oscillator

Product Folder Link(s): VCA810

G = 10-2(V + 1)

Output Voltage (V)

V /V

IN R Voltage Ratio

0.001 0.01 0.1 1 10 100

III

470W

VCA810

330W

VOL

-10mV

OPA820

VIN

V = GV-

OA R

50pF

100W

V = 1 +-1 + 0.5 Log( V /V )-

OL IN R

( )

VCR

10-2(V + 1)

V = V = V-

OA IN R ·

V =

R V

R + R

1 OL

1 2

V =

OL -1 + R

(

1 + 0.5 log·

·V

(

VCA810

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

www.ti.com

LOW-DRIFT WIDEBAND LOG AMP produces log-ratio operation. Either way, the log

term’s argument constrains the polarities of VRand

The VCA810 can be used to provide a 2.5MHz VIN. These two voltages must be of opposite polarities

(–3dB) log amp with low offset voltage and low gain to ensure a positive argument. This polarity

drift. The exponential gain-control characteristic of the combination results when VRconnects to the

VCA810 permits simple generation of a inverting input of the VCA810. Alternately, switching

temperature-compensated logarithmic response. VRto the amplifier noninverting input removes the

Enclosing the exponential function in an op-amp minus sign of the log term argument. Then, both

feedback path inverts this function, producing the log voltages must be of the same polarity in order to

response. Figure 35 shows the practical produce a positive argument. In either case, the

implementation of this technique. A dc reference positive polarity requirement of the argument restricts

voltage, VR, sets the VCA810 inverting input voltage. VIN to a unipolar range. Figure 36 illustrates these

This configuration makes the amplifier output voltage constraints.

VOA =−GVR, where .

Figure 36. Test Result for LOG Amp for VR=

−100mV

Figure 35. Temperature-Compensated Log

Response The above VOL expression reflects a circuit gain

introduced by the presence of R1and R2. This feature

A second input voltage also influences VOA through adds a convenient scaling control to the circuit.

control of gain G. The feedback op amp forces VOA to However, a practical matter sets a minimum level for

equal the input voltage VIN connected at the op amp this gain. The voltage divider formed by R1and R2

inverting input. Any difference between these two attenuates the voltage supplied to the VCterminal by

signals drops across R3, producing a feedback the op amp. This attenuation must be great enough to

current that charges CC. The resulting change in VOL prevent any possibility of an overload voltage at the

adjusts the gain of the VCA810 to change VOA.VCterminal. Such an overload saturates the VCA810

At equilibrium: gain-control circuitry, reducing the amplifier’s gain.

For the feedback connection of Figure 35, this

(1) overload condition permits a circuit latch. To prevent

this, choose R1and R2to ensure that the op amp

The op amp forces this equality by supplying the gain cannot possibly deliver a more negative input than

−2.5V to the VCterminal.

control voltage, . Figure 36 exhibits three zones of operation described

Combining the last two expressions and solving for below:

VOL yields the circuit’s logarithmic response: Zone I: VC> 0V. The VCA810 is operating in full

attenuation (−80dB). The noninverting input of the

OPA820 will see ∼0V. VOL is going to be the

(2) integration of the input signal.

An examination of this result illustrates several circuit Zone II: −2V < VC< 0V. The VCA810 is in its normal

characteristics. First, the argument of the log term, operating mode, creating the log relationship in

−VIN/VR, reveals an option and a constraint. In Equation 2.

Figure 35, VRrepresents a dc reference voltage.

Optionally, making this voltage a second signal

Product Folder Link(s): VCA810

2 R Cp2

f =

G = 10-2(V + 1)

330W

VCA810

470W

-10mV

500W500W

OPA698

VIN

-3.4V

+0.5V V = V-x 10

OL R

-2R V

R + R

1 IN

1 2

(

OPA820

VCA810

VOA

330W

0.047 Fm

2 R Cp2

f =

=-R C

2 2

1 + s

G = 10-2(V + 1)

Input Voltage (V)

+3.0 +2.5 +2.0 +1.5 +1.0 +0.5 0

0.1

0.01

0.001

Output Voltage (V)

f =

2 R Cp2

VCA810

www.ti.com

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

Zone III: VC<−2V. The VCA810 control pin is out of

range, and some measure should be taken so that it

does not exceed –2.5V. A limiting action could be VOLTAGE-CONTROLLED LOW-PASS FILTER

achieved by using a voltage limiting amplifier. In the circuit of Figure 39, the VCA810 serves as the

variable-gain element of a voltage-controlled

LOW-DRIFT, WIDEBAND EXPONENTIAL AMP low-pass filter. This section discusses how this

A common use of the log amp above involves signal implementation expands the circuit voltage swing

compounding. The inverse function, signal capability over that normally achieved with the

expanding, requires an exponential transfer function. equivalent multiplier implementation. The circuit

The VCA810 produces this latter response directly, response pole responds to control voltage VC

as shown in Figure 37. DC reference VRagain sets according to the relationship in Equation 3:

the amplifier input voltage, and the input signal VIN

now drives the gain control point. Resistors R1and R2(3)

attenuate this drive to prevent overloading the gain

control input. Setting these resistors at the same where

values as in the preceding log amp produces an

exponential amplifier with the inverse function of the With the components shown, the circuit provides a

log amp. linear variation of the low-pass cutoff from 300Hz to

1MHz.

Figure 37. Exponential Amplifier

Testing the circuit given in Figure 37 gives the

exponential response shown in Figure 38.

Figure 39. Tunable Low-Pass Filter

The response control results from amplification of the

feedback voltage applied to R2. First, consider the

case where the VCA810 produces G = 1. Then, the

circuit performs as if this amplifier were replaced by a

short circuit. Visually doing so leaves a simple

voltage amplifier with a feedback resistor bypassed

by a capacitor. This basic circuit produces a response

pole at .

Figure 38. Exponential Amplifier Response

Product Folder Link(s): VCA810

2 GR Cp1

fZ≈

f =

2 R Cp2

fZ≈1

2 R Cp1

fZ≈1

2 R GCp1

Frequency (Hz)

10k 100k 1M 10M

V = 1.4V-

V = 2V-

V = 1.6V-

CV = 1.8V-

15-

Gain (dB)

OPA846

VCA810

50W

OPA820

VOA

2 Fm

750W

fZ≈1

2 (GR + R C)p1 3 with G = 10-2(V + 1)

VCA810

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

www.ti.com

For G > 1, the circuit applies a greater voltage to R2,TUNABLE EQUALIZER

increasing the feedback current this resistor supplies A circuit analogous to the above low-pass filter

to the summing junction of the OPA820. The produces a voltage-controlled equalizer response.

increased feedback current produces the same result The gain control provided by the VCA810 of

as if R2had been decreased in value in the basic Figure 41 varies this circuit response zero from 1Hz

circuit described above. Decreasing the effective R2to 10kHz, according to the relationship of Equation 4:

resistance moves the circuit pole to a higher

(4)

frequency, producing the response

control. To visualize the circuit’s operation, consider a circuit

condition and an approximation that permit replacing

Finite loop gain and a signal-swing limitation set the VCA810 and R3with short circuits. First, consider

performance boundaries for the circuit. Both the case where the VCA810 produces G = 1.

limitations occur when the VCA810 attenuates, rather Replacing this amplifier with a short circuit leaves the

than amplifies, the feedback signal. These two operation unchanged. In this shorted state, the circuit

limitations reduce the circuit’s utility at the lower is simply a voltage amplifier with an R-C bypass

extreme of the VCA810 gain range. For −1≤VC≤0, around R1. The resistance of this bypass, R3, serves

this amplifier produces attenuating gains in the range only to phase-compensate the circuit, and practical

from 0dB to −40dB. This range directly reduces the factors make R3<< R1. Neglecting R3for the

net gain in the circuit’s feedback loop, increasing gain moment, the circuit becomes just a voltage amplifier

error effects. Additionally, this attenuation transfers with a capacitive bypass of R1. This circuit produces

an output swing limitation from the OPA820 output to

the overall circuit’s output. Note that OPA820 output

voltage, VOA, relates to VOthrough the expression, a response zero at .

VO= G ●VOA. Thus, a G < 1 limits the maximum VOAdding the VCA810 as shown in Figure 41 permits

swing to a value less than the maximum VOA swing. amplification of the signal applied to capacitor C, and

Figure 40 shows the low-pass frequency for different produces voltage control of the frequency fZ.

control voltages. Amplified signal voltage on C increases the signal

current conducted by the capacitor to the op amp

feedback network. The result is the same as if C had

been increased in value to GC. Replacing C with this

effective capacitance value produces the circuit

control expression .

Figure 40. Voltage-Controlled Low-Pass Filter

Frequency Response

Figure 41. Tunable Equalizer

Product Folder Link(s): VCA810

fO=

10-(V + 1)

2 RCp

Frequency (Hz)

1 10 100 1k 10k 100k 1M 10M 100M

G = +40dB

G = +15dB

G = 15dB-

G = 40dB-

AOL

100

Gain (dB)

s +

2+G

R C

2 2

nRC

Q = n ·10-(V + 1)

VCA810

www.ti.com

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

Another factor limits the high-frequency performance VOLTAGE-CONTROLLED BAND-PASS

of the resulting high-pass filter: the finite bandwidth of FILTER

the op amp. This limits the frequency duration of the The variable gain of the VCA810 also provides

equalizer response. Limitations such as bandwidth voltage control over the center frequency of a

and stability are clearly shown in Figure 42.band-pass filter. As shown in Figure 43, this filter

follows from the state-variable configuration with the

VCA810 replacing the inverter common to that

configuration. Variation of the VCA810 gain moves

the filter’s center frequency through a 100:1 range

following the relationship of Equation 5:

(5)

As before, variable gain controls a circuit time

constant to vary the filter response. The gain of the

VCA810 amplifies or attenuates the signal driving the

lower integrator of the circuit. This amplification alters

the effective resistance of the integrator time

constant, producing the response of Equation 6:

Figure 42. Amplifier Noise Gain and AOL for

Different Gain (6)

Evaluation of this response equation reveals a

Other limitations of this circuit are stability versus passband gain of AO= –1, a bandwidth of BW =

VCA810 gain and input signal level for the circuit.

Figure 42 also illustrates these two factors. As the 1/(2pRC), and a selectivity of . Note

VCA810 gain increases, the crossover slope between that variation of control voltage VCalters Q but not

the AOL curve of the OPA846 and noise gain will be bandwidth.

greater than 20dB/decade, rendering the circuit The gain provided by the VCA810 restricts the output

unstable. The signal level for high gain of the swing of the filter. Output signal VOmust be

VCA810 will meet two limitations: the output voltage constrained to a level that does not drive the VCA810

swings of both the VCA810 and the OPA846. The output, VOA, into its saturation limit. Note that these

expression VOA = GVIrelates these two voltages. two outputs have voltage swings related by VOA =

Thus, an output voltage limit VOAL constrains the input GVO. Thus, a swing limit VOAL imposes a circuit output

voltage to VI≤VOAL/G. limit of VOL ≤VOAL/G.

With the components shown, BW = 50kHz. This See Figure 44 for the frequency response for two

bandwidth provides an integrator response duration different gain conditions of the schematic shown in

of four decades of frequency for fZ= 1Hz, dropping to Figure 43. In particular, notice the center frequency

one decade for fZ= 10kHz. shift and the selectivity of Q changing as the gain is

increased.

Product Folder Link(s): VCA810

VCA810

5kW

330W

5kW

0.047 Fm

330W

50W

VOA

0.047 Fm

1/2

OPA2822

1/2

OPA2822

s +

2+G

R C

2 2

nRC

fO=

10-(V + 1)

2 RCp

BW = 1

2 RCp

(V + 1)

Q= n -

·10

A = 1-

Gain (dB)

Frequency (Hz)

100 1k 10k 100k

VCA810

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

www.ti.com

Figure 43. Tunable Band-Pass Filter

Figure 44. Tunable Band-Pass Filter Response

Product Folder Link(s): VCA810

VCA810

www.ti.com

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

DESIGN-IN TOOLS MACROMODELS AND APPLICATIONS

SUPPORT

DEMONSTRATION BOARDS Computer simulation of circuit performance using

A printed circuit board (PCB) is available to assist in SPICE is often useful when analyzing the

the initial evaluation of circuit performance using the performance of analog circuits and systems. This is

VCA810. This evaluation board (EVM) is available particularly true for video and RF amplifier circuits

free, as an unpopulated PCB delivered with where parasitic capacitance and inductance can play

descriptive documentation. The summary information a major role in circuit performance. A SPICE model

for this board is shown in Table 1. for the VCA810 is available through the TI web page.

The applications group is also available for design

Table 1. EVM Ordering Information assistance. The models available from TI predict

typical small-signal ac performance, transient steps,

LITERATURE dc performance, and noise under a wide variety of

BOARD PART REQUEST

PRODUCT PACKAGE NUMBER NUMBER operating conditions. The models include the noise

VCA810ID SO-8 DEM-VCA-SO-1A SBOU025 terms found in the electrical specifications of the

relevant product data sheet.

Go to the Texas Instruments website (www.ti.com) to

request an evaluation board through the VCA810

product folder.

OPERATING SUGGESTIONS

Output overdriving occurs when either the maximum

output voltage swing or output current is exceeded.

INPUT/OUTPUT RANGE The VCA810 high output current of ±60mA ensures

The VCA810’s 80dB gain range allows the user to that virtually all output overdrives will be limited by

handle an exceptionally wide range of input signal voltage swing rather than by current limiting. Table 2

levels. If the input and output voltage range summarizes these overdrive conditions.

specifications are exceeded, however, signal

distortion and amplifier overdrive will occur. The Table 2. Output Signal Compression

VCA810 maximum input and output voltage range is LIMITING TO PREVENT, OPERATE

best illustrated in the Typical Characteristics plot, GAIN RANGE MECHANISM DEVICE WITHIN:

Input/Output Range vs Gain (Figure 11). This chart −40dB < G < Input Stage

plots input and output voltages versus gain in dB. Input Voltage Range

−10dB Overdrive

The maximum input voltage range is the largest at full −10dB < G < Internal Stage Output Voltage Range

attenuation (−40dB) and decreases as the gain +10dB Overdrive

increases. Similarly, the maximum useful output +5dB < G < Output Stage Output Voltage Range

voltage range increases as the input decreases. We +40dB Overdrive

can distinguish three overloading issues as a result of

the operating mode: high attenuation, mid-range OVERDRIVE RECOVERY

gain-attenuation, and high gain. As shown in the Typical Characteristics plot,

From –40dB to –10dB, gain overdriving the input Input/Output Range vs Gain (Figure 11), the onset of

stage is the only method to overdrive the VCA810. overdrive occurs whenever the actual output begins

Preventing this type of overdrive is achieved by to deviate from the ideal expected output. If possible,

limiting the input voltage range. the user should operate the VCA810 within the linear

regions shown in order to minimize signal distortion

From –10dB to +40dB, overdriving can be prevented and overdrive delay time. However, instances of

by limiting the output voltage range. There are two amplifier overdrive are quite common in automatic

limiting mechanisms operating in this situation. From gain control (AGC) circuits, which involve the

–10dB to +10dB, an internal stage is the limiting application of variable gain to input signals of varying

factor; from +10dB to +40dB, the output stage is the levels. The VCA810 design incorporates circuitry that

limiting factor. allows it to recover from most overdrive conditions in

200ns or less. Overdrive recovery time is defined as

the time required for the output to return from

overdrive to linear operation, following the removal of

either an input or gain-control overdrive signal. The

overdrive plots for maximum gain and maximum

attenuation are shown in the Typical Characteristics.

Product Folder Link(s): VCA810

V = V + 10 V

OS OSO IOS

(

VCA810

1 FmVC

V-

VIN

100kW

10W

V+

10kW

Output Offset Error (mV)

Gain (dB)

-40 -30 -20 -10 0 10 20 30 40

Maximum Error Band

Typical Devices

VCA810

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

www.ti.com

OUTPUT OFFSET ERROR OFFSET ADJUSTMENT

Several elements contribute to the output offset Where desired, the offset of the VCA810 can be

voltage error; among them are the input offset removed as shown in Figure 46. This circuit simply

voltage, the output offset voltage, the input bias presents a dc voltage to one of the amplifier inputs to

current and the input offset current. To simplify the counteract the offset error voltage. For best offset

following analysis, the output offset voltage error is performance, the trim adjustment should be made

dependent only on the output-offset voltage of the with the amplifier set at the maximum gain of the

VCA810 and the input offset voltage. The output intended application. The offset voltage of the

offset error can then be expressed as Equation 7: VCA810 varies with gain as shown in Figure 45,

limiting the complete offset cancellation to one

selected gain. Selecting the maximum gain optimizes

(7) offset performance for higher gains where high

Where: amplification of the offset effects produces the

greatest output offset. Two features minimize the

• VOS = Output offset error offset control circuit noise contribution to the amplifier

• VOSO = Output offset voltage input circuit. First, making the resistance of R2a low

• GdB = VCA810 gain in dB value minimizes the noise directly introduced by the

• VIOS = Input offset voltage control circuit. This approach reduces both the

thermal noise of the resistor and the noise produced

This is shown in Figure 45.by the resistor with the amplifier input noise current. A

second noise reduction results from capacitive

bypass of the potentiometer output. This reduction

filters out power-supply noise that would otherwise

couple to the amplifier input.

Figure 46. Optional Offset Adjustment

Figure 45. Output Offset Error versus Gain This filtering action diminishes as the wiper position

approaches either end of the potentiometer, but

The histogram Output Offset Voltage at Maximum practical conditions prevent such settings. Over its full

Gain (Figure 18) in the Typical Characteristics curves adjustment range, the offset control circuit produces a

shows the distribution for the output offset voltage at ±5mV input offset correction for the values shown.

maximum gain. However, the VCA810 only requires one-tenth of this

range for offset correction, assuring that the

potentiometer wiper will always be near the

potentiometer center. With this setting, the resistance

seen at the wiper remains high, which stabilizes the

filtering function.

Product Folder Link(s): VCA810

VCA810

-5V

IBI

+5V

IBN

ENI

ERS

4kTRS

4kTRT

VCA610 VO

f =

-3dB

2 R CpP P

E = G E + (I R ) + 4kT(R + R )

O NI BI T S T

+ (I R )

BN S

(V/V)·2 2 2

E = E + (I R ) + 4kT(R + R )

N NI BI T S T

2 2 + (I R )

BN S

VCA810

www.ti.com

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

GAIN CONTROL NOISE PERFORMANCE

The VCA810 gain is controlled by means of a The VCA810 offers 2.4nV/√Hz input-referred voltage

unipolar negative voltage applied between ground noise and 1.8 pA/√Hz input-referred current noise at

and the gain control input, pin 3. If use of the output a gain of +40dB. The input-referred voltage noise,

disable feature is required, a ground-referenced and the input-referred current noise terms, combine

bipolar voltage is needed. Output disable occurs for to give low output noise under a wide variety of

+0.15V ≤VC≤+2V, and produces greater than 80dB operating conditions. Figure 48 shows the op amp

of attenuation. The control voltage should be limited noise analysis model with all the noise terms

to +2V in disable mode, and –2.5V in gain mode in included. In this model, all noise terms are taken to

order to prevent saturation of internal circuitry. The be noise voltage or current density terms in either

VCA810 gain-control input has a –3dB bandwidth of nV/√Hz or pA/√Hz.

25MHz and varies with frequency, as shown in the

Typical Characteristics curves. This wide bandwidth,

although useful for many applications, can allow

high-frequency noise to modulate the gain control

input. In practice, this can be easily avoided by

filtering the control input, as shown in Figure 47. RP

should be no greater than 100Ωso as not to

introduce gain errors by interacting with the gain

control input bias current of 6mA.

Figure 48. VCA810 Noise Analysis Model

The total output spot noise voltage can be computed

as the square root of the sum of all squared output

noise voltage contributors. Equation 8 shows the

general form for the output noise voltage using the

Figure 47. Control Line Filtering terms shown in Figure 48.

(8)

GAIN CONTROL AND TEEPLE POINT Dividing this expression by the gain will give the

When the VCA810 control voltage reaches −1.5V, equivalent input-referred spot-noise voltage at the

also referred to as the Teeple point, the signal path noninverting input as shown by Equation 9.

undergoes major changes. From 0V to the Teeple

point, the gain is controlled by one bank of amplifiers: (9)

a low-gain VCA. As the Teeple point is passed, the

signal path is switched to a higher gain VCA. This Evaluating these two equations for the VCA810 circuit

gain-stage switching can be seen most clearly in the and component values shown in Figure 30

Noise Density vs Control Voltage Typical (maximizing gain) will give a total output spot-noise

Characteristics curve (Figure 13). The output-referred voltage of 272.3nV√Hz and a total equivalent

voltage noise density increases proportionally to the input-referred spot-noise voltage of 2.72nV√Hz. This

control voltage and reaches a maximum value at the total input-referred spot-noise voltage is higher than

Teeple point. As the gain increases and the internal the 2.4nV√Hz specification for the VCA810 alone.

stages switch, the output-referred voltage noise This reflects the noise added to the output by the

density drops suddenly and restarts its proportional input current noise times the input resistance RSand

increase with the gain. RT. Keeping input impedance low is required to

maintain low total equivalent input-referred spot-noise

voltage.

Product Folder Link(s): VCA810

T =T +P ´ q

J D JA

VCA810

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

www.ti.com

THERMAL ANALYSIS reduce unwanted capacitance, a window around the

signal I/O pins should be opened in all of the ground

The VCA810 will not require heatsinking or airflow in and power planes around those pins. Otherwise,

most applications. Maximum desired junction ground and power planes should be unbroken

temperature would set the maximum allowed internal elsewhere on the board. Place a small series

power dissipation as described in this section. In no resistance (> 25Ω) with the input pin connected to

case should the maximum junction temperature be ground to help decouple package parasitic.

allowed to exceed +150°C. b) Minimize the distance (less than 0.25” or

Operating junction temperature (TJ) is given by 6.35mm) from the power-supply pins to

Equation 10:high-frequency 0.1mF decoupling capacitors. At the

device pins, the ground and power plane layout

(10) should not be in close proximity to the signal I/O pins.

The total internal power dissipation (PD) is the sum of Avoid narrow power and ground traces to minimize

quiescent power (PDQ) and additional power inductance between the pins and the decoupling

dissipated in the output stage (PDL) to deliver load capacitors. The power-supply connections should

power. Quiescent power is simply the specified always be decoupled with these capacitors. Larger

no-load supply current times the total supply voltage (2.2mF to 6.8mF) decoupling capacitors, effective at

across the part. PDL depends on the required output lower frequencies, should also be used on the main

signal and load; for a grounded resistive load, supply pins. These capacitors may be placed

however, it is at a maximum when the output is fixed somewhat farther from the device and may be shared

at a voltage equal to one-half of either supply voltage among several devices in the same area of the PCB.

(for equal bipolar supplies). Under this worst-case c) Careful selection and placement of external

condition, PDL = VS.2/(4 ●RL), where RLis the components will preserve the high-frequency

resistive load. performance of the VCA810. Resistors should be a

Note that it is the power in the output stage and not in very low reactance type. Surface-mount resistors

the load that determines internal power dissipation. work best and allow a tighter overall layout. Metal-film

As a worst-case example, compute the maximum TJand carbon composition, axially-leaded resistors can

using an VCA810ID (SO-8 package) in the circuit of also provide good high-frequency performance.

Figure 30 operating at maximum gain and at the Again, keep the leads and PCB trace length as short

maximum specified ambient temperature of +85°C. as possible. Never use wire-wound type resistors in a

high-frequency application. Since the output pin is the

PD= 10V(24.8mA) + 52/(4 ●500Ω) = 260.5mW most sensitive to parasitic capacitance, always

Maximum TJ= +85°C + (0.260W ●+125°C/W) position the series output resistor, if any, as close as

= 117.6°C possible to the output pin. Other network

This maximum operating junction temperature is well components, such as inverting or noninverting input

below most system level targets. Most applications termination resistors, should also be placed close to

will be lower since an absolute worst-case output the package.

stage power was assumed in this calculation of VS/2 d) Connections to other wideband devices on the

which is beyond the output voltage range for the board may be made with short direct traces or

VCA810. through onboard transmission lines. For short

connections, consider the trace and the input to the

BOARD LAYOUT next device as a lumped capacitive load. Relatively

wide traces (50mils to 100mils, or 1.27mm to

Achieving optimum performance with a 2.54mm) should be used, preferably with ground and

high-frequency amplifier such as the VCA810 power planes opened up around them.

requires careful attention to board layout parasitic and

external component types. Recommendations that e) Socketing a high-speed part like the VCA810 is

will optimize performance include: not recommended. The additional lead length and

pin-to-pin capacitance introduced by the socket can

a) Minimize parasitic capacitance to any ac ground create an extremely troublesome parasitic network,

for all of the signal I/O pins. This includes the ground which can make it almost impossible to achieve a

pin (pin 2). Parasitic capacitance on the output can smooth, stable frequency response. Best results are

cause instability: on both the inverting input and the obtained by soldering the VCA810 onto the board.

noninverting input, it can react with the source

impedance to cause unintentional band limiting. To

Product Folder Link(s): VCA810

External

+VS

-VS

Internal

Circuitry

ESDProtectiondiodesinternally

connectedtoallpins.

VCA810

www.ti.com

SBOS275F –JUNE 2003–REVISED DECEMBER 2010

INPUT AND ESD PROTECTION present. The diodes can typically withstand a

continuous current of 30mA without destruction. To

The VCA810 is built using a very high-speed ensure long-term reliability, however, diode current

complementary bipolar process. The internal junction should be externally limited to 10mA whenever

breakdown voltages are relatively low for these very possible.

small geometry devices. These breakdowns are

reflected in the Absolute Maximum Ratings table.

All pins on the VCA810 are internally protected from

ESD by means of a pair of back-to-back,

reverse-biased diodes to either power supply, as

shown in Figure 49. These diodes begin to conduct

when the pin voltage exceeds either power supply by

about 0.7V. This situation can occur with loss of the

amplifier power supplies while a signal source is still

Figure 49. Internal ESD Protection

REVISION HISTORY

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision E (August, 2008) to Revision F Page

• Updated document format to current standards ................................................................................................................... 1

• Deleted lead temperature specification from Absolute Maximum Ratings table .................................................................. 2

• Corrected typo in Figure 30 ................................................................................................................................................ 11

Changes from Revision D (February, 2006) to Revision E Page

• Changed rails quantity from 100 to 75. ................................................................................................................................. 2

• Changed storage temperature minimum value in Absolute Maximum Ratings table from –40°C to –65°C ........................ 2

Product Folder Link(s): VCA810

PACKAGE OPTION ADDENDUM

www.ti.com 28-Sep-2010

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status (1) Package Type Package

Drawing Pins Package Qty Eco Plan (2) Lead/

Ball Finish MSL Peak Temp (3) Samples

(Requires Login)

VCA810AID ACTIVE SOIC D 8 75 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples

VCA810AIDG4 ACTIVE SOIC D 8 75 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples

VCA810AIDR ACTIVE SOIC D 8 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples

VCA810AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples

VCA810ID ACTIVE SOIC D 8 75 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples

VCA810IDG4 ACTIVE SOIC D 8 75 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples

VCA810IDR ACTIVE SOIC D 8 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples

VCA810IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

PACKAGE OPTION ADDENDUM

www.ti.com 28-Sep-2010

Addendum-Page 2

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

VCA810AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

VCA810IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jul-2012

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

VCA810AIDR SOIC D 8 2500 367.0 367.0 35.0

VCA810IDR SOIC D 8 2500 367.0 367.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jul-2012

Pack Materials-Page 2

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