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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN74AVC2T245
SCES692D JUNE 2008REVISED FEBRUARY 2016
SN74AVC2T245 Dual-Bit Dual-Supply Bus Transceiver with Configurable Level-Shifting /
Voltage Translation and Tri-State Outputs
1
1 Features
1 Each Channel Has Independent Direction Control
Control Inputs VIH/VIL Levels Are Referenced to
VCCA Voltage
Fully Configurable Dual-Rail Design Allows Each
Port to Operate Over the Full 1.2 V to
3.6 V Power-Supply Range
I/Os Are 4.6 V Tolerant
Ioff Supports Partial-Power-Down Mode Operation
VCC Isolation Feature - If Either VCC Input is at
GND, Both Ports are in High-Impedance State
Typical Data Rates
500 Mbps (1.8 V to 3.3 V Level-Shifting)
320 Mbps (<1.8 V to 3.3 V Level-Shifting)
320 Mbps (Translate to 2.5 V or 1.8 V)
280 Mbps (Translate to 1.5 V)
240 Mbps (Translate to 1.2 V)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
5000 V Human-Body Model (A114-A)
200 V Machine Model (A115-A)
1500 V Charged-Device Model (C101)
2 Applications
Personal Electronics
Industrial
Enterprise
Telecom
Logic Diagram (Positive Logic)
(1) Shown for a single channel
3 Description
This dual-bit noninverting bus transceiver uses two
separate configurable power-supply rails. The A port
is designed to track VCCA. VCCA accepts any supply
voltage from 1.2 V to 3.6 V. The B port is designed to
track VCCB. VCCB accepts any supply voltage from 1.2
V to 3.6 V. This allows for universal low-voltage
bidirectional translation between any of the 1.2 V, 1.5
V, 1.8 V, 2.5 V, and 3.3 V voltage nodes.
The SN74AVC2T245 is designed for asynchronous
communication between two data buses. The logic
levels of the direction-control (DIR) input and the
output-enable (OE) activate either the B-port outputs
or the A-port outputs or place both output ports into
the high-impedance mode . The device transmits data
from the A bus to the B bus when the B-port outputs
are activated and from the B bus to the A bus when
the A-port outputs are activated. The input circuitry on
both A and B ports always is active and must have a
logic HIGH or LOW level applied to prevent excess
ICC and ICCZ.
The SN74AVC2T245 control pins (DIR1, DIR2, and
OE) are supplied by VCCA.
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow
through the device when it is powered down.
The VCC isolation feature ensures that if either VCC
input is at GND, both ports are in the high-impedance
state.
To ensure the high-impedance state during power up
or power down, OE must be connected to VCC
through a pull-up resistor; the minimum value of the
resistor is determined by the current-sinking capability
of the driver.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SN74AVC2T245 UQFN (10) 1.80 mm × 1.40 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
2
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Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions ...................... 4
6.4 Thermal Information.................................................. 5
6.5 Electrical Characteristics .......................................... 6
6.6 Switching Characteristics: VCCA = 1.2 V................... 7
6.7 Switching Characteristics: VCCA = 1.5 V ± 0.1 V....... 7
6.8 Switching Characteristics: VCCA = 1.8 V ± 0.15 V..... 8
6.9 Switching Characteristics: VCCA = 2.5 V ± 0.2 V....... 8
6.10 Switching Characteristics: VCCA = 3.3 V ± 0.3 V..... 9
6.11 Operating Characteristics........................................ 9
6.12 Typical Characteristics.......................................... 10
7 Parameter Measurement Information ................ 11
8 Detailed Description............................................ 12
8.1 Overview................................................................. 12
8.2 Functional Block Diagram....................................... 12
8.3 Feature Description................................................. 12
8.4 Device Functional Modes........................................ 13
9 Application and Implementation ........................ 14
9.1 Application Information............................................ 14
9.2 Typical Application ................................................. 14
10 Power Supply Recommendations ..................... 16
11 Layout................................................................... 16
11.1 Layout Guidelines ................................................. 16
11.2 Layout Example .................................................... 16
12 Device and Documentation Support................. 17
12.1 Community Resources.......................................... 17
12.2 Trademarks........................................................... 17
12.3 Electrostatic Discharge Caution............................ 17
12.4 Glossary................................................................ 17
13 Mechanical, Packaging, and Orderable
Information........................................................... 17
4 Revision History
Changes from Revision C (July 2015) to Revision D Page
Made changes to Pin Configuration and Functions .............................................................................................................. 1
Changes from Revision B (June 2015) to Revision C Page
The Ordering Information table (formally on page 1) contained a Top-Side Marking of TQ_. The table has been
replaced with the Package Option Addendum in Mechanical, Packaging, and Orderable Information. VC_ was
added to the device marking . ............................................................................................................................................. 17
Changes from Revision A (May 2012) to Revision B Page
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes,Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
Removed the Ordering Information table. ............................................................................................................................. 1
VCCA
VCCB
OE
DIR2
B1
B2
GND
A1
A2
DIR1
85
94
10 3
1 2
6
7
3
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5 Pin Configuration and Functions
RSW PACKAGE
10-PIN UQFN
TOP VIEW
Pin Functions
PIN DESCRIPTION
NAME NO.
(UQFN)
VCCA 7 Supply Voltage A
VCCB 6 Supply Voltage B
GND 3 Ground
A1 8 Output or input depending on state of DIR. Output level depends on VCCA.
A2 9 Output or input depending on state of DIR. Output level depends on VCCA.
B1 5 Output or input depending on state of DIR. Output level depends on VCCB.
B2 4 Output or input depending on state of DIR. Output level depends on VCCB.
DIR1,DIR2 10,1 Direction Pin, Connect to GND or to VCCA
OE 2 Tri-state output-mode enables. Pull OE high to place all outputs in 3-state mode. Referenced
to VCCA
4
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(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCCA
VCCB Supply voltage –0.5 4.6 V
VIInput voltage(2) I/O ports (A port) –0.5 4.6 VI/O ports (B port) –0.5 4.6
Control inputs –0.5 4.6
VOVoltage applied to any output in the high-impedance or power-off
state(2) A port –0.5 4.6 V
B port –0.5 4.6
VOVoltage applied to any output in the high or low state(2) (3) A port –0.5 VCCA + 0.5 V
B port –0.5 VCCB + 0.5
IIK Input clamp current VI< 0 –50 mA
IOK Output clamp current VO< 0 –50 mA
IOContinuous output current ±50 mA
Continuous current through VCCA, VCCB, or GND ±100 mA
TJJunction Temperature -40 150 °C
Tstg Storage temperature range –65 150 °C
(1) JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) 5000 V
Charged-device model (CDM), per JEDEC specification JESD22-
C101(2) 1500
(1) VCCI is the VCC associated with the input port.
(2) VCCO is the VCC associated with the output port.
(3) All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
6.3 Recommended Operating Conditions(1) (2) (3)
VCCI VCCO MIN MAX UNIT
VCCA Supply voltage 1.2 3.6 V
VCCB Supply voltage 1.2 3.6 V
VIH High-level
input voltage Data inputs(1) 1.2 V to 1.95 V VCCI × 0.65 V1.95 V to 2.7 V 1.6
2.7 V to 3.6 V 2
VIL Low-level
input voltage Data inputs(1) 1.2 V to 1.95 V VCCI × 0.35 V1.95 V to 2.7 V 0.7
2.7 V to 3.6 V 0.8
VIH High-level
input voltage DIR
(referenced to VCCA)(2)
1.2 V to 1.95 V VCCA × 0.65 V1.95 V to 2.7 V 1.6
2.7 V to 3.6 V 2
5
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Recommended Operating Conditions(1) (2) (3) (continued)
VCCI VCCO MIN MAX UNIT
VIL Low-level
input voltage DIR
(referenced to VCCA)(2)
1.2 V to 1.95 V VCCA × 0.35 V1.95 V to 2.7 V 0.7
2.7 V to 3.6 V 0.8
VIInput voltage 0 3.6 V
VOOutput voltage Active state 0 VCCO V
3-state 0 3.6
IOH High-level output current
1.1 V to 1.2 V –3
mA
1.4 V to 1.6 V –6
1.65 V to 1.95 V –8
2.3 V to 2.7 V –9
3 V to 3.6 V –12
IOL Low-level output current
1.1 V to 1.2 V 3
mA
1.4 V to 1.6 V 6
1.65 V to 1.95 V 8
2.3 V to 2.7 V 9
3 V to 3.6 V 12
Δt/Δv Input transition rise or fall rate 5 ns/V
TAOperating free-air temperature –40 85 °C
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.4 Thermal Information
THERMAL METRIC(1) SN74AVC2T245
UNITRSW (UQFN)
10 PINS
RθJA Junction-to-ambient thermal resistance 109.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 57.9 °C/W
RθJB Junction-to-board thermal resistance 57.0 °C/W
ψJT Junction-to-top characterization parameter 2.7 °C/W
ψJB Junction-to-board characterization parameter 57.0 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 18.4 °C/W
6
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(1) VCCO is the VCC associated with the output port.
(2) VCCI is the VCC associated with the input port.
6.5 Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)(1)(2)
PARAMETER TEST CONDITIONS VCCA VCCB TA= 25°C –40°C to 85°C UNIT
MIN TYP MAX MIN MAX
VOH
IOH = –100 μA
VI= VIH
1.2 V to 3.6 V 1.2 V to 3.6 V VCCO 0.2
V
IOH = –3 mA 1.2 V 1.2 V 0.95
IOH = –6 mA 1.4 V 1.4 V 1.05
IOH = –8 mA 1.65 V 1.65 V 1.2
IOH = –9 mA 2.3 V 2.3 V 1.75
IOH = –12 mA 3 V 3 V 2.3
VOL
IOL = 100 μA
VI= VIL
1.2 V to 3.6 V 1.2 V to 3.6 V 0.2
V
IOL = 3 mA 1.2 V 1.2 V 0.25
IOL = 6 mA 1.4 V 1.4 V 0.35
IOL = 8 mA 1.65 V 1.65 V 0.45
IOL = 9 mA 2.3 V 2.3 V 0.55
IOL = 12 mA 3 V 3 V 0.7
IIControl
inputs VI= VCCA or GND 1.2 V to 3.6 V 1.2 V to 3.6 V ±0.025 ±0.25 ±1 μA
Ioff A or B port VIor VO= 0 to 3.6 V 0 V 0 V to 3.6 V ±0.1 ±1 ±5 μA
0 V to 3.6 V 0 V ±0.1 ±1 ±5
IOZ A or B port VO= VCCO or GND,
VI= VCCI or GND, OE = VIH 3.6 V 3.6 V ±0.5 ±2.5 ±5 μA
ICCA VI= VCCI or GND, IO= 0 1.2 V to 3.6 V 1.2 V to 3.6 V 8
μA0 V 0 V to 3.6 V –2
0 V to 3.6 V 0 V 8
ICCB VI= VCCI or GND, IO= 0 1.2 V to 3.6 V 1.2 V to 3.6 V 8
μA0 V 0 V to 3.6 V 8
0 V to 3.6 V 0 V –2
ICCA + ICCB VI= VCCI or GND, IO= 0 1.2 V to 3.6 V 1.2 V to 3.6 V 16 μA
CiControl
inputs VI= 3.3 V or GND 3.3 V 3.3 V 3.5 4.5 pF
Cio A or B port VO= 3.3 V or GND 3.3 V 3.3 V 6 7 pF
7
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6.6 Switching Characteristics: VCCA = 1.2 V
over recommended operating free-air temperature range, VCCA = 1.2 V (unless otherwise noted) (see Figure 3)
PARAMETER FROM
(INPUT) TO
(OUTPUT) VCCB = 1.2 V VCCB = 1.5 V
± 0.1 V VCCB = 1.8 V
± 0.15 V VCCB = 2.5 V
± 0.2 V VCCB = 3.3 V
± 0.3 V UNIT
TYP TYP TYP TYP TYP
tPLH A B 2.5 2.1 1.9 1.9 1.9 ns
tPHL 2.5 2.1 1.9 1.9 1.9
tPLH B A 2.5 2.2 2 1.8 1.7 ns
tPHL 2.5 2.2 2 1.8 1.7
tPZH OE A 3.8 3.1 2.7 2.6 3 ns
tPZL 3.8 3.1 2.7 2.6 3
tPZH OE B 3.7 3.7 3.7 3.7 3.7 ns
tPZL 3.7 3.7 3.7 3.7 3.7
tPHZ OE A 4.4 3.6 3.5 3.3 4.1 ns
tPLZ 4.4 3.6 3.5 3.3 4.1
tPHZ OE B 4.2 4.2 4.3 4.1 4.2 ns
tPLZ 4.2 4.2 4.3 4.1 4.2
6.7 Switching Characteristics: VCCA = 1.5 V ± 0.1 V
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 3)
PARAMETER FROM
(INPUT) TO
(OUTPUT) VCCB = 1.2 V VCCB = 1.5 V
± 0.1 V VCCB = 1.8 V
± 0.15 V VCCB = 2.5 V
± 0.2 V VCCB = 3.3 V
± 0.3 V UNIT
TYP MIN MAX MIN MAX MIN MAX MIN MAX
tPLH A B 2.2 0.3 4.4 0.2 3.9 0.1 3.6 0.1 3.9 ns
tPHL 2.2 0.3 4.4 0.2 3.9 0.1 3.6 0.1 3.9
tPLH B A 2 0.6 5.1 0.4 4.9 0.2 4.6 0.1 4.5 ns
tPHL 2 0.6 5.1 0.4 4.9 0.2 4.6 0.1 4.5
tPZH OE A 3.4 1.1 7.1 0.9 6.2 0.7 5.5 0.1 6.4 ns
tPZL 3.4 1.1 7.1 0.9 6.2 0.7 5.5 0.1 6.4
tPZH OE B 2.5 1.1 8.2 1.1 8.2 1.1 8.2 1.1 8.2 ns
tPZL 2.5 1.1 8.2 1.1 8.2 1.1 8.2 1.1 8.2
tPHZ OE A 4.1 1.2 7.1 0.8 6.7 0.4 5.6 1 74 ns
tPLZ 4.1 1.2 7.1 0.8 6.7 0.4 5.6 1 7.4
tPHZ OE B 3.3 0.3 7.4 0.2 5.7 0.3 5.6 0.3 5.6 ns
tPLZ 3.3 0.3 7.4 0.2 5.7 0.3 5.6 0.3 5.6
8
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6.8 Switching Characteristics: VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 3)
PARAMETER FROM
(INPUT) TO
(OUTPUT) VCCB = 1.2 V VCCB = 1.5 V
± 0.1 V VCCB = 1.8 V
± 0.15 V VCCB = 2.5 V
± 0.2 V VCCB = 3.3 V
± 0.3 V UNIT
TYP MIN MAX MIN MAX MIN MAX MIN MAX
tPLH A B 2 0.1 4.1 0.1 3.6 0.1 3.1 0.1 3.3 ns
tPHL 2 0.1 4.1 0.1 3.6 0.1 3.1 0.1 3.3
tPLH B A 1.9 0.4 4.3 0.1 4.1 0.1 3.8 0.1 3.7 ns
tPHL 1.9 0.4 4.3 0.1 4.1 0.1 3.8 0.1 3.7
tPZH OE A 3.2 0.8 6.7 0.4 5.8 0.4 4.8 0.3 4.6 ns
tPZL 3.2 0.8 6.7 0.4 5.8 0.4 4.8 0.3 4.6
tPZH OE B 1.9 0.2 6.7 0.2 6.6 0.2 6.7 0.2 6.7 ns
tPZL 1.9 0.2 6.7 0.2 6.6 0.2 6.7 0.2 6.7
tPHZ OE A 3.8 0.7 6.2 0.3 6.5 0.1 5.2 0.8 6.5 ns
tPLZ 3.8 0.7 6.2 0.3 6.5 0.1 5.2 0.8 6.5
tPHZ OE B 3.4 0.1 6.8 0.1 6.8 0.1 6.7 0.1 6.7 ns
tPLZ 3.4 0.1 6.8 0.1 6.8 0.1 6.7 0.1 6.7
6.9 Switching Characteristics: VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 3)
PARAMETER FROM
(INPUT) TO
(OUTPUT) VCCB = 1.2 V VCCB = 1.5 V
± 0.1 V VCCB = 1.8 V
± 0.15 V VCCB = 2.5 V
± 0.2 V VCCB = 3.3 V
± 0.3 V UNIT
TYP MIN MAX MIN MAX MIN MAX MIN MAX
tPLH A B 1.9 0.1 3.8 0.1 3.2 0.1 2.7 0.1 2.6 ns
tPHL 1.9 0.1 3.8 0.1 3.2 0.1 2.7 0.1 2.6
tPLH B A 1.8 0.5 3.4 0.2 3.1 0.1 2.8 0.1 2.6 ns
tPHL 1.8 0.5 3.4 0.2 3.1 0.1 2.8 0.1 2.6
tPZH OE A 3.1 0.7 6.2 0.5 5.2 0.3 4.1 0.3 3.6 ns
tPZL 3.1 0.7 6.2 0.5 5.2 0.3 4.1 0.3 3.6
tPZH OE B 1.4 0.4 4.5 0.4 4.5 0.4 4.5 0.4 4.5 ns
tPZL 1.4 0.4 4.5 0.4 4.5 0.4 4.5 0.4 4.5
tPHZ OE A 3.6 0.2 5.2 0.1 5.4 0.1 4.5 0.7 6 ns
tPLZ 3.6 0.2 5.2 0.1 5.4 0.1 4.5 0.7 6
tPHZ OE B 2.1 0.1 4.7 0.1 4.6 0.1 4.7 0.1 4.7 ns
tPLZ 2.1 0.1 4.7 0.1 4.6 0.1 4.7 0.1 4.7
9
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6.10 Switching Characteristics: VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 3)
PARAMETER FROM
(INPUT) TO
(OUTPUT) VCCB = 1.2 V VCCB = 1.5 V
± 0.1 V VCCB = 1.8 V
± 0.15 V VCCB = 2.5 V
± 0.2 V VCCB = 3.3 V
± 0.3 V UNIT
TYP MIN MAX MIN MAX MIN MAX MIN MAX
tPLH A B 1.8 0.1 3.6 0.1 3 0.1 2.6 0.1 2.4 ns
tPHL 1.8 0.1 3.6 0.1 3 0.1 2.6 0.1 2.4
tPLH B A 1.9 0.5 3.4 0.2 2.9 0.1 2.5 0.1 2.3 ns
tPHL 1.9 0.5 3.4 0.2 2.9 0.1 2.5 0.1 2.3
tPZH OE A 3.1 0.9 5.9 0.5 5 0.3 3.8 0.3 3.3 ns
tPZL 3.1 0.9 5.9 0.5 5 0.3 3.8 0.3 3.3
tPZH OE B 1.2 0.4 3.6 0.4 3.6 0.4 3.6 0.4 3.6 ns
tPZL 1.2 0.4 3.6 0.4 3.6 0.4 3.6 0.4 3.6
tPHZ OE A 3.4 0.1 4.6 0.1 4.7 0.3 4.8 0.7 4.5 ns
tPLZ 3.4 0.1 4.6 0.1 4.7 0.3 4.8 0.7 4.5
tPHZ OE B 2.9 0.1 5.4 0.1 5.3 0.1 5.3 0.1 5.3 ns
tPLZ 2.9 0.1 5.4 0.1 5.3 0.1 5.3 0.1 5.3
(1) Power dissipation capacitance per transceiver. Refer to the TI application report, CMOS Power Consumption and Cpd Calculation,
SCAA035
6.11 Operating Characteristics
TA= 25°C
PARAMETER TEST
CONDITIONS
VCCA =
VCCB = 1.2 V VCCA =
VCCB = 1.5 V VCCA =
VCCB = 1.8 V VCCA =
VCCB = 2.5 V VCCA =
VCCB = 3.3 V UNIT
TYP TYP TYP TYP TYP
CpdA (1)
A to B
Outputs
enabled
CL= 0,
f = 10 MHz,
tr= tf= 1 ns
3 3 3 3 4
pF
Outputs
disabled 1 1 1 2 2
B to A
Outputs
enabled 12 13 13 15 15
Outputs
disabled 1 2 2 2 2
CpdB (1)
A to B
Outputs
enabled
CL= 0,
f = 10 MHz,
tr= tf= 1 ns
12 13 13 14 16
pF
Outputs
disabled 1 2 2 2 2
B to A
Outputs
enabled 3 3 3 4 4
Outputs
disabled 1 1 1 2 2
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0 20 40 60 80 100
V Voltage (V)
OL
I Current (mA)
OL
-40 C
o
25 C
o
85 C
o
4.4
4.6
4.8
5.0
5.2
5.4
5.6
0 -20 -40 -60 -80 -100
V Voltage (V)
OH
I Current (mA)
OH
-40 C
o
25 C
o
85 C
o
4.2
10
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6.12 Typical Characteristics
Figure 1. VOL Voltage vs IOL Current Figure 2. VOH Voltage vs IOH Current
11
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7 Parameter Measurement Information
Figure 3. Load and Circuit and Voltage Waveforms
DIR1
A1
OE
B1
12
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8 Detailed Description
8.1 Overview
The SN74AVC2T245 is a dual-bit, dual-supply noninverting bidirectional voltage level translation. Pins A and
control pins (DIR and OE) are supported by VCCA and pins B are supported by VCCB. The A port can accept I/O
voltages ranging from 1.2 V to 3.6 V, while the B port can accept I/O voltages from 1.2 V to 3.6 V. A high on DIR
allows data transmission from A to B and a low on DIR allows data transmission from B to A when OE is set to
low. When OE is set to high, both A and B are in the high-impedance state.
This device is fully specified for partial-power-down applications using off output current (Ioff).
The VCC isolation feature ensures that if either VCC input is at GND, both ports are put in a high-impedance state.
8.2 Functional Block Diagram
Figure 4. Logic Diagram (Positive Logic)
8.3 Feature Description
8.3.1 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full
1.2 V to 3.6 V Power-Supply Range
Both VCCA and VCCB can be supplied at any voltage from 1.2 V to 3.6 V making the device suitable for translating
between any of the low voltage nodes (1.2 V, 1.8 V, 2.5 V, and 3.3 V).
8.3.2 Partial-Power-Down Mode Operation
This device is fully specified for partial-power-down applications using off output current (Ioff). The Ioff circuitry will
prevent backflow current by disabling I/O output circuits when device is in partial power-down mode.
8.3.3 VCC Isolation
The VCC isolation feature ensures that if either VCCA or VCCB are at GND, both ports will be in a high-impedance
state (IOZ). This prevents false logic levels from being presented to either bus.
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8.4 Device Functional Modes
The SN74AVC2T245 is a voltage level translator that can operate from1.2 V to 3.6 V (VCCA) and 1.2 V to 3.6 V
(VCCB). The signal translation requires direction control and output enable control. The table below enlists the
operation of the part for the respective states of the control inputs.
(1) Input circuits of the data I/Os are always active.
Table 1. Function Table(1) (Each Transceiver)
CONTROL INPUTS OUTPUT CIRCUITS OPERATION
OE DIR1 A PORT B PORT
L L Enabled Hi-Z B data to A data
L H Hi-Z Enabled A data to B data
H X Hi-Z Hi-Z Isolation
1.8 V
1 kΩ
3.0 V
Processor
UART
Peripheral
OE
DIR1
A1
A2
Tx
Rx
Rx
Tx
VCCA VCCB
B1
B2
GND
DIR2
SN1203086
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SN74AVC2T45 is used to shift IO voltage levels from one voltage domain to another. Bus A and bus B have
independent power supplies, and a direction pin is used to control the direction of data flow. Unused data ports
must not be floating; tie the unused port input and output to ground directly.
9.1.1 Enable Times
Calculate the enable times for the SN74AVC16T45 using the following formulas:
tPZH (DIR to A) = tPLZ (DIR to B) + tPLH (B to A) (1)
tPZL (DIR to A) = tPHZ (DIR to B) + tPHL (B to A) (2)
tPZH (DIR to B) = tPLZ (DIR to A) + tPLH (A to B) (3)
tPZL (DIR to B) = tPHZ (DIR to A) + tPHL (A to B) (4)
In a bidirectional application, these enable times provide the maximum delay from the time the DIR bit is
switched until an output is expected. For example, if the SN74AVC2T245 initially is transmitting from A to B, then
the DIR bit is switched; the B port of the device must be disabled before presenting it with an input. After the B
port has been disabled, an input signal applied to it appears on the corresponding A port after the specified
propagation delay.
9.2 Typical Application
Figure 5. Typical Application of the SN74AVC2T245
9.2.1 Design Requirements
This device uses drivers which are enabled depending on the state of the DIR pin. The designer must know the
intended flow of data and take care not to violate any of the high or low logic levels. Unused data inputs must not
be floating, as this can cause excessive internal leakage on the input CMOS structure. Tie any unused input and
output ports directly to ground.
For this design example, use the parameters listed in Table 2.
Magnitude (V)
-0.5
0
0.5
1
1.5
2
2.5
3
3.5
D001
Input
Output
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Table 2. Design Parameters
DESIGN PARAMETER EXAMPLE VALUE
Input voltage range 1.2 V to 3.6 V
Output voltage range 1.2 V to 3.6 V
9.2.2 Detailed Design Procedure
To begin the design process, determine the following:
9.2.2.1 Input Voltage Ranges
Use the supply voltage of the device that is driving the SN74AVC2T245 device to determine the input voltage
range. For a valid logic high the value must exceed the VIH of the input port. For a valid logic low the value must
be less than the VIL of the input port.
9.2.2.2 Output Voltage Range
Use the supply voltage of the device that the SN74AVC2T245 device is driving to determine the output voltage
range.
9.2.3 Application Curves
Figure 6. 3.3 V to 1.8 V Level-Shifting With 1-MHz Square Wave
GND
B2
VCCB
LEGEND
VIA to Power Plane
VIA to GND Plane (Inner Layer)
Polygonal Copper Pour
B1
DIR1
A2
VCCA
8
9
10
1
DIR2
A1
Keep OE high until V and
V are powered up
CCA
CCB
6
5
4
3
Bypass CapacitorBypass Capacitor
From
Controller
To
Controller
To
System
From
System
OE
VCCA
SN74AVC2T245
VCCA
2
7
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10 Power Supply Recommendations
The SN74AVC2T245 device uses two separate configurable power-supply rails, VCCA and VCCB. VCCA accepts
any supply voltage from 1.2 V to 3.6 V and VCCB accepts any supply voltage from 1.2 V to 3.6 V. The A port and
B port are designed to track VCCA and VCCB respectively allowing for low-voltage bidirectional translation between
any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5 V voltage nodes.
11 Layout
11.1 Layout Guidelines
To ensure reliability of the device, following common printed-circuit-board layout guidelines is recommended.
Bypass capacitors should be used on power supplies.
Short trace lengths should be used to avoid excessive loading.
Placing pads on the signal paths for loading capacitors or pullup resistors to help adjust rise and fall times of
signals depending on the system requirements.
11.2 Layout Example
Figure 7. Recommended Layout Example
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12 Device and Documentation Support
12.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.2 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.4 Glossary
SLYZ022 TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SN74AVC2T245RSWR ACTIVE UQFN RSW 10 3000 Green (RoHS
& no Sb/Br) CU NIPDAU |
CU NIPDAUAG Level-1-260C-UNLIM -40 to 85 (TQ7, TQO, TQR, TQ
V)
(TQH, TQJ, TQY)
(VCH, VCO)
(VCJ, VCR)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
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