LTC3872-1
1
38721f
For more information www.linear.com/LTC3872-1
No RSENSE
Current Mode Boost
DC/DC Controller
High Efficiency 3.3V Input, 5V Output Boost Converter Efficiency and Power Loss vs Load Current
LOAD CURRENT (mA)
30
EFFICIENCY (%)
POWER LOSS (W)
90
100 10
0.001
20
10
80
50
70
60
40
1 100 1000 10000
38721 TA01b
0
10
1
0.1
0.01
Typical applicaTion
FeaTures DescripTion
applicaTions
The LT C
®
3872-1 is a constant frequency current mode
boost DC/DC controller that drives an N-channel power
MOSFET and requires very few external components. The
No RSENSE
TM
architecture eliminates the need for a sense
resistor, improves efficiency and saves board space.
The LTC3872-1 provides excellent AC and DC load and
line regulation with ±1.5% output voltage accuracy. It
incorporates an undervoltage lockout feature that shuts
down the device when the input voltage falls below 2.3V.
LTC3872-1 has the same functionality as the standard
LTC3872 except that it has no frequency foldback in cur-
rent limit.
High switching frequency of 550kHz allows the use of a
small inductor
. The LTC3872-1 is available in an 8-lead
low profile (1mm) ThinSOT
TM
package and 8-pin 2mm ×
3mm DFN package.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
No RSENSE and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks
are the property of their respective owners.
n Telecom Power Supplies
n 42V Automotive Systems
n 24V Industrial Controls
n IP Phone Power Supplies
n No Current Sense Resistor Required
n VOUT up to 60V
n Constant Frequency 550kHz Operation
n Internal Soft-Start and Optional External Soft-Start
n Adjustable Current Limit
n Pulse Skipping at Light Load
n VIN Range: 2.75V to 9.8V
n ±1.5% Voltage Reference Accuracy
n Current Mode Operation for Excellent Line and Load
Transient Response
n Low Profile (1mm) SOT-23 and 2mm × 3mm DFN
Packages
ITH
IPRG
GND
VFB
VIN
SW
NGATE
LTC3872-1
38721 TA01
RUN/SS
17.4k
VIN
11k
1%
34.8k
1%
1nF
M1
D1
10µF
100µF
×2
1.8nF
47pF
1µH
VIN
3.3V
VOUT
5V
2A
LTC3872-1
2
38721f
For more information www.linear.com/LTC3872-1
Input Supply Voltage (VIN), RUN/SS .......... –0.3V to 10V
IPRG Voltage ................................. –0.3V to (VIN + 0.3V)
VFB, ITH Voltages ....................................... –0.3V to 2.4V
SW Voltage ................................................ –0.3V to 60V
Operating Junction Temperature Range
(Notes 2, 3) ............................................ –40°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
TS8 Package ......................................................... 300°C
absoluTe MaxiMuM raTings
orDer inForMaTion
IPRG 1
ITH 2
VFB 3
GND 4
8 SW
7 RUN/SS
6 VIN
5 NGATE
TOP VIEW
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
TJMAX = 150°C, θJA = 195°C/W
TOP VIEW
9
DDB PACKAGE
8-LEAD (3mm × 2mm) PLASTIC DFN
5
6
7
8
4
3
2
1GND
VFB
ITH
IPRG
NGATE
VIN
RUN/SS
SW
TJMAX = 150°C, θJA = 76°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
pin conFiguraTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3872ETS8-1#PBF LTC3872ETS8-1#TRPBF LTCFN 8-Lead Plastic TSOT-23 –40°C to 85°C
LTC3872ITS8-1#PBF LTC3872ITS8-1#TRPBF LTCFN 8-Lead Plastic TSOT-23 –40°C to 125°C
LTC3872HTS8-1#PBF LTC3872HTS8-1#TRPBF LTCFN 8-Lead Plastic TSOT-23 –40°C to 150°C
LTC3872EDDB-1#PBF LTC3872EDDB-1#TRPBF LCFK 8-Lead (3mm × 2mm) Plastic DFN –40°C to 85°C
LTC3872IDDB-1#PBF LTC3872IDDB-1#TRPBF LCFK 8-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C
LTC3872HDDB-1#PBF LTC3872HDDB-1#TRPBF LCFK 8-Lead (3mm × 2mm) Plastic DFN –40°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
(Note 1)
LTC3872-1
3
38721f
For more information www.linear.com/LTC3872-1
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3872-1 is tested under pulsed load conditions such that
TJ≈TA. The LTC3872-1E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3872-1I is guaranteed
over the –40°C to 125°C operating junction temperature range. The
LTC3872-1H is guaranteed over the full –40°C to 150°C operating junction
temperature range. The maximum ambient temperature consistent with
these specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance and
other environmental factors.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Voltage Range l2.75 9.8 V
Input DC Supply Current
Normal Operation
Shutdown
UVLO
Typicals at VIN = 4.2V (Note 4)
2.75V ≤ VIN ≤ 9.8V
VRUN/SS = 0V
VIN < UVLO Threshold
250
8
20
400
20
35
µA
µA
µA
Undervoltage Lockout Threshold VIN Rising
VIN Falling
l
l
2.3
2.05
2.45
2.3
2.75
2.55
V
V
Shutdown Threshold (at RUN/SS) VRUN/SS Falling
VRUN/SS Rising
l
l
0.6
0.65
0.85
0.95
1.05
1.15
V
V
Regulated Feedback Voltage (Note 5) LTC3872-1E
LTC3872-1I and L
TC3872-1H
l
l
1.182
1.178
1.2
1.2
1.218
1.218
V
V
Feedback Voltage Line Regulation 2.75V < VIN < 9V (Note 5) 0.14 mV/V
Feedback Voltage Load Regulation VITH = 1.6V (Note 5)
VITH = 1V (Note 5)
0.05
–0.05
%
%
VFB Input Current (Note 5) 25 50 nA
RUN/SS Pull Up Current VRUN/SS = 0 0.35 0.7 1.25 µA
Oscillator Frequency
Normal Operation
VFB = 1V
500
550
650
kHz
Gate Drive Rise Time CLOAD = 3000pF 40 ns
Gate Drive Fall Time CLOAD = 3000pF 40 ns
Peak Current Sense Voltage IPRG = GND (Note 6) LTC3872-1E
LTC3872-1I
LTC3872-1H
l
l
l
90
85
80
105
105
105
120
120
120
mV
mV
mV
IPRG = Float LTC3872-1E
LTC3872-1I
LTC3872-1H
l
l
l
160
150
145
180
180
180
200
200
200
mV
mV
mV
IPRG = VIN LTC3872-1E
LTC3872-1I
LTC3872-1H
l
l
l
260
250
240
285
285
285
310
310
310
mV
mV
mV
Default Internal Soft-Start Time 1 ms
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 4.2V unless otherwise noted.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
LTC3872-1TS8: TJ = TA + (PD • 195°C/W)
LTC3872-1DDB: TJ = TA + (PD • 76°C/W)
Note 4: The dynamic input supply current is higher due to power MOSFET
gate charging (QG • fOSC). See Applications Information.
Note 5: The LTC3872-1 is tested in a feedback loop which servos VFB to
the reference voltage with the ITH pin forced to the midpoint of its voltage
range (0.7V ≤ VITH ≤ 1.9V, midpoint = 1.3V).
Note 6: Rise and fall times are measured at 10% and 90% levels.
elecTrical characTerisTics
LTC3872-1
4
38721f
For more information www.linear.com/LTC3872-1
Shutdown IQ vs VIN
Shutdown IQ vs Temperature
Typical perForMance characTerisTics
TA = 25°C, unless otherwise noted.
FB Voltage vs Temperature
FB Voltage Line Regulation
ITH Voltage vs RUN/SS Voltage
TEMPERATURE (°C)
–60
FB VOLTAGE (V)
1.22
1.23
1.24
6040
38721 G01
1.21
1.20
–20–40 200 10080
1.19
1.18
1.25
VIN (V)
0
1.1990
FB VOLTAGE (V)
1.1995
1.2005
1.2010
1.2015
1.2025
157
38721 G02
1.2000
1.2020
4910
236 8
RUN VOLTAGE (V)
0
ITH VOLTAGE (V)
1.5
2.0
2.5
4.0
38721 G03
1.0
0.5
00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.5 5.0
VIN = 2.5V
VIN = 3.3V
VIN = 5V
TEMPERATURE (°C)
–50
0
SHUTDOWN IQ (µA)
5
10
15
20
–25 0 25 50
38721 G05
75 100 125 150
VIN (V)
2
SHUTDOWN IQ (µA)
8
10
12
8
38721 G04
6
4
4
35796 10
2
0
14
LTC3872-1
5
38721f
For more information www.linear.com/LTC3872-1
Gate Drive Rise and Fall Time
vs CLOAD
RUN/SS Threshold vs VIN
RUN/SS Threshold vs
Temperature
Frequency vs Temperature
Maximum Sense Threshold
vs Temperature
Typical perForMance characTerisTics
TA = 25°C, unless otherwise noted.
CLOAD (pF)
0
TIME (ns)
60
80
100
8000
38721 G06
40
20
50
70
90
30
10
02000 4000 6000 10000
RISE TIME
FALL TIME
VIN (V)
0
RUN THRESHOLD (V)
0.90
0.92
0.94
610
38721 G07
0.88
0.86
0.84 2 4 8
0.96
0.98
1.00
12
RISING
FALLING
TEMPERATURE (°C)
–50
RUN THRESHOLD (V)
0.8
0.9
1.0
25 75 150
38721 G08
0.7
0.6
0.5
–25 0 50 100 125
RISING
FALLING
TEMPERATURE (°C)
–50
500
FREQUENCY (kHz)
525
550
575
600
–5 0 25 50
38721 G09
75 100 125 150
TEMPERATURE (°C)
0
MAXIMUM SENSE THRESHOLD (mV)
100
200
300
50
150
250
–10 30 70 110
38721 G10
150–30–50 10 50 90 130
IPRG = VIN
IPRG = FLOAT
IPRG = GND
LTC3872-1
6
38721f
For more information www.linear.com/LTC3872-1
IPRG (Pin 1/Pin 4): Current Sense Limit Select Pin.
ITH (Pin 2/Pin 3): Error Amplifier Compensation Point.
Nominal voltage range for this pin is 0.7V to 1.9V.
VFB (Pin 3/Pin 2): Receives the feedback voltage from an
external resistor divider across the output.
GND (Pin 4/Pin 1, Exposed Pad Pin 9): Ground. The ex-
posed pad must be soldered to PCB ground for electrical
contact and rated thermal performance.
NGATE (Pin 5/Pin 8): Gate Drive for the External N-Channel
MOSFET. This pin swings from 0V to VIN.
VIN (Pin 6/Pin 7): Supply Pin. This pin must be closely
decoupled to GND.
RUN/SS (Pin 7/Pin 6): Shutdown and external soft-start
pin. In shutdown, all functions are disabled and the NGATE
pin is held low.
SW (Pin 8/Pin 5): Switch node connection to inductor and
current sense input pin through external slope compensa-
tion resistor. Normally, the external N-channel MOSFET’s
drain is connected to this pin.
RUN/SS
VIN SWGND
ITH
VFB
NGATE
38721 FD
IPRG
SLOPE
COMPENSATION
550kHz
OSCILLATOR
CURRENT
COMPARATOR
SR
Q
VIN
VOLTAGE
REFERENCE
UNDERVOLTAGE
LOCKOUT
–
+
ITH
BUFFER
SWITCHING
LOGIC CIRCUIT
CURRENT LIMIT
CLAMP
INTERNAL
SOFT-START
RAMP
– +
ILIM
RS
LATCH
1.2V
1.2V
UV
SHUTDOWN
COMPARATOR
SHDN
ERROR
AMPLIFIER
0.7µA
–
+
pin FuncTions
(TS8/DD8)
FuncTional DiagraM
LTC3872-1
7
38721f
For more information www.linear.com/LTC3872-1
Main Control Loop
The LTC3872-1 is a No RSENSE constant frequency, cur-
rent mode controller for DC/DC boost, SEPIC and flyback
converter applications. The LTC3872-1 is distinguished
from conventional current mode controllers because the
current control loop can be closed by sensing the voltage
drop across the power MOSFET switch or across a discrete
sense resistor, as shown in Figures 1 and 2. This No
RSENSE
sensing technique improves efficiency, increases power
density and reduces the cost of the overall solution.
For circuit operation, please refer to the Block Diagram
of the IC and the Typical Application on the front page. In
normal operation, the power MOSFET is turned on when
the oscillator sets the RS latch and is turned off when the
current comparator resets the latch. The divided-down
output voltage is compared to an internal 1.2V reference by
the error amplifier, which outputs an error signal at the ITH
pin. The voltage on the ITH pin sets the current comparator
input threshold. When the load current increases, a fall in
the FB voltage relative to the reference voltage causes the
ITH pin to rise, which causes the current comparator to
trip at a higher peak inductor current value. The average
inductor current will therefore rise until it equals the load
current, thereby maintaining output regulation.
The LTC3872-1 can be used either by sensing the voltage
drop across the power MOSFET or by connecting the SW
pin to a conventional sensing resistor in the source of the
power MOSFET. Sensing the voltage across the power
MOSFET maximizes converter efficiency and minimizes the
component count; the maximum rating for this pin, 60V,
allows MOSFET sensing in a wide output voltage range.
The RUN/SS pin controls whether the IC is enabled or is
in a low current shutdown state. With the RUN/SS pin
below 0.85V, the chip is off and the input supply current is
typically only 8µA. With an external capacitor connected to
the RUN/SS pin an optional external soft-start is enabled.
A 0.7µA trickle current will charge the capacitor, pulling
the RUN/SS pin above shutdown threshold and slowly
ramping RUN/SS to limit the VITH during start-up. Because
the noise on the SW pin could couple into the RUN/SS
pin, disrupting the trickle charge current that charges the
RUN/SS pin, a 1M resistor is recommended to pull-up
the RUN/SS pin when external soft-start is used. When
RUN/SS is driven by an external logic, a minimum of 2.75V
logic is recommended to allow the maximum ITH range.
Light Load Operation
Under very light load current conditions, the ITH pin volt-
age will be very close to the zero current level of 0.85V.
As the load current decreases further, an internal offset at
the current comparator input will assure that the current
comparator remains tripped (even at zero load current) and
the regulator will start to skip cycles, as it must, in order
to maintain regulation. This behavior allows the regulator
to maintain constant frequency down to very light loads,
resulting in low output ripple as well as low audible noise
and reduced RF interference, while providing high light
load efficiency.
Figure 1. SW Pin (Internal Sense Pin)
Connection for Maximum Efficiency
C
OUT
VSW
V
OUT
VIN
GND
LD
+
NGATE
GND
VIN
SW
38721 F01
LTC3872-1
C
VSW
RSENSE
V
VIN
+
NGATE
GND
VIN
SW
LTC3872-1
Figure 2. SW Pin (Internal Sense Pin)
Connection for Sensing Resistor
operaTion
LTC3872-1
8
38721f
For more information www.linear.com/LTC3872-1
Output Voltage Programming
The output voltage is set by a resistor divider according
to the following formula:
V
O=1.2V •1+ R2
R1
The external resistor divider is connected to the output
as shown in the Typical Application on the front page,
allowing remote voltage sensing.
Application Circuits
A basic LTC3872-1 application circuit is shown on the front
page of this data sheet. External component selection is
driven by the characteristics of the load and the input supply.
Duty Cycle Considerations
For a boost converter operating in a continuous conduc-
tion mode (CCM), the duty cycle of the main switch is:
D= VO+ VD– VIN
VO+ VD
where VD is the forward voltage of the boost diode. For
converters where the input voltage is close to the output
voltage, the duty cycle is low and for converters that
develop a high output voltage from a low; voltage input
supply, the duty cycle is high. The minimum on-time of
the LTC3872-1 is typically around 250ns. This time limits
the minimum duty cycle of the LTC3872-1. The maximum
duty cycle of the LTC3872-1 is around 90%. Although
frequency foldback feature of the regular LTC3872 enables
the user to obtain higher output voltage, it also increases
inductor ripple current.
The Peak and Average Input Currents
The control circuit in the LTC3872-1 is measuring the input
current (either by using the RDS(ON) of the power MOSFET
or by using a sense resistor in the MOSFET source), so
the output current needs to be reflected back to the input
in order to dimension the power MOSFET properly. Based
on the fact that, ideally, the output power is equal to the
input power, the maximum average input current is:
IIN(MAX) =IO(MAX)
1–DMAX
The peak input current is:
IIN(PEAK) = 1+ χ
2
•IO(MAX)
1–DMAX
Ripple Current IL and the c Factor
The constant c in the equation above represents the
percentage peak-to-peak ripple current in the inductor,
relative to its maximum value. For example, if 30% ripple
current is chosen, then c = 0.30, and the peak current is
15% greater than the average.
For a current mode boost regulator operating in CCM,
slope compensation must be added for duty cycles above
50% in order to avoid subharmonic oscillation. For the
LTC3872-1, this ramp compensation is internal. Having an
internally fixed ramp compensation waveform, however,
does place some constraints on the value of the inductor
and the operating frequency. If too large an inductor is
used, the resulting current ramp (IL) will be small relative
to the internal ramp compensation (at duty cycles above
50%), and the converter operation will approach voltage
mode (ramp compensation reduces the gain of the current
loop). If too small an inductor is used, but the converter is
still operating in CCM (continuous conduction mode), the
internal ramp compensation may be inadequate to prevent
subharmonic oscillation. To ensure good current mode gain
and avoid subharmonic oscillation, it is recommended that
the ripple current in the inductor fall in the range of 20%
to 40% of the maximum average current. For example, if
the maximum average input current is 1A, choose an IL
between 0.2A and 0.4A, and a value c between 0.2 and 0.4.
Inductor Selection
Given an operating input voltage range, and having chosen
the operating frequency and ripple current in the inductor,
applicaTions inForMaTion
LTC3872-1
9
38721f
For more information www.linear.com/LTC3872-1
the inductor value can be determined using the following
equation:
L =
V
IN(MIN)
∆IL•f•DMAX
where:
∆IL=c•IO(MAX)
1–DMAX
Remember that boost converters are not short-circuit
protected. Under a shorted output condition, the induc-
tor current is limited only by the input supply capability.
The minimum required saturation current of the inductor
can be expressed as a function of the duty cycle and the
load current, as follows:
IL(SAT) ≥ 1+ χ
2
•IO(MAX)
1–DMAX
The saturation current rating for the inductor should be
checked at the minimum input voltage (which results in
the highest inductor current) and maximum output current.
Operating in Discontinuous Mode
Discontinuous mode operation occurs when the load cur-
rent is low enough to allow the inductor current to run
out during the off-time of the switch. Once the inductor
current is near zero, the switch and diode capacitances
resonate with the inductance to form damped ringing at
1MHz to 10MHz. If the off-time is long enough, the drain
voltage will settle to the input voltage.
Depending on the input voltage and the residual energy
in the inductor, this ringing can cause the drain of the
power MOSFET to go below ground where it is clamped
by the body diode. This ringing is not harmful to the IC
and it has been shown not to contribute significantly to
EMI. Any attempt to damp it with a snubber will degrade
the efficiency.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. Actual core loss is independent of core size
for a fixed inductor value, but is very dependent on the
inductance selected. As inductance increases, core losses
go down. Unfortunately, increased inductance requires
more turns of wire and therefore, copper losses will in-
crease. Generally, there is a tradeoff between core losses
and copper losses that needs to be balanced.
Ferrite designs have very low core losses and are pre-
ferred at high switching frequencies, so design goals can
concentrate on copper losses and preventing saturation.
Ferrite core material saturates “hard,” meaning that the
inductance collapses rapidly when the peak design current
is exceeded. This results in an abrupt increase in inductor
ripple current and consequently, output voltage ripple. Do
not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs size requirements and any
radiated field/EMI requirements. New designs for surface
mount inductors are available from Coiltronics, Coilcraft,
Toko and Sumida.
Power MOSFET Selection
The power MOSFET serves two purposes in the LTC3872-1:
it represents the main switching element in the power
path and its RDS(ON) represents the current sensing ele-
ment for the control loop. Important parameters for the
power MOSFET include the drain-to-source breakdown
voltage (BVDSS), the threshold voltage (VGS(TH)), the on-
resistance (RDS(ON)) versus gate-to-source voltage, the
gate-to-source and gate-to-drain charges (QGS and QGD,
respectively), the maximum drain current (ID(MAX)) and
the MOSFET’s thermal resistances (RTH(JC) and RTH(JA)).
Logic-level (4.5V VGS-RATED) threshold MOSFETs should
be used when input voltage is high, otherwise if low input
voltage operation is expected (e.g., supplying power from
a lithium-ion battery or a 3.3V logic supply), then sublogic-
level (2.5V VGS-RATED) threshold MOSFETs should be used.
Pay close attention to the BVDSS specifications for the
MOSFETs relative to the maximum actual switch voltage
in the application. Many logic-level devices are limited
applicaTions inForMaTion
LTC3872-1
10
38721f
For more information www.linear.com/LTC3872-1
to 30V or less, and the switch node can ring during the
turn-off of the MOSFET due to layout parasitics. Check
the switching waveforms of the MOSFET directly across
the drain and source terminals using the actual PC board
layout (not just on a lab breadboard!) for excessive ringing.
During the switch on-time, the control circuit limits the
maximum voltage drop across the power MOSFET to about
285mV, 105mV and 185mV at low duty cycle with IPRG
tied to VIN, GND, or left floating respectively. The peak
inductor current is therefore limited to (285mV, 105mV and
185mV)/RDS(ON) depending on the status of the IPRG pin.
The relationship between the maximum load current, duty
cycle and the RDS(ON) of the power MOSFET is:
RDS(ON) ≤ VSENSE(MAX) •1–DMAX
1+ χ
2
•IO(MAX) •ρT
VSENSE(MAX) is the maximum voltage drop across the
power MOSFET. VSENSE(MAX) is typically 285mV, 185mV and
105mV. It is reduced with increasing duty cycle as shown
in Figure 3. The rT term accounts for the temperature co-
efficient of the RDS(ON) of the MOSFET, which is typically
0.4%/°C. Figure 4 illustrates the variation of normalized
RDS(ON) over temperature for a typical power MOSFET.
Another method of choosing which power MOSFET to
use is to check what the maximum output current is for a
given RDS(ON), since MOSFET on-resistances are available
in discrete values.
IO(MAX) = VSENSE(MAX) •1–DMAX
1+ χ
2
•RDS(ON) •ρT
It is worth noting that the 1 – DMAX relationship between
IO(MAX) and RDS(ON) can cause boost converters with a
wide input range to experience a dramatic range of maxi-
mum input and output current. This should be taken into
consideration in applications where it is important to limit
the maximum current drawn from the input supply.
Voltage on the NGATE pin should be within –0.3V to
(VIN+0.3V) limits. Voltage stress below –0.3V and above
VIN + 0.3V can damage internal MOSFET driver, see Func-
tional Diagram. This is especially important in case of
driving MOSFETs with relatively high package inductance
(DPAK and bigger) or inadequate layout. A small Schottky
diode between NGATE pin and ground can prevent nega-
tive voltage spikes. T
wo small Schottky diodes can inhibit
positive and negative voltage spikes (Figure 5).
JUNCTION TEMPERATURE (°C)
–50
ρ
T NORMALIZED ON RESISTANCE
1.0
1.5
150
38721 F04
0.5
0050 100
2.0
Figure 4. Normalized RDS(ON) vs Temperature
Figure 5
Figure 3. Maximum SENSE Threshold Voltage vs Duty Cycle
DUTY CYCLE (%)
1
0
MAXIMUM CURRENT SENSE VOLTAGE (mV)
50
100
150
200
250
300
20 40 60 80
38721 G03
100
IPRG = HIGH
IPRG = FLOAT
IPRG = LOW
applicaTions inForMaTion
SW
GND
VIN
NGATE
38721 F04
LTC3872-1
SW
GND
VIN
NGATE
LTC3872-1
LTC3872-1
11
38721f
For more information www.linear.com/LTC3872-1
Calculating Power MOSFET Switching and Conduction
Losses and Junction Temperatures
In order to calculate the junction temperature of the power
MOSFET, the power dissipated by the device must be known.
This power dissipation is a function of the duty cycle, the
load current and the junction temperature itself (due to
the positive temperature coefficient of its RDS(ON)). As a
result, some iterative calculation is normally required to
determine a reasonably accurate value. Since the controller
is using the MOSFET as both a switching and a sensing
element, care should be taken to ensure that the converter
is capable of delivering the required load current over all
operating conditions (line voltage and temperature), and
for the worst-case specifications for VSENSE(MAX) and the
RDS(ON) of the MOSFET listed in the manufacturer’s data
sheet.
The power dissipated by the MOSFET in a boost converter is:
PFET =IO(MAX)
1– DMAX
2
•RDS(ON) •DMAX •ρT
+k •VO1.85 •IO(MAX)
1– DMAX
(
)
•CRSS •f
The first term in the equation above represents the I2R
losses in the device, and the second term, the switching
losses. The constant, k = 1.7, is an empirical factor inversely
related to the gate drive current and has the dimension
of 1/current.
From a known power dissipated in the power MOSFET, its
junction temperature can be obtained using the following
formula:
TJ = TA + PFET • RTH(JA)
The RTH(JA) to be used in this equation normally includes
the RTH(JC) for the device plus the thermal resistance from
the case to the ambient temperature (RTH(CA)). This value
of TJ can then be compared to the original, assumed value
used in the iterative calculation process.
Output Diode Selection
To maximize efficiency, a fast switching diode with low
forward drop and low reverse leakage is desired. The output
diode in a boost converter conducts current during the
switch off-time. The peak reverse voltage that the diode
must withstand is equal to the regulator output voltage.
The average forward current in normal operation is equal
to the output current, and the peak current is equal to the
peak inductor current.
ID(PEAK) =IL(PEAK) = 1+
χ
2
•
I
O(MAX)
1–D
MAX
The power dissipated by the diode is:
PD = IO(MAX) • VD
and the diode junction temperature is:
TJ = TA + PD • RTH(JA)
The RTH(JA) to be used in this equation normally includes
the RTH(JC) for the device plus the thermal resistance from
the board to the ambient temperature in the enclosure.
Remember to keep the diode lead lengths short and to
observe proper switch-node layout (see Board Layout
Checklist) to avoid excessive ringing and increased dis-
sipation.
Output Capacitor Selection
Contributions of ESR (equivalent series resistance), ESL
(equivalent series inductance) and the bulk capacitance
must be considered when choosing the correct component
for a given output ripple voltage. The effects of these three
parameters (ESR, ESL and bulk C) on the output voltage
ripple waveform are illustrated in Figure 6e for a typical
boost converter.
The choice of component(s) begins with the maximum
acceptable ripple voltage (expressed as a percentage of
the output voltage), and how this ripple should be divided
between the ESR step and the charging/discharging DV.
For the purpose of simplicity we will choose 2% for the
maximum output ripple, to be divided equally between the
ESR step and the charging/discharging DV. This percentage
ripple will change, depending on the requirements of the
application, and the equations provided below can easily
be modified.
For a 1% contribution to the total ripple voltage, the ESR
of the output capacitor can be determined using the fol-
lowing equation:
ESRCOUT ≤
0.01•V
O
IIN(PEAK)
applicaTions inForMaTion
LTC3872-1
12
38721f
For more information www.linear.com/LTC3872-1
where:
IIN(PEAK)= 1+ χ
2
•IO(MAX)
1–DMAX
For the bulk C component, which also contributes 1% to
the total ripple:
COUT ≥
I
O(MAX)
0.01•V
O
•f
For many designs it is possible to choose a single capacitor
type that satisfies both the ESR and bulk C requirements
for the design. In certain demanding applications, however,
the ripple voltage can be improved significantly by con-
necting two or more types of capacitors in parallel. For
example, using a low ESR ceramic capacitor can minimize
the ESR step, while an electrolytic capacitor can be used
to supply the required bulk C.
Once the output capacitor ESR and bulk capacitance have
been determined, the overall ripple voltage waveform
should be verified on a dedicated PC board (see Board
Layout section for more information on component place-
ment). Lab breadboards generally suffer from excessive
series inductance (due to inter-component wiring), and
these parasitics can make the switching waveforms look
significantly worse than they would be on a properly
designed PC board.
The output capacitor in a boost regulator experiences
high RMS ripple currents, as shown in Figure 7. The RMS
output capacitor ripple current is:
IRMS(COUT) ≈IO(MAX) •VO– VIN(MIN)
VIN(MIN)
Note that the ripple current ratings from capacitor manu-
facturers are often based on only 2000 hours of life. This
makes it advisable to further derate the capacitor or to
choose a capacitor rated at a higher temperature than
required. Several capacitors may also be placed in parallel
to meet size or height requirements in the design.
Manufacturers such as Nichicon, United Chemicon and
Sanyo should be considered for high performance through-
hole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest product of
ESR and size of any aluminum electrolytic, at a somewhat
higher price.
In surface mount applications, multiple capacitors may
have to be placed in parallel in order to meet the ESR or
RMS current handling requirements of the application.
Aluminum electrolytic and dry tantalum capacitors are
both available in surface mount packages. In the case of
tantalum, it is critical that the capacitors have been surge
tested for use in switching power supplies. An excellent
choice is AVX TPS series of surface mount tantalum. Also,
ceramic capacitors are now available with extremely low
ESR, ESL and high ripple current ratings.
VIN
L D
SW
6a. Circuit Diagram
6b. Inductor and Input Currents
COUT
VOUT
RL
IIN
IL
6c. Switch Current
ISW
tON
6d. Diode and Output Currents
6e. Output Voltage Ripple Waveform
IO
ID
VOUT
(AC)
tOFF
VESR
RINGING DUE TO
TOTAL INDUCTANCE
(BOARD + CAP)
VCOUT
Figure 6. Switching Waveforms for a Boost Converter
applicaTions inForMaTion
LTC3872-1
13
38721f
For more information www.linear.com/LTC3872-1
Input Capacitor Selection
The input capacitor of a boost converter is less critical
than the output capacitor, due to the fact that the inductor
is in series with the input and the input current waveform
is continuous (see Figure 6b). The input voltage source
impedance determines the size of the input capacitor,
which is typically in the range of 10µF to 100µF. A low ESR
capacitor is recommended, although it is not as critical as
for the output capacitor.
The RMS input capacitor ripple current for a boost con-
verter is:
IRMS(CIN) = 0.3 •
V
IN(MIN)
L•f
•DMAX
Please note that the input capacitor can see a very high
surge current when a battery is suddenly connected to
the input of the converter and solid tantalum capacitors
can fail catastrophically under these conditions. Be sure
to specify surge-tested capacitors!
Efficiency Considerations: How Much Does VDS
Sensing Help?
The efficiency of a switching regulator is equal to the output
power divided by the input power (×100%).
Percent efficiency can be expressed as:
% Efficiency = 100% – (L1 + L2 + L3 + …),
where L1, L2, etc. are the individual loss components as a
percentage of the input power. It is often useful to analyze
individual losses to determine what is limiting the efficiency
and which change would produce the most improvement.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for the majority
of the losses in LTC3872-1 application circuits:
1. The supply current into VIN. The VIN current is the
sum of the DC supply current IQ (given in the Electrical
Characteristics) and the MOSFET driver and control cur-
rents. The DC supply current into the VIN pin is typically
about 250µA and represents a small power loss (much
less than 1%) that increases with VIN. The driver current
results from switching the gate capacitance of the power
MOSFET; this current is typically much larger than the DC
current. Each time the MOSFET is switched on and then
off, a packet of gate charge QG is transferred from VIN
to ground. The resulting dQ/dt is a current that must be
supplied to the Input capacitor by an external supply. If
the IC is operating in CCM:
IQ(TOT) ≈ IQ = f • QG
PIC = VIN • (IQ + f • QG)
2. Power MOSFET switching and conduction losses. The
technique of using the voltage drop across the power
MOSFET to close the current feedback loop was chosen
because of the increased efficiency that results from not
having a sense resistor. The losses in the power MOSFET
are equal to:
PFET =IO(MAX)
1– DMAX
2
•RDS(ON) •DMAX •ρT
+ k •VO1.85 •IO(MAX)
1– DMAX
•CRSS •f
The I2R power savings that result from not having a discrete
sense resistor can be calculated almost by inspection.
PR(SENSE) =IO(MAX)
1– DMAX
2
•RSENSE •DMAX
To understand the magnitude of the improvement with
this VDS sensing technique, consider the 3.3V input, 5V
output power supply shown in the Typical Application on
the front page. The maximum load current is 7A (10A peak)
and the duty cycle is 39%. Assuming a ripple current of
40%, the peak inductor current is 13.8A and the average
applicaTions inForMaTion
Figure 7. Load Transient Response for a 3.3V Input,
5V Output Boost Converter Application, 0.1A to 1A Step
ILOAD
500mA/DIV
VOUT
200mV/DIV
AC-COUPLED
20µs/DIV 38721 F07
LTC3872-1
14
38721f
For more information www.linear.com/LTC3872-1
is 11.5A. With a maximum sense voltage of about 140mV,
the sense resistor value would be 10mΩ, and the power
dissipated in this resistor would be 514mW at maximum
output current. Assuming an efficiency of 90%, this
sense resistor power dissipation represents 1.3% of the
overall input power. In other words, for this application,
the use of VDS sensing would increase the efficiency by
approximately 1.3%.
For more details regarding the various terms in these
equations, please refer to the section Boost Converter:
Power MOSFET Selection.
3. The losses in the inductor are simply the DC input cur-
rent squared times the winding resistance. Expressing this
loss as a function of the output current yields:
PR(WINDING) =IO(MAX)
1– DMAX
2
•RW
4. Losses in the boost diode. The power dissipation in the
boost diode is:
PDIODE = IO(MAX) • VD
The boost diode can be a major source of power loss in
a boost converter. For the 3.3V input, 5V output at 7A ex-
ample given above, a Schottky diode with a 0.4V forward
voltage would dissipate 2.8W
, which represents 7% of the
input power. Diode losses can become significant at low
output voltages where the forward voltage is a significant
percentage of the output voltage.
5. Other losses, including CIN and CO ESR dissipation and
inductor core losses, generally account for less than 2%
of the total additional loss.
Checking Transient Response
The regulator loop response can be verified by looking at
the load transient response. Switching regulators generally
take several cycles to respond to an instantaneous step
in resistive load current. When the load step occurs, VO
immediately shifts by an amount equal to (DILOAD)(ESR),
and then CO begins to charge or discharge (depending on
the direction of the load step) as shown in Figure 7. The
regulator feedback loop acts on the resulting error amp
output signal to return VO to its steady-state value. During
this recovery time, VO can be monitored for overshoot or
ringing that would indicate a stability problem.
A second, more severe transient can occur when con-
necting loads with large (>1µF) supply bypass capacitors.
The discharged bypass capacitors are effectively put in
parallel with CO, causing a nearly instantaneous drop in
VO. No regulator can deliver enough current to prevent
this problem if the load switch resistance is low and it is
driven quickly. The only solution is to limit the rise time
of the switch drive in order to limit the inrush current
di/dt to the load.
Boost Converter Design Example
The design example given here will be for the circuit shown
on the front page. The input voltage is 3.3V, and the output
is 5V at a maximum load current of 2A.
1. The duty cycle is:
D = VO+ VD– VIN
VO+ VD
=5+ 0.4 – 3.3
5 + 0.4 = 38.9%
2. An inductor ripple current of 40% of the maximum load
current is chosen, so the peak input current (which is also
the minimum saturation current) is:
IIN(PEAK) = 1+ χ
2
•IO(MAX)
1– DMAX
= 1.2 •2
1– 0. 39 = 3.9A
The inductor ripple current is:
∆IL=c•
I
O(MAX)
1–D
MAX
= 0.4 •2
1– 0.39 =1.3A
And so the inductor value is:
L =
V
IN(MIN)
∆I
L
•f•DMAX =3.3V
1.3A •550kHz •0.39 =1.8µH
The component chosen is a 2.2µH inductor made by
Sumida (part number CEP125-H 1ROMH).
applicaTions inForMaTion
LTC3872-1
15
38721f
For more information www.linear.com/LTC3872-1
3. Assuming a MOSFET junction temperature of 125°C,
the room temperature MOSFET RDS(ON) should be less
than:
RDS(ON) ≤ V ENSS E(MAX) •1–DMAX
1+ χ
2
•IO(MAX) •ρT
= 0.175V •1– 0.39
1+ 0.4
2
•2A •1.5
≈ 30mΩ
The MOSFET used was the Si3460 DDV, which has a maxi-
mum RDS(ON) of 27mΩ at 4.5V VGS, a BVDSS of greater
than 30V, and a gate charge of 13.5nC at 4.5V VGS.
4. The diode for this design must handle a maximum DC
output current of 2A and be rated for a minimum reverse
voltage of VOUT, or 5V. A 25A, 15V diode from On Semi-
conductor (MBRB2515L) was chosen for its high power
dissipation capability.
5. The output capacitor usually consists of a lower valued,
low ESR ceramic.
6. The choice of an input capacitor for a boost converter
depends on the impedance of the source supply and the
amount of input ripple the converter will safely tolerate.
For this particular design two 22µF Taiyo Yuden ceramic
capacitors (JMK325BJ226MM) are required (the input
and return lead lengths are kept to a few inches). As
with the output node, check the input ripple with a single
oscilloscope probe connected across the input capacitor
terminals.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3872-1. These items are illustrated graphically
in the layout diagram in Figure 8. Check the following in
your layout:
1. The Schottky diode should be closely connected between
the output capacitor and the drain of the external MOSFET.
2. The input decoupling capacitor (0.1µF) should be con-
nected closely between VIN and GND.
3. The trace from SW to the switch point should be kept
short.
4. Keep the switching node NGATE away from sensitive
small signal nodes.
5. The VFB pin should connect directly to the feedback
resistors. The resistive divider R1 and R2 must be con-
nected between the (+) plate of COUT and signal ground.
Figure 8. LTC3872-1 Layout Diagram (See PC Board Layout Checklist)
IPRG
ITH
VFB
GND
SW
RUN/SS
VIN
NGATE
LTC3872-1
38721 F08
R1
R2
RITH
CIN COUT
V
OUT
VIN
CITH
+ +
D1
M1L1
BOLD LINES INDICATE HIGH CURRENT PATHS
applicaTions inForMaTion
LTC3872-1
16
38721f
For more information www.linear.com/LTC3872-1
High Efficiency 3.3V Input, 12V Output Boost Converter
Typical applicaTions
ILOAD
1A/DIV
STEP FROM
500mA TO 1.5A
IL
5A/DIV
VOUT
12V
AC-COUPLED
100µs/DIV 38721 F10
ITH
IPRG
GND
VFB
VIN
SW
NGATE
LTC3872-1
M1
38721 F09
RUN/SS
23.2k
4.7M
11.8k
1%
107k
1%
COUT1: TAIYO YUDEN TMK325B7226MM
L1: COILTRONICS DR125-2R2
M1: VISHAY Si4114DY
0.1µF
CIN
10µF
COUT1
22µF
×2
2.2nF
100pF
COUT2
120µF
L1
2.2µH
VIN
3.3V
VOUT
12V
1.5A
+
PDS1040
LTC3872-1
17
38721f
For more information www.linear.com/LTC3872-1
High Efficiency 5V Input, 12V Output Boost Converter
High Efficiency 5V Input, 24V Output Boost Converter
Typical applicaTions
ILOAD
500mA/DIV
STEP FROM
100mA TO 600mA
IL
5A/DIV
500mV/DIV
AC-COUPLED
VOUT
500µs/DIV 38721 TA03b
LOAD (mA)
1
0
EFFICIENCY (%)
20
30
40
50
60
70
10 100
38721 TA04b
80
90
100
10
1000
ILOAD
500mA/DIV
STEP FROM
100mA TO 600mA
IL
5A/DIV
500mV/DIV
AC-COUPLED
VOUT
500µs/DIV 38721 TA04c
Efficiency Load Step
ITH
IPRG
GND
VFB
VIN
SW
NGATE
LTC3872-1
UPS840
38721 TA04a
RUN/SS
52.3k
4.7M
12.1k
1% 232k
1%
COUT1: TAIYO YUDEN UMK325BJ106MM-T
L1: WURTH WE-HCF 8.2µH 7443550820
M1: VISHAY Si4174DY
CIN
10µF
COUT1
10µF
×2
1nF
0.068µF
COUT2
68µF
L1
8.2µH
M1
VIN
5V
VOUT
24V
1A
100pF
+
ITH
IPRG
GND
VFB
VIN
SW
NGATE
LTC3872-1
SBM835L
38721 TA03a
RUN/SS
11k
4.7M
11.8k
1% 107k
1%
COUT1: TAIYO YUDEN TMK325B7226MM
L1: TOKO D124C 892NAS-3R3M
M1: IRF3717
CIN
10µF
COUT1
22µF
×2
2.2nF
100pF
1nF
COUT2
68µF
L1
3.3µH
M1
VIN
5V
VOUT
12V
2A
+
LTC3872-1
18
38721f
For more information www.linear.com/LTC3872-1
High Efficiency 5V Input, 48V Output Boost Converter
RUN/SS
5V/DIV
VOUT
20V/DIV
IL
5A/DIV
40ms/DIV 38721 TA05b
VOUT
500mV/DIV
AC-COUPLED
IL
2A/DIV
ILOAD
200mA/DIV
500µs/DIV 38721 TA05c
Soft-Start Load Step
Typical applicaTions
LOAD (mA)
1
60
EFFICIENCY (%)
80
100
10 100
1000
38721 TA05d
40
50
70
90
30
20
Efficiency
ITH
IPRG
GND
VFB
VIN
SW
NGATE
LTC3872-1
D1M1
38721 TA05a
RUN/SS
63.4k
1%
1M
12.1k
1%
475k
1%
CIN
10µF
COUT1
2.2µF
×3
2.2nF
0.33µF
COUT2
68µF
L1
10µH
VIN
5V
VOUT
48V
0.5A
COUT1: NIPPON CHEMI-CON KTS101B225M43N
D1: DIODES INC. PDS760
L1: SUMIDA CDEP147NP-100
M1: VISHAY Si7850DP
VIN
+
LTC3872-1
19
38721f
For more information www.linear.com/LTC3872-1
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702 Rev B)
2.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
0.56 ± 0.05
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
R = 0.05
TYP
2.15 ±0.05
(2 SIDES)
3.00 ±0.10
(2 SIDES)
14
85
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0 – 0.05
(DDB8) DFN 0905 REV B
0.25 ± 0.05
2.20 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.61 ±0.05
(2 SIDES)
1.15 ±0.05
0.70 ±0.05
2.55
±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
PIN 1
R = 0.20 OR
0.25 × 45°
CHAMFER
0.50 BSC
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.22 – 0.36
8 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
TS8 TSOT-23 0710 REV A
2.90 BSC
(NOTE 4)
0.65 BSC
1.95 BSC
0.80 – 0.90
1.00 MAX 0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.40
MAX
0.65
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
TS8 Package
8-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1637 Rev A)
LTC3872-1
20
38721f
For more information www.linear.com/LTC3872-1
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
LINEAR TECHNOLOGY CORPORATION 2014
LT 0214 • PRINTED IN USA
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC3872-1
relaTeD parTs
PART NUMBER DESCRIPTION COMMENTS
LTC3786 Low IQ Synchronous Step-Up Controller 4.5V(Down to 2.5V After Start-Up) ≤ VIN ≤ 38V, VOUT Up to 60V, 55µA
Quiescent Current, 3mm × 3mm QFN-16, MSOP-16E
LTC3787/LTC3787-1 Single Output, Dual Channel Multiphase Synchronous
Step-Up Controller
4.5V(Down to 2.5V After Start-Up) ≤ VIN ≤ 38V, VOUT Up to 60V, 50kHz to
900kHz Operating Frequency, 4mm × 5mm QFN-28, SSOP-28
LTC3788/LTC3788-1 Multiphase, Dual Output Synchronous Step-Up
Controller
4.5V(Down to 2.5V After Start-Up) ≤ VIN ≤ 38V, VOUT Up to 60V, 50kHz to
900kHz Fixed Operating Frequency, 5mm × 5mm QFN-32, SSOP-28
LTC3862/LTC3862-1 Multiphase, Dual Channel Single Output Current Mode
Step-Up DC/DC Controller
4V ≤ VIN ≤ 36V, 5V or 10V Gate Drive, 75kHz to 500kHz Fixed Operating
Frequency, SSOP-24, TSSOP-24, 5mm × 5mm QFN-24
LT3757A/LT3758/
LT3759
Boost, Flyback, SEPIC and Inverting Controller 1.6V/2.9V ≤ VIN ≤ 40V/100V, 100kHz to 1MHz Fixed Operating Frequency,
3mm × 3mm DFN-10 and MSOP-10E
LT3957A/LT3958/
LT3959
Boost, Flyback, SEPIC and Inverting Converters with
Onboard Power Switch
1.6V/3V/5V ≤ VIN ≤ 40V/80V, 100kHz to 1MHz Programmable Operation
Frequency, 5mm × 6mm QFN Package
LTC1871/LTC1871-1/
LTC1871-7
Wide Input Range, No RSENSE Low Quiescent Current
Flyback, Boost and SEPIC Controller
2.5V ≤ VIN ≤ 36V, 50kHz to 1MHz Fixed Operating Frequency, IQ = 250µA,
MSOP-10
LTC3859AL Low IQ, Triple Output Buck/Buck/Boost Synchronous
DC/DC Controller
All Outputs Remain in Regulation Through Cold Crank, 4.5V(Down to
2.5V After Start-Up) ≤ VIN ≤ 38V, VOUT(BUCKS) Up to 24V, VOUT(BOOST) Up
to 60V, IQ = 28µA
3.3V Input, 5V/2A Output Boost Converter
Typical applicaTion
ITH
IPRG
GND
VFB
VIN
SW
NGATE
LTC3872-1
D1
M1
38721 TA02
RUN/SS
17.4k
VIN
11k
1%
34.8k
1%
CIN
10µF
COUT
100µF
×2
1.8nF
47pF
L1
1µH
VIN
3.3V
VOUT
5V
2A
D1: DIODES INC. B320
L1: TOKO FDV0630-1R0
M1: VISHAY Si3460DDV
1 M
1nF