4
DC ELECTRICAL CHARACTERISTICS1
(VDD = 3.3V-0.3V; -55°C < TC < +125°C)
Notes:
1. Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground.
2. Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at a time, do not exceed
maximum junction temperature specification.
3. Guaranteed by characterization.
4. Devices are tested @ 3.6V only.
5. Clock outputs guaranteed by design.
6. Post 100Krad and 300Krad, ICCZ = 200µA.
SYMBOL PARAMETER CONDITION MIN MAX UNIT
CMOS/TTL DC SPECIFICATIONS
VIH High-level input voltage 2.0 VDD V
VIL Low-level input voltage GND 0.8V
IIH High-level input current VIN = 3.6V; VDD = 3.6V -10 +10 µA
IIL Low-level input current VIN = 0V; VDD = 3.6V -10 +10 µA
VCL Input clamp voltage ICL = -18mA -1.5 V
ICS Cold Spare Leakage current VIN = 3.6V; VDD = VSS -20 +20 µA
LVDS OUTPUT DC SPECIFICATIONS (OUT+, OUT-)
VOD5Differential Output Voltage RL = 100Ω (See Figure 14) 250 400 mV
∆VOD5Change in VOD between
complimentary output states RL = 100Ω (See Figure 14) 35 mV
VOS5Offset Voltage RL = 100Ω, 1.120 1.410 V
∆VOS5Change in VOS between
complimentary output states RL = 100Ω35 mV
IOZ4Output Three-State Current PWR DWN = 0V
VOUT = 0V or VDD
-10 +10 µΑ
ICSOUT Cold Spare Leakage Current VIN=3.6V, VDD = VSS -20 +20 µΑ
IOS2,3 Output Short Circuit Current VOUT+ or VOUT- = 0V 5mA mA
Supply Current
ICCL4Transmitter supply current with
loads RL = 100Ω all channels (figure 4)
CL = 5pF, f = 50MHz
65.0 mA
ICCZ4,6 Power down current DIN = VSS
PWR DWN = 0V, f = 0Hz
60.0µA
Vos
2
---------------------------
=