OPA314
OPA2314
OPA4314
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SBOS563D –MAY 2011–REVISED MARCH 2012
3-MHz, Low-Power, Low-Noise, RRIO, 1.8-V CMOS
OPERATIONAL AMPLIFIER
Check for Samples: OPA314,OPA2314,OPA4314
1FEATURES DESCRIPTION
The OPA314 family of single-, dual-, and quad-
2• Low IQ: 150 µA/ch channel operational amplifiers represents a new
• Wide Supply Range: 1.8 V to 5.5 V generation of low-power, general-purpose CMOS
• Low Noise: 14 nV/√Hz at 1 kHz amplifiers. Rail-to-rail input and output swings, low
quiescent current (150 μA typ at 5.0 VS) combined
• Gain Bandwidth: 3 MHz with a wide bandwidth of 3 MHz, and very low noise
• Low Input Bias Current: 0.2 pA (14 nV/√Hz at 1 kHz) make this family very attractive
• Low Offset Voltage: 0.5 mV for a variety of battery-powered applications that
require a good balance between cost and
• Unity-Gain Stable performance. The low input bias current supports
• Internal RF/EMI Filter applications with mega-ohm source impedances.
• Extended Temperature Range: The robust design of the OPA314 devices provides
–40°C to +125°C ease-of-use to the circuit designer: unity-gain stability
with capacitive loads of up to 300 pF, an integrated
APPLICATIONS RF/EMI rejection filter, no phase reversal in overdrive
• Battery-Powered Instruments: conditions, and high electrostatic discharge (ESD)
protection (4-kV HBM).
– Consumer, Industrial, Medical
– Notebooks, Portable Media Players These devices are optimized for low-voltage
operation as low as +1.8 V (±0.9 V) and up to +5.5 V
• Photodiode Amplifiers (±2.75 V), and are specified over the full extended
• Active Filters temperature range of –40°C to +125°C.
• Remote Sensing The OPA314 (single) is available in both SC70-5 and
• Wireless Metering SOT23-5 packages. The OPA2314 (dual) is offered in
• Handheld Test Equipment SO-8, MSOP-8, and DFN-8 packages. The quad-
channel OPA4314 is offered in a TSSOP-14 package.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2011–2012, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
OPA314
OPA2314
OPA4314
SBOS563D –MAY 2011–REVISED MARCH 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE INFORMATION(1)
PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING
SC70-5 DCK SAA
OPA314 SOT23-5 DBV RAZ
SO-8 D O2314
OPA2314 MSOP-8 DGK OCPQ
DFN-8 DRB QXY
OPA4314 TSSOP-14 PW OPA4314
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range, unless otherwise noted. OPA314, OPA2314, OPA4314 UNIT
Supply voltage 7 V
Voltage(2) (V–) – 0.5 to (V+) + 0.5 V
Signal input terminals Current(2) ±10 mA
Output short-circuit(3) Continuous mA
Operating temperature, TA–40 to +150 °C
Storage temperature, Tstg –65 to +150 °C
Junction temperature, TJ+150 °C
Human body model (HBM) 4000 V
ESD rating Charged device model (CDM) 1000 V
Machine model (MM) 200 V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails should
be current limited to 10 mA or less.
(3) Short-circuit to ground, one amplifier per package.
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SBOS563D –MAY 2011–REVISED MARCH 2012
ELECTRICAL CHARACTERISTICS: VS= +1.8 V to +5.5 V(1)
Boldface limits apply over the specified temperature range: TA= –40°C to +125°C.
At TA= +25 °C, RL= 10 kΩconnected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
OPA314, OPA2314, OPA4314
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage VCM = (VS+) – 1.3 V 0.5 2.5 mV
dVOS/dT vs Temperature 1 μV/°C
PSRR vs power supply VCM = (VS+) – 1.3 V 78 92 dB
Over temperature 74 dB
Channel separation, dc At dc 10 µV/V
INPUT VOLTAGE RANGE
VCM Common-mode voltage range (V–) – 0.2 (V+) + 0.2 V
VS= 1.8 V to 5.5 V, (VS–) – 0.2 V < VCM < (VS+) – 1.3 V 75 96 dB
CMRR Common-mode rejection ratio VS= 5.5 V, VCM = –0.2 V to 5.7 V(2) 66 80 dB
VS= 1.8 V, (VS–) – 0.2 V < VCM < (VS+) – 1.3 V 70 86 dB
Over temperature VS= 5.5 V, (VS–) – 0.2 V < VCM < (VS+) – 1.3 V 73 90 dB
VS= 5.5 V, VCM = –0.2 V to 5.7 V(2) 60 dB
INPUT BIAS CURRENT
IBInput bias current ±0.2 ±10 pA
Over temperature ±600 pA
IOS Input offset current ±0.2 ±10 pA
Over temperature ±600 pA
NOISE
Input voltage noise (peak-to- f = 0.1 Hz to 10 Hz 5 μVPP
peak)
f = 10 kHz 13 nV/√Hz
enInput voltage noise density f = 1 kHz 14 nV/√Hz
inInput current noise density f = 1 kHz 5 fA/√Hz
INPUT CAPACITANCE
Differential VS= 5.0 V 1 pF
CIN Common-mode VS= 5.0 V 5 pF
OPEN-LOOP GAIN
VS= 1.8 V, 0.2 V < VO< (V+) – 0.2 V, RL= 10 kΩ90 115 dB
VS= 5.5 V, 0.2 V < VO< (V+) – 0.2 V, RL= 10 kΩ100 128 dB
AOL Open-loop voltage gain VS= 1.8 V, 0.5 V < VO< (V+) – 0.5 V, RL= 2 kΩ(2) 90 100 dB
VS= 5.5 V, 0.5 V < VO< (V+) – 0.5 V, RL= 2 kΩ(2) 94 110 dB
VS= 5.5 V, 0.2 V < VO< (V+) – 0.2 V, RL= 10 kΩ90 110 dB
Over temperature VS= 5.5 V, 0.5 V < VO< (V+) – 0.2 V, RL= 2 kΩ100 dB
Phase margin VS= 5.0 V, G = +1, RL= 10 kΩ65 deg
(1) Parameters with minimum or maximum specification limits are 100% production tested at +25ºC, unless otherwise noted. Over
temperature limits are based on characterization and statistical analysis.
(2) Specified by design and characterization; not production tested.
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SBOS563D –MAY 2011–REVISED MARCH 2012
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ELECTRICAL CHARACTERISTICS: VS= +1.8 V to +5.5 V(1) (continued)
Boldface limits apply over the specified temperature range: TA= –40°C to +125°C.
At TA= +25 °C, RL= 10 kΩconnected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
OPA314, OPA2314, OPA4314
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
FREQUENCY RESPONSE
VS= 1.8 V, RL= 10 kΩ, CL= 10 pF 2.7 MHz
GBW Gain-bandwidth product VS= 5.0 V, RL= 10 kΩ, CL= 10 pF 3 MHz
SR Slew rate(3) VS= 5.0 V, G = +1 1.5 V/μs
To 0.1%, VS= 5.0 V, 2-V step , G = +1 2.3 μs
tSSettling time To 0.01%, VS= 5.0V, 2-V step , G = +1 3.1 μs
Overload recovery time VS= 5.0 V, VIN × Gain > VS5.2 μs
Total harmonic distortion +
THD+N VS= 5.0 V, VO= 1 VRMS, G = +1, f = 1 kHz, RL= 10 kΩ0.001 %
noise(4)
OUTPUT
VS= 1.8 V, RL= 10 kΩ5 15 mV
VS= 5.5 V, RL= 10 kΩ5 20 mV
Voltage output swing from supply
VOrails VS= 1.8 V, RL= 2 kΩ15 30 mV
VS= 5.5 V, RL= 2 kΩ22 40 mV
VS= 5.5 V, RL= 10 kΩ30 mV
Over temperature VS= 5.5 V, RL= 2 kΩ60 mV
ISC Short-circuit current VS= 5.0 V ±20 mA
ROOpen-loop output impedance VS= 5.5 V, f = 100 Hz 570 Ω
POWER SUPPLY
VSSpecified voltage range 1.8 5.5 V
OPA314, OPA2314, OPA4314, VS= 1.8 V, IO= 0 mA 130 180 µA
IQQuiescent current per amplifier OPA2314, OPA4314, VS= 5.0 V, IO= 0 mA 150 190 µA
OPA314, VS= 5.0 V, IO= 0 mA 150 210 µA
Over temperature VS= 5.0 V, IO= 0 mA 220 µA
Power-on time VS= 0 V to 5 V, to 90% IQlevel 44 µs
TEMPERATURE
Specified range –40 +125 °C
Operating range –40 +150 °C
Storage range –65 +150 °C
(3) Signifies the slower value of the positive or negative slew rate.
(4) Third-order filter; bandwidth = 80 kHz at –3 dB.
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SBOS563D –MAY 2011–REVISED MARCH 2012
THERMAL INFORMATION: OPA314 OPA314
THERMAL METRIC(1) DBV (SOT23) DCK (SC70) UNITS
5 PINS 5 PINS
θJA Junction-to-ambient thermal resistance 228.5 281.4
θJC(top) Junction-to-case(top) thermal resistance 99.1 91.6
θJB Junction-to-board thermal resistance 54.6 59.6 °C/W
ψJT Junction-to-top characterization parameter 7.7 1.5
ψJB Junction-to-board characterization parameter 53.8 58.8
θJC(bottom) Junction-to-case(bottom) thermal resistance N/A N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
THERMAL INFORMATION: OPA2314 OPA2314
THERMAL METRIC(1) D (SO) DGK (MSOP) DRB (DFN) UNITS
8 PINS 8 PINS 8 PINS
θJA Junction-to-ambient thermal resistance 138.4 191.2 53.8
θJC(top) Junction-to-case(top) thermal resistance 89.5 61.9 69.2
θJB Junction-to-board thermal resistance 78.6 111.9 20.1 °C/W
ψJT Junction-to-top characterization parameter 29.9 5.1 3.8
ψJB Junction-to-board characterization parameter 78.1 110.2 20.0
θJC(bottom) Junction-to-case(bottom) thermal resistance N/A N/A 11.6
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
THERMAL INFORMATION: OPA4314 OPA4314
THERMAL METRIC(1) PW (TSSOP) UNITS
14 PINS
θJA Junction-to-ambient thermal resistance 121.0
θJC(top) Junction-to-case(top) thermal resistance 49.4
θJB Junction-to-board thermal resistance 62.8 °C/W
ψJT Junction-to-top characterization parameter 5.9
ψJB Junction-to-board characterization parameter 62.2
θJC(bottom) Junction-to-case(bottom) thermal resistance N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 5
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1
2
3
5
4
V+
OUT
+IN
V-
-IN
1
2
3
5
4
V+
-IN
OUT
V-
+IN
OUTA
-INA
+INA
V-
1
2
3
4
V+
OUTB
-INB
+INB
8
7
6
5
Exposed
Thermal
DiePad
on
Underside(2)
1
2
3
4
8
7
6
5
V+
OUTB
-INB
+INB
OUTA
-INA
+INA
V-
1
2
3
4
14
13
12
11
OUTD
-IND
+IND
V-
OUTA
-INA
+INA
V+
5
6
7
10
9
8
+INC
-INC
OUTC
+INB
-INB
OUTB
A
B
D
C
OPA314
OPA2314
OPA4314
SBOS563D –MAY 2011–REVISED MARCH 2012
www.ti.com
PIN CONFIGURATIONS
DCK PACKAGE DBV PACKAGE
SC70-5 SOT23-5
(TOP VIEW) (TOP VIEW)
DRB PACKAGE(1) D, DGK PACKAGES
DFN-8 SO-8, MSOP-8
(TOP VIEW) (TOP VIEW)
PW PACKAGE
TSSOP-14
(TOP VIEW)
(1) Pitch: 0,65 mm.
(2) Connect thermal pad to V–. Pad size: 1,8 mm × 1,5 mm.
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SBOS563D –MAY 2011–REVISED MARCH 2012
TYPICAL CHARACTERISTICS
Table 1. Characteristic Performance Measurements
TITLE FIGURE
Open-Loop Gain and Phase vs Frequency Figure 1
Open-Loop Gain vs Temperature Figure 2
Quiescent Current vs Supply Voltage Figure 3
Quiescent Current vs Temperature Figure 4
Offset Voltage Production Distribution Figure 5
Offset Voltage Drift Distribution Figure 6
Offset Voltage vs Common-Mode Voltage (Maximum Supply) Figure 7
Offset Voltage vs Temperature Figure 8
CMRR and PSRR vs Frequency (RTI) Figure 9
CMRR and PSRR vs Temperature Figure 10
0.1-Hz to 10-Hz Input Voltage Noise (5.5 V) Figure 11
Input Voltage Noise Spectral Density vs Frequency (1.8 V, 5.5 V) Figure 12
Input Voltage Noise vs Common-Mode Voltage (5.5 V) Figure 13
Input Bias and Offset Current vs Temperature Figure 14
Open-Loop Output Impedance vs Frequency Figure 15
Maximum Output Voltage vs Frequency and Supply Voltage Figure 16
Output Voltage Swing vs Output Current (over Temperature) Figure 17
Closed-Loop Gain vs Frequency, G = 1, –1, 10 (1.8 V) Figure 18
Closed-Loop Gain vs Frequency, G = 1, –1, 10 (5.5 V) Figure 19
Small-Signal Overshoot vs Load Capacitance Figure 20
Small-Signal Step Response, Noninverting (1.8 V) Figure 21
Small-Signal Step Response, Noninverting ( 5.5 V) Figure 22
Large-Signal Step Response, Noninverting (1.8 V) Figure 23
Large-Signal Step Response, Noninverting ( 5.5 V) Figure 24
Positive Overload Recovery Figure 25
Negative Overload Recovery Figure 26
No Phase Reversal Figure 27
Channel Separation vs Frequency (Dual) Figure 28
THD+N vs Amplitude (G = +1, 2 kΩ, 10 kΩ)Figure 29
THD+N vs Amplitude (G = –1, 2 kΩ, 10 kΩ)Figure 30
THD+N vs Frequency (0.5 VRMS, G = +1, 2 kΩ, 10 kΩ)Figure 31
EMIRR Figure 32
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140
120
100
80
60
40
20
0
20-
0
20-
-
-
-
-
-
-
-
40
60
80
100
120
140
160
Gain (dB)
Phase ( )°
101 100 1k 10k 100k 1M 10M
Frequency (Hz)
R = 10 k /10 pF
V = 2.5 V
W
L
S±
140
130
120
110
100
Open-Loop Gain (dB)
-50 -25 0 25 50 75 100 125
Temperature (°C)
2 k , 5.5 VW
10 k , 1.8 VW
10 k , 5.5 VW
180
170
160
150
140
130
120
110
100
90
80
Quiescent Current ( A/Ch)m
1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Supply Voltage (V)
160
155
150
145
140
135
130
125
120
Quiescent Current ( A/Ch)m
-50 -25 0 25 50 75 100 125
Temperature (°C)
V = 1.8 V
S
V = 5.5 V
S
30
25
20
15
10
5
0
Percent of Amplifiers (%)
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Offset Voltage Drift ( V/ C)m°
12
10
8
6
4
2
0
Percent of Amplifiers (%)
Offset Voltage (mV)
-1.4
-1.3
-1.2
-1.1
-1.0
-0.9
-0.8
-0.7
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
OPA314
OPA2314
OPA4314
SBOS563D –MAY 2011–REVISED MARCH 2012
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TYPICAL CHARACTERISTICS
At TA= +25°C, RL= 10 kΩconnected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
OPEN-LOOP GAIN AND PHASE OPEN-LOOP GAIN
vs FREQUENCY vs TEMPERATURE
Figure 1. Figure 2.
QUIESCENT CURRENT QUIESCENT CURRENT
vs SUPPLY vs TEMPERATURE
Figure 3. Figure 4.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION OFFSET VOLTAGE DRIFT DISTRIBUTION
Figure 5. Figure 6.
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1000
800
600
400
200
0
200
400
600
800
1000
-
-
-
-
-
Offset Voltage ( V)m
-2.75 0
-2-1.25 -0.5 0.5 1.25 2 2.75
Common-Mode Voltage (V)
Typical Units
V = ±2.75 V
S
1500
1000
500
0
500
1000
1500-
-
-
-40 -25 520 35 50 65 80 95 110 125
Temperature (°C)
-10
Offset Voltage ( V)m
Typical Units
V = ±2.75 V
S
120
100
80
60
40
20
0
Common-Mode Rejection Ratio (dB),
Power-Supply Rejection Ratio (dB)
10 100 1k 10k 100k 1M
Frequency (Hz)
V = ±2.75 V
S
+PSRR
PSRR-
CMRR
104
102
100
98
96
94
92
90
88
86
84
-50 -25 0 25 50 75 100 125
Temperature (°C)
PSRR
CMRR
Common-Mode Rejection Ratio (dB),
Power-Supply Rejection Ratio (dB)
Voltage (0.5 V/div)m
Time (1 s/div)
100
10
Voltage Noise (nv/ )ÖHz
10 100 1k 10k 100k
Frequency (Hz)
V = ±2.75 V
S
V = ±0.9 V
S
OPA314
OPA2314
OPA4314
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SBOS563D –MAY 2011–REVISED MARCH 2012
TYPICAL CHARACTERISTICS (continued)
At TA= +25°C, RL= 10 kΩconnected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
OFFSET VOLTAGE vs COMMON-MODE VOLTAGE OFFSET VOLTAGE vs TEMPERATURE
Figure 7. Figure 8.
CMRR AND PSRR CMRR AND PSRR
vs FREQUENCY (Referred-to-Input) vs TEMPERATURE
Figure 9. Figure 10.
INPUT VOLTAGE NOISE SPECTRAL DENSITY
0.1-Hz to 10-Hz INPUT VOLTAGE NOISE vs FREQUENCY
Figure 11. Figure 12.
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0 1 2 3 4 5
Common-Mode Input Voltage (V)
0.5 1.5 2.5 3.5 4.5 5.5
20
18
16
14
12
10
Voltage Noise (nV/ )ÖHz
V = ±2.75 V
f = 1 kHz
S
1000
900
800
700
600
500
400
300
200
100
0
Input Bias Current (pA)
-50 -25 0 25 50 75 100 125 150
Temperature (°C)
IOS
IB
100k
10k
1k
1
Output Impedance ( )W
1 10 100 1k 10k 100k 1M 10M
Frequency (Hz)
V = ±2.75 V
S
V = ±0.9 V
S
6
5
4
3
2
1
0
Voltage (V )
PP
10k 100k 1M 10M
Frequency (Hz)
V = 5.5 V
IN
IN
IN
V = 3.3 V
V = 1.8 V
R = 10 k
C = 10 pF
W
L
L
3
2
1
0
1
2
3
-
-
-
Output Voltage Swing (V)
0510 15 20 25 30 35 40
Output Current (mA)
V = ±2.75 V
S
-40°C
+25°C
+125°C
40
20
0
20-
Gain (dB)
10k 100k 1M 10M
Frequency (Hz)
G = 1 V/V-
G = +1 V/V
G = +10 V/V
V = 1.8 V
S
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SBOS563D –MAY 2011–REVISED MARCH 2012
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TYPICAL CHARACTERISTICS (continued)
At TA= +25°C, RL= 10 kΩconnected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
VOLTAGE NOISE INPUT BIAS AND OFFSET CURRENT
vs COMMON-MODE VOLTAGE vs TEMPERATURE
Figure 13. Figure 14.
OPEN-LOOP OUTPUT IMPEDANCE MAXIMUM OUTPUT VOLTAGE
vs FREQUENCY vs FREQUENCY AND SUPPLY VOLTAGE
Figure 15. Figure 16.
OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT (Over Temperature) CLOSED-LOOP GAIN vs FREQUENCY
Figure 17. Figure 18.
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40
20
0
20-
Gain (dB)
10k 100k 1M 10M
Frequency (Hz)
G = 1 V/V-
G = +1 V/V
G = +10 V/V
V = 5.5 V
S
0 200 400 600 800 1000 1200
Capacitive Load (pF)
70
60
50
40
30
20
10
0
Overshoot (%)
V = ±2.75 V
Gain = +1 V/V
R = 10 kW
S
L
Voltage (25 mV/div)
Time (1 s/div)m
Z
Z
L
L
= 10 pF + 10 kW
= 100 pF + 10 kW
Gain = +1
V = ±0.9 V
R = 10 kW
S
F
VIN
Voltage (25 mV/div)
Time (1 s/div)m
Z
Z
L
L
= 10 pF + 10 kW
= 100 pF + 10 kW
Gain = +1
V = ±2.75 V
R = 10 kW
S
F
VIN
Time (1 s/div)m
1
0.75
0.5
0.25
0
0.25
0.5
0.75
1
-
-
-
-
Voltage (V)
Gain = +1
V = ±0.9 V
R = 10 kW
S
L
VIN
VOUT
Time (1 s/div)m
2
1.5
1
0.5
0
0.5
1
1.5
2
-
-
-
-
Voltage (V)
Gain = +1
V = ±2.75 V
R = 10 kW
S
L
VIN
VOUT
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SBOS563D –MAY 2011–REVISED MARCH 2012
TYPICAL CHARACTERISTICS (continued)
At TA= +25°C, RL= 10 kΩconnected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
CLOSED-LOOP GAIN vs FREQUENCY SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE
Figure 19. Figure 20.
SMALL-SIGNAL PULSE RESPONSE (Noninverting) SMALL-SIGNAL PULSE RESPONSE (Inverting)
Figure 21. Figure 22.
LARGE-SIGNAL PULSE RESPONSE (Noninverting) LARGE-SIGNAL PULSE RESPONSE (Inverting)
Figure 23. Figure 24.
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0 2 46 8 10 12 14
Time (2 s/div)m
3
2.5
2
1.5
1
0.5
0
0.5
1
-
-
Voltage (0.5 V/div)
Input
Output
0 2 46 8 10 12 14
Time (2 s/div)m
1
0.5
0
0.5
1
-
-
-
-
-
-
1.5
2
2.5
3
Voltage (0.5 V/div)
Input
Output
4
3
2
1
0
1
2
3
4
-
-
-
-
0 250 500 750 1000
Time (125 s/div)m
Voltage (1 V/div)
V
V
IN
OUT
-
-
-
-
60
80
100
120
140-
Channel Separation (dB)
100 1k 10k 100k 1M 10M
Frequency (Hz)
V = 2.75 V
S±
0.1
0.01
0.001
0.0001
Total Harmonic Distortion + Noise (%)
0.01 0.1 1 10
Output Amplitude ( )VRMS
V = ±2.5 V
f = 1 kHz
BW = 80 kHz
G = +1 V/V
S
Load = 2 kW
Load = 10 kW
0.1
0.01
0.001
0.0001
Total Harmonic Distortion + Noise (%)
0.01 0.1 1 10
Output Amplitude ( )VRMS
V = ±2.5 V
f = 1 kHz
BW = 80 kHz
G = 1 V/V
S
-
Load = 2 kW
Load = 10 kW
OPA314
OPA2314
OPA4314
SBOS563D –MAY 2011–REVISED MARCH 2012
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TA= +25°C, RL= 10 kΩconnected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
POSITIVE OVERLOAD RECOVERY NEGATIVE OVERLOAD RECOVERY
Figure 25. Figure 26.
CHANNEL SEPARATION vs FREQUENCY
NO PHASE REVERSAL OPA2314
Figure 27. Figure 28.
THD+N vs OUTPUT AMPLITUDE THD+N vs OUTPUT AMPLITUDE
(G = +1 V/V) (G = –1 V/V)
Figure 29. Figure 30.
12 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): OPA314 OPA2314 OPA4314
0
10
20
30
40
50
60
70
80
90
100
110
120
10M 100M 1G 10G
Frequency (Hz)
EMIRR IN+ (dB)
PRF = −10 dBm
VS = ±2.5 V
VCM = 0 V
G001
0.1
0.01
0.001
0.0001
Total Harmonic Distortion + Noise (%)
10 100 1k 10k 100k
Frequency (Hz)
V = ±2.5 V
V = 0.5 V
BW = 80 kHz
G = +1 V/V
S
OUT RMS
Load = 2 kW
Load = 10 kW
OPA314
OPA2314
OPA4314
www.ti.com
SBOS563D –MAY 2011–REVISED MARCH 2012
TYPICAL CHARACTERISTICS (continued)
At TA= +25°C, RL= 10 kΩconnected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
ELECTROMAGNETIC INTERFERENCE REJECTION RATIO
REFERRED TO NONINVERTING INPUT (EMIRR IN+) vs
THD+N vs FREQUENCY FREQUENCY
Figure 31. Figure 32.
Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): OPA314 OPA2314 OPA4314
Reference
Current
V+
VIN-
VIN+
V
(Ground)
-
VBIAS2
VBIAS1 Class AB
Control
Circuitry
VO
OPA314
OPA2314
OPA4314
SBOS563D –MAY 2011–REVISED MARCH 2012
www.ti.com
APPLICATION INFORMATION
The OPA314 is a family of low-power, rail-to-rail input and output operational amplifiers specifically designed for
portable applications. These devices operate from 1.8 V to 5.5 V, are unity-gain stable, and suitable for a wide
range of general-purpose applications. The class AB output stage is capable of driving ≤10-kΩloads connected
to any point between V+ and ground. The input common-mode voltage range includes both rails, and allows the
OPA314 series to be used in virtually any single-supply application. Rail-to-rail input and output swing
significantly increases dynamic range, especially in low-supply applications, and makes them ideal for driving
sampling analog-to-digital converters (ADCs).
The OPA314 features 3-MHz bandwidth and 1.5-V/μs slew rate with only 150-μA supply current per channel,
providing good ac performance at very low power consumption. DC applications are also well served with a very
low input noise voltage of 14 nV/√Hz at 1 kHz, low input bias current (0.2 pA), and an input offset voltage of
0.5 mV (typical).
OPERATING VOLTAGE
The OPA314 series op amps are fully specified and ensured for operation from +1.8 V to +5.5 V. In addition,
many specifications apply from –40°C to +125°C. Parameters that vary significantly with operating voltages or
temperature are shown in the Typical Characteristics graphs. Power-supply pins should be bypassed with 0.01-
μF ceramic capacitors.
RAIL-TO-RAIL INPUT
The input common-mode voltage range of the OPA314 series extends 200 mV beyond the supply rails. This
performance is achieved with a complementary input stage: an N-channel input differential pair in parallel with a
P-channel differential pair, as shown in Figure 33. The N-channel pair is active for input voltages close to the
positive rail, typically (V+) – 1.3 V to 200 mV above the positive supply, while the P-channel pair is on for inputs
from 200 mV below the negative supply to approximately (V+) – 1.3 V. There is a small transition region, typically
(V+) – 1.4 V to (V+) – 1.2 V, in which both pairs are on. This 200-mV transition region can vary up to 300 mV
with process variation. Thus, the transition region (both stages on) can range from (V+) – 1.7 V to (V+) – 1.5 V
on the low end, up to (V+) – 1.1 V to (V+) – 0.9 V on the high end. Within this transition region, PSRR, CMRR,
offset voltage, offset drift, and THD may be degraded compared to device operation outside this region.
Figure 33. Simplified Schematic
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Product Folder Link(s): OPA314 OPA2314 OPA4314
5kW
10mA max
V+
VIN
VOUT
IOVERLOAD
OPA314
OPA314
OPA2314
OPA4314
www.ti.com
SBOS563D –MAY 2011–REVISED MARCH 2012
INPUT AND ESD PROTECTION
The OPA314 family incorporates internal electrostatic discharge (ESD) protection circuits on all pins. In the case
of input and output pins, this protection primarily consists of current-steering diodes connected between the input
and power-supply pins. These ESD protection diodes also provide in-circuit, input overdrive protection, as long
as the current is limited to 10 mA as stated in the Absolute Maximum Ratings.Figure 34 shows how a series
input resistor may be added to the driven input to limit the input current. The added resistor contributes thermal
noise at the amplifier input and its value should be kept to a minimum in noise-sensitive applications.
Figure 34. Input Current Protection
COMMON-MODE REJECTION RATIO (CMRR)
CMRR for the OPA314 is specified in several ways so the best match for a given application may be used; see
the Electrical Characteristics. First, the CMRR of the device in the common-mode range below the transition
region [VCM < (V+) – 1.3 V] is given. This specification is the best indicator of the capability of the device when
the application requires use of one of the differential input pairs. Second, the CMRR over the entire common-
mode range is specified at (VCM = –0.2 V to 5.7 V). This last value includes the variations seen through the
transition region (see Figure 7).
EMI SUSCEPTIBILITY AND INPUT FILTERING
Operational amplifiers vary with regard to the susceptibility of the device to electromagnetic interference (EMI). If
conducted EMI enters the op amp, the dc offset observed at the amplifier output may shift from its nominal value
while EMI is present. This shift is a result of signal rectification associated with the internal semiconductor
junctions. While all op amp pin functions can be affected by EMI, the signal input pins are likely to be the most
susceptible. The OPA314 operational amplifier family incorporate an internal input low-pass filter that reduces the
amplifiers response to EMI. Both common-mode and differential mode filtering are provided by this filter. The
filter is designed for a cutoff frequency of approximately 80 MHz (–3 dB), with a roll-off of 20 dB per decade.
Texas Instruments has developed the ability to accurately measure and quantify the immunity of an operational
amplifier over a broad frequency spectrum extending from 10 MHz to 6 GHz. The EMI rejection ratio (EMIRR)
metric allows op amps to be directly compared by the EMI immunity. Figure 32 illustrates the results of this
testing on the OPAx314. Detailed information can also be found in the application report, EMI Rejection Ratio of
Operational Amplifiers (SBOA128), available for download from www.ti.com.
RAIL-TO-RAIL OUTPUT
Designed as a micro-power, low-noise operational amplifier, the OPA314 delivers a robust output drive capability.
A class AB output stage with common-source transistors is used to achieve full rail-to-rail output swing capability.
For resistive loads up to 10 kΩ, the output swings typically to within 5 mV of either supply rail regardless of the
power-supply voltage applied. Different load conditions change the ability of the amplifier to swing close to the
rails; refer to the typical characteristic graph, Output Voltage Swing vs Output Current.
Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): OPA314 OPA2314 OPA4314
VIN
VOUT
V+
RS
10 to
20
W
WRLCL
OPA314
OPA314
OPA2314
OPA4314
SBOS563D –MAY 2011–REVISED MARCH 2012
www.ti.com
CAPACITIVE LOAD AND STABILITY
The OPA314 is designed to be used in applications where driving a capacitive load is required. As with all op
amps, there may be specific instances where the OPA314 can become unstable. The particular op amp circuit
configuration, layout, gain, and output loading are some of the factors to consider when establishing whether or
not an amplifier is stable in operation. An op amp in the unity-gain (+1-V/V) buffer configuration that drives a
capacitive load exhibits a greater tendency to be unstable than an amplifier operated at a higher noise gain. The
capacitive load, in conjunction with the op amp output resistance, creates a pole within the feedback loop that
degrades the phase margin. The degradation of the phase margin increases as the capacitive loading increases.
When operating in the unity-gain configuration, the OPA314 remains stable with a pure capacitive load up to
approximately 1 nF. The equivalent series resistance (ESR) of some very large capacitors (CLgreater than 1 μF)
is sufficient to alter the phase characteristics in the feedback loop such that the amplifier remains stable.
Increasing the amplifier closed-loop gain allows the amplifier to drive increasingly larger capacitance. This
increased capability is evident when observing the overshoot response of the amplifier at higher voltage gains.
See the typical characteristic graph, Small-Signal Overshoot vs. Capacitive Load.
One technique for increasing the capacitive load drive capability of the amplifier operating in a unity-gain
configuration is to insert a small resistor, typically 10 Ωto 20 Ω, in series with the output, as shown in Figure 35.
This resistor significantly reduces the overshoot and ringing associated with large capacitive loads. One possible
problem with this technique, however, is that a voltage divider is created with the added series resistor and any
resistor connected in parallel with the capacitive load. The voltage divider introduces a gain error at the output
that reduces the output swing.
Figure 35. Improving Capacitive Load Drive
DFN PACKAGE
The OPA2314 (dual version) uses the DFN style package (also known as SON); this package is a QFN with
contacts on only two sides of the package bottom. This leadless package maximizes printed circuit board (PCB)
space and offers enhanced thermal and electrical characteristics through an exposed pad. One of the primary
advantages of the DFN package is its low, 0.9-mm height. DFN packages are physically small, have a smaller
routing area, improved thermal performance, reduced electrical parasitics, and use a pinout scheme that is
consistent with other commonly-used packages, such as SO and MSOP. Additionally, the absence of external
leads eliminates bent-lead issues.
The DFN package can easily be mounted using standard PCB assembly techniques. See Application Note,
QFN/SON PCB Attachment (SLUA271) and Application Report, Quad Flatpack No-Lead Logic Packages
(SCBA017), both available for download from www.ti.com.
NOTE
The exposed leadframe die pad on the bottom of the DFN package should be connected
to the most negative potential (V–).
16 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): OPA314 OPA2314 OPA4314
RGRF
R1
C1
VIN
VOUT
= 1 +
V
V
OUT
IN
R
R
F
G
1
1 + sR C
1 1
( (
((
1
2pR C
1 1
f =
-3 dB
RG
RF
R2
R1
C2
VIN
VOUT 1
2pRC
f =
-3 dB
C1
R R = R
C C = C
Q = Peaking factor
(Butterworth Q = 0.707)
1
1 2
2
=
=
RG=
(
(
RF
2-1
Q
OPA314
OPA2314
OPA4314
www.ti.com
SBOS563D –MAY 2011–REVISED MARCH 2012
APPLICATION EXAMPLES
GENERAL CONFIGURATIONS
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required.
The simplest way to establish this limited bandwidth is to place an RC filter at the noninverting terminal of the
amplifier, as Figure 36 shows.
Figure 36. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this
task, as Figure 37 shows. For best results, the amplifier should have a bandwidth that is eight to 10 times the
filter frequency bandwidth. Failure to follow this guideline can result in phase shift of the amplifier.
Figure 37. Two-Pole Low-Pass Sallen-Key Filter
Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): OPA314 OPA2314 OPA4314
OPA314
OPA2314
OPA4314
SBOS563D –MAY 2011–REVISED MARCH 2012
www.ti.com
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (February 2012) to Revision D Page
• Changed product status from mixed status to production data ............................................................................................ 1
• Deleted shading and footnote 2 from Package Information table ........................................................................................ 2
Changes from Revision B (December 2011) to Revision C Page
• Changed first Features bullet ................................................................................................................................................ 1
• Deleted shading from OPA314 SOT23-5 row (DBV package) in Package Information table .............................................. 2
• Added OPA2314, OPA4314 to first two Power Supply, Quiescent current per amplifier parameter rows in Electrical
Characteristics table ............................................................................................................................................................. 4
• Added OPA314 Power Supply, Quiescent current per amplifier parameter row to Electrical Characteristics table ............ 4
Changes from Revision A (August 2011) to Revision B Page
• Deleted shading from OPA2314 MSOP-8 row in Package Information table ...................................................................... 2
18 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): OPA314 OPA2314 OPA4314
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
OPA2314AID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2314AIDGK ACTIVE VSSOP DGK 8 80 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA2314AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA2314AIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2314AIDRBR ACTIVE SON DRB 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2314AIDRBT ACTIVE SON DRB 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA314AIDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA314AIDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA314AIDCKR ACTIVE SC70 DCK 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
OPA314AIDCKT ACTIVE SC70 DCK 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
OPA4314AIPW ACTIVE TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA4314AIPWR ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 2
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF OPA2314 :
•Enhanced Product: OPA2314-EP
NOTE: Qualified Version Definitions:
•Enhanced Product - Supports Defense, Aerospace and Medical Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
OPA2314AIDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
OPA2314AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
OPA2314AIDRBR SON DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
OPA2314AIDRBT SON DRB 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
OPA314AIDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
OPA314AIDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
OPA314AIDCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3
OPA4314AIPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
OPA2314AIDGKR VSSOP DGK 8 2500 366.0 364.0 50.0
OPA2314AIDR SOIC D 8 2500 367.0 367.0 35.0
OPA2314AIDRBR SON DRB 8 3000 367.0 367.0 35.0
OPA2314AIDRBT SON DRB 8 250 210.0 185.0 35.0
OPA314AIDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
OPA314AIDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
OPA314AIDCKR SC70 DCK 5 3000 180.0 180.0 18.0
OPA4314AIPWR TSSOP PW 14 2000 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 2
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