2002 Microchip Technology Inc. DS21191J-page 1
M24AA128/24LC128/24FC128
Features
• Low power CMOS technology
- Maximum write current 3 mA at 5.5 V
- Maximum read current 400 µA at 5.5 V
- Standby current 100 nA typical at 5.5 V
• 2-wire serial interface bus, I2C™ compatible
• Cascadable for up to eight devices
• Self-timed ERASE/WRITE cycle
• 64-byte page-write mode available
• 5 ms max write-cycle time
• Hardware write protect for entire array
• Output slope control to eliminate ground bounce
• Schmitt trigger inputs for noise suppression
• 1,000,000 erase/write cycles
• Electrostatic discharge protection > 4000 V
• Data retention > 200 years
• 8-pin PDIP, SOIC, TSSOP, MSOP and DFN
packages
• 14-lead TSSOP package
• Temperature ranges:
Device Selection Table
Description
The Microchip Technology Inc. 24AA128/24LC128/
24FC128 (24XX128*) is a 16K x 8 (128 Kbit) Serial
Electrically Erasable PROM (EEPROM), capable of
operation across a broad voltage range (1.8 V to
5.5 V). It has been developed for advanced, low power
applications such as personal communications or data
acquisition. This device also has a page-write capabil-
ity of up to 64 bytes of data. This device is capable of
both random and sequential reads up to the 128K
boundary. Functional address lines allow up to eight
devices on the same bus, for up to 1 Mbit address
space. This device is available in the standard 8-pin
plastic DIP, SOIC (150 and 208 mil), TSSOP, MSOP,
DFN and 14-lead TSSOP packages.
Block Diagram
Package Types
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
Part
Number
VCC
Range
Max. Clock
Frequency
Temp.
Ranges
24AA128 1.8-5.5 V 400 kHz(1) I
24LC128 2.5-5.5 V 400 kHz I, E
24FC128 2.5-5.5 V 1 MHz I
Note 1: 100 kHz for VCC < 2.5 V.
HV GENERATOR
EEPROM
ARRAY
PAGE LATCHES
YDEC
XDEC
SENSE AMP
R/W CONTROL
MEMORY
CONTROL
LOGIC
I/O
CONTROL
LOGIC
I/O
A0 A1 A2
SDA
SCL
VCC
VSS
WP
A0
A1
A2
VSS
VCC
WP
SCL
SDA
1
2
3
4
8
7
6
5
24XX128
PDIP/SOIC TSSOP/MSOP *
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
TSSOP
24XX128
DFN
A0
A1
A2
VSS
WP
SCL
SDA
24XX128
5
6
7
8
4
3
2
1VCC
NC
A0
A1
NC
A2
VSS
NC
NC
VCC
WP
NC
SCL
SDA
NC
24XX128
1
2
3
4
14
13
12
11
510
69
78
* Pins A0 and A1 are no connects for the MSOP package only.
128K I2C™CMOS Serial EEPROM
*24XX128 is used in this document as a generic part number for the 24AA128/24LC128/24FC128 devices.
24AA128/24LC128/24FC128
DS21191J-page 2 2002 Microchip Technology Inc.
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
VCC............................................................................................................................................................................6.5 V
All inputs and outputs w.r.t. VSS ....................................................................................................... -0.6 V to VCC +1.0 V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temp. with power applied ..........................................................................................................-65°C to +125°C
ESD protection on all pins ......................................................................................................................................................≥ 4kV
1.1 24AA128/24LC128/24FC128 DC Specifications
† NOTICE: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at those or any other conditions above those indicated in
the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
DC SPECIFICATIONS
Electrical Characteristics:
Industrial (I): VCC = +1.8 V to 5.5 V TAMB = -40°C to +85°C
Automotive (E): VCC = +2.5 V to 5.5 V TAMB = -40°C to 125°C
Param.
No. Sym. Characteristic Min. Max. Units Conditions
D1 — A0, A1, A2, SCL, SDA, and
WP pins:
————
D2 VIH High level input voltage 0.7 VCC —V—
D3 VIL Low level input voltage — 0.3 VCC
0.2 VCC
V
V
VCC ≥ 2.5 V
VCC < 2.5 V
D4 VHYS Hysteresis of Schmitt Trigger
inputs
(SDA, SCL pins)
0.05 VCC —VVCC ≥ 2.5 V (Note 1)
D5 VOL Low level output voltage — 0.40 V IOL = 3.0 mA @ VCC = 4.5 V
IOL = 2.1 mA @ VCC = 2.5 V
D6 ILI Input leakage current — ±10 µA VIN = VSS or VCC, WP = VSS
VIN = VSS or VCC, WP = VCC
D7 ILO Output leakage current — ±10 µA VOUT = VSS or VCC
D8 CIN,
COUT
Pin capacitance
(all inputs/outputs)
—10pFVCC = 5.0 V (Note 1)
T
AMB = 25°C, fC= 1 MHz
D9 ICC Read Operating current — 400 µA VCC = 5.5 V, SCL = 400 kHz
ICC Write — 3 mA VCC = 5.5 V
D10 ICCS Standby current — 1 µA TAMB = -40°C to +85°C
SCL = SDA = VCC = 5.5 V
A0, A1, A2, WP = VSS
—5µATAMB = -40°C to 125°C
SCL = SDA = VCC = 5.5 V
A0, A1, A2, WP = VSS
Note 1: This parameter is periodically sampled and not 100% tested.
2002 Microchip Technology Inc. DS21191J-page 3
24AA128/24LC128/24FC128
1.2 24AA128/24LC128/24FC128 AC SPECIFICATIONS
AC SPECIFICATIONS
Electrical Characteristics:
Industrial (I): VCC = +1.8 V to 5.5 V TAMB = -40°C to +85°C
Automotive (E): VCC = +2.5 V to 5.5 V TAMB = -40°C to 125°C
Param.
No. Sym. Characteristic Min. Max. Units Conditions
1F
CLK Clock frequency —
—
—
100
400
1000
kHz 1.8 V ≤ VCC < 2.5 V
2.5 V ≤ VCC ≤ 5.5 V
2.5 V ≤ VCC ≤ 5.5 V 24FC128
2T
HIGH Clock high time 4000
600
500
—
—
—
ns 1.8 V ≤ VCC < 2.5 V
2.5 V ≤ VCC ≤ 5.5 V
2.5 V ≤ VCC ≤ 5.5 V 24FC128
3T
LOW Clock low time 4700
1300
500
—
—
—
ns 1.8 V ≤ VCC < 2.5 V
2.5 V ≤ VCC ≤ 5.5 V
2.5 V ≤ VCC ≤ 5.5 V 24FC128
4T
RSDA and SCL rise time
(Note 1)
—
—
—
1000
300
300
ns 1.8 V ≤ VCC < 2.5 V
2.5 V ≤ VCC ≤ 5.5 V
2.5 V ≤ VCC ≤ 5.5 V 24FC128
5T
FSDA and SCL fall time
(Note 1)
—
—
300
100
ns All except, 24FC128
2.5 V ≤ VCC ≤ 5.5 V 24FC128
6T
HD:STA START condition hold time 4000
600
250
—
—
—
ns 1.8 V ≤ VCC < 2.5 V
2.5 V ≤ VCC ≤ 5.5 V
2.5 V ≤ VCC ≤ 5.5 V 24FC128
7T
SU:STA START condition setup time 4700
600
250
—
—
—
ns 1.8 V ≤ VCC < 2.5 V
2.5 V ≤ VCC ≤ 5.5 V
2.5 V ≤ VCC ≤ 5.5 V 24FC128
8T
HD:DAT Data input hold time 0 — ns (Note 2)
9T
SU:DAT Data input setup time 250
100
100
—
—
—
ns 1.8 V ≤ VCC < 2.5 V
2.5 V ≤ VCC ≤ 5.5 V
2.5 V ≤ VCC ≤ 5.5 V 24FC128
10 T
SU:STO STOP condition setup time 4000
600
250
—
—
—
ns 1.8 V ≤ VCC < 2.5 V
2.5 V ≤ VCC ≤ 5.5 V
2.5 V ≤ VCC ≤ 5.5 V 24FC128
11 TSU:WP WP setup time 4000
600
600
—
—
—
ns 1.8 V ≤ VCC < 2.5 V
2.5 V ≤ VCC ≤ 5.5 V
2.5 V ≤ VCC ≤ 5.5 V 24FC128
12 THD:WP WP hold time 4700
1300
1300
—
—
—
ns 1.8 V ≤ VCC < 2.5 V
2.5 V ≤ VCC ≤ 5.5 V
2.5 V ≤ VCC ≤ 5.5 V 24FC128
13 TAA Output valid from clock
(Note 2)
—
—
—
3500
900
400
ns 1.8 V ≤ VCC < 2.5 V
2.5 V ≤ VCC ≤ 5.5 V
2.5 V ≤ VCC ≤ 5.5 V 24FC128
14 TBUF Bus free time: Time the bus
must be free before a new
transmission can start
4700
1300
500
—
—
—
ns 1.8 V ≤ VCC < 2.5 V
2.5 V ≤ VCC ≤ 5.5 V
2.5 V ≤ VCC ≤ 5.5 V 24FC128
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt trigger inputs, which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model, which can be obtained on Microchip’s website:
www.microchip.com.
24AA128/24LC128/24FC128
DS21191J-page 4 2002 Microchip Technology Inc.
FIGURE 1-1: BUS TIMING DATA
15 T
OF Output fall time from VIH
minimum to VIL maximum
CB ≤ 100 pF
10 + 0.1CB250
250
ns All except, 24FC128 (Note 1)
24FC128 (Note 1)
16 TSP Input filter spike suppression
(SDA and SCL pins)
— 50 ns All except, 24FC128 (Notes 1
and 3)
17 TWC Write cycle time (byte or
page)
—5ms—
18 — Endurance 1,000,000 — cycles 25°C (Note 4)
1.2 24AA128/24LC128/24FC128 AC SPECIFICATIONS (Continued)
AC SPECIFICATIONS
Electrical Characteristics:
Industrial (I): VCC = +1.8 V to 5.5 V TAMB = -40°C to +85°C
Automotive (E): VCC = +2.5 V to 5.5 V TAMB = -40°C to 125°C
Param.
No. Sym. Characteristic Min. Max. Units Conditions
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt trigger inputs, which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model, which can be obtained on Microchip’s website:
www.microchip.com.
(unprotected)
(protected)
SCL
SDA
IN
SDA
OUT
WP
5
7
6
16
3
2
89
13
D4 4
10
11 12
14
2002 Microchip Technology Inc. DS21191J-page 5
24AA128/24LC128/24FC128
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE
2.1 A0, A1, A2 Chip Address Inputs
The A0, A1 and A2 inputs are used by the 24XX128 for
multiple device operations. The levels on these inputs
are compared with the corresponding bits in the slave
address. The chip is selected if the compare is true.
For the MSOP package only, pins A0 and A1 are not
connected.
Up to eight devices (two for the MSOP package) may
be connected to the same bus by using different chip
select bit combinations. If these pins are left uncon-
nected, the inputs will be pulled down internally to VSS.
If they are tied to VCC or driven high, the internal pull-
down circuitry is disabled.
In most applications, the chip address inputs A0, A1,
and A2 are hard-wired to logic ‘0’ or logic ‘1’. For appli-
cations in which these pins are controlled by a micro-
controller or other programmable device, the chip
address pins must be driven to logic ‘0’ or logic ‘1’
before normal device operation can proceed.
2.2 Serial Data (SDA)
This is a bi-directional pin used to transfer addresses
and data into and out of the device. It is an open drain
terminal. Therefore, the SDA bus requires a pull-up
resistor to VCC (typical 10 KΩ for 100 kHz, 2 KΩ for
400 kHz and 1 MHz).
For normal data transfer, SDA is allowed to change
only during SCL LOW. Changes during SCL HIGH are
reserved for indicating the START and STOP condi-
tions.
2.3 Serial Clock (SCL)
This input is used to synchronize the data transfer to
and from the device.
2.4 Write Protect (WP)
This pin can be connected to either VSS, VCC or left
floating. Internal pull-down circuitry on this pin will keep
the device in the unprotected state if left floating. If tied
to VSS or left floating, normal memory operation is
enabled (read/write the entire memory 0000-3FFF).
If tied to VCC, WRITE operations are inhibited. Read
operations are not affected.
3.0 FUNCTIONAL DESCRIPTION
The 24XX128 supports a bi-directional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as a transmitter and a device
receiving data as a receiver. The bus must be con-
trolled by a master device which generates the serial
clock (SCL), controls the bus access and generates the
START and STOP conditions while the 24XX128 works
as a slave. Both master and slave can operate as a
transmitter or receiver, but the master device deter-
mines which mode is activated.
Name 8-pin
PDIP
8-pin
SOIC
8-pin
TSSOP
14-pin
TSSOP
8-pin
MSOP
8-pin
DFN Function
A0 1 1 1 1 — 1 User Configurable Chip Select
A1 2 2 2 2 — 2 User Configurable Chip Select
(NC) — — — 3, 4, 5 1,2 — Not Connected
A2 3 3 3 6 3 3 User Configurable Chip Select
VSS 4 4 4 7 4 4 Ground
SDA 5 5 5 8 5 5 Serial Data
SCL 6 6 6 9 6 6 Serial Clock
(NC) — — — 10, 11,12 — — Not Connected
WP 7 7 7 13 7 7 Write Protect Input
VCC 8 8 8 14 8 8 +1.8 V to 5.5 V (24AA128)
+2.5 V to 5.5 V (24LC128)
+2.5 V to 5.5 V (24FC128)
24AA128/24LC128/24FC128
DS21191J-page 6 2002 Microchip Technology Inc.
4.0 BUS CHARACTERISTICS
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
• During data transfer, the data line must remain
stable whenever the clock line is HIGH. Changes
in the data line while the clock line is HIGH will be
interpreted as a START or STOP condition.
Accordingly, the following bus conditions have been
defined (Figure 4-1).
4.1 Bus not Busy (A)
Both data and clock lines remain HIGH.
4.2 Start Data Transfer (B)
A HIGH to LOW transition of the SDA line while the
clock (SCL) is HIGH determines a START condition. All
commands must be preceded by a START condition.
4.3 Stop Data Transfer (C)
A LOW to HIGH transition of the SDA line, while the
clock (SCL) is HIGH, determines a STOP condition. All
operations must end with a STOP condition.
4.4 Data Valid (D)
The state of the data line represents valid data when,
after a START condition, the data line is stable for the
duration of the HIGH period of the clock signal.
The data on the line must be changed during the LOW
period of the clock signal. There is one bit of data per
clock pulse.
Each data transfer is initiated with a START condition
and terminated with a STOP condition. The number of
the data bytes transferred between the START and
STOP conditions is determined by the master device.
4.5 Acknowledge
Each receiving device, when addressed, is obliged to
generate an acknowledge signal after the reception of
each byte. The master device must generate an extra
clock pulse, which is associated with this acknowledge
bit.
A device that acknowledges must pull down the SDA
line during the acknowledge clock pulse in such a way
that the SDA line is stable LOW during the HIGH period
of the acknowledge related clock pulse. Of course,
setup and hold times must be taken into account. Dur-
ing reads, a master must signal an end of data to the
slave by NOT generating an acknowledge bit on the
last byte that has been clocked out of the slave. In this
case, the slave (24XX128) will leave the data line HIGH
to enable the master to generate the STOP condition.
FIGURE 4-1: DATA TRANSFER SEQUENCE ON THE SERIAL BUS
FIGURE 4-2: ACKNOWLEDGE TIMING
Note: The 24XX128 does not generate any
acknowledge bits if an internal
programming cycle is in progress.
ADDRESS OR
ACKNOWLEDGE
VALID
DATA
ALLOWED
TO CHANGE
STOP
CONDITION
START
CONDITION
SCL
SDA
(A) (B) (D) (D) (C) (A)
SCL 987654321123
Transmitter must release the SDA line at this point,
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
Receiver must release the SDA line
at this point so the Transmitter can
continue sending data.
Data from transmitter
SDA
Acknowledge
Bit
Data from transmitter
2002 Microchip Technology Inc. DS21191J-page 7
24AA128/24LC128/24FC128
5.0 DEVICE ADDRESSING
A control byte is the first byte received following the
start condition from the master device (Figure 5-1). The
control byte consists of a 4-bit control code. For the
24XX128, this is set as 1010 binary for read and write
operations. The next three bits of the control byte are
the chip select bits (A2, A1, A0). The chip select bits
allow the use of up to eight 24XX128 devices on the
same bus and are used to select which device is
accessed. The chip select bits in the control byte must
correspond to the logic levels on the corresponding A2,
A1 and A0 pins for the device to respond. These bits
are, in effect, the three most significant bits of the word
address.
For the MSOP package, the A0 and A1 pins are not
connected. During device addressing, the A0 and A1
chip select bits (Figures 5-1 and 5-2) should be set to
‘0’. Only two 24XX128 MSOP packages can be con-
nected to the same bus.
The last bit of the control byte defines the operation to
be performed. When set to a one, a read operation is
selected. When set to a zero, a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 5-2). Because
only A13…A0 are used, the upper two address bits are
don’t care bits. The upper address bits are transferred
first, followed by the less significant bits.
Following the start condition, the 24XX128 monitors the
SDA bus checking the device type identifier being
transmitted. Upon receiving a 1010 code and appro-
priate device select bits, the slave device outputs an
acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24XX128 will select a read or
write operation.
FIGURE 5-1: CONTROL BYTE
FORMAT
5.1 Contiguous Addressing Across
Multiple Devices
The chip select bits A2, A1, A0 can be used to expand
the contiguous address space for up to 1 Mbit by add-
ing up to eight 24XX128s on the same bus. In this case,
software can use A0 of the control byte as address bit
A14; A1 as address bit A15; and A2 as address bit A16.
It is not possible to sequentially read across device
boundaries.
For the MSOP package, up to two 24XX128 devices
can be added for up to 256 Kbit of address space. In
this case, software can use A2 of the control byte as
address bit A16. Bits A0 (A14) and A1 (A15) of the con-
trol byte must always be set to logic ‘0’ for the MSOP.
FIGURE 5-2: ADDRESS SEQUENCE BIT ASSIGNMENTS
1 0 1 0 A2 A1 A0SACKR/W
Control Code
Chip Select
Bits
Slave Address
Acknowledge Bit
Start Bit
Read/Write Bit
1010A
2A
1A
0R/W XX A
11 A
10 A
9A
7A
0
A
8••••••
A
12
CONTROL BYTE ADDRESS HIGH BYTE ADDRESS LOW BYTE
CONTROL
CODE
CHIP
SELECT
BITS
X = Don’t Care Bit
A
13
24AA128/24LC128/24FC128
DS21191J-page 8 2002 Microchip Technology Inc.
6.0 WRITE OPERATIONS
6.1 Byte Write
Following the start condition from the master, the
control code (four bits), the chip select (three bits) and
the R/W bit (which is a logic low) are clocked onto the
bus by the master transmitter. This indicates to the
addressed slave receiver that the address high byte will
follow after it has generated an acknowledge bit during
the ninth clock cycle. Therefore, the next byte
transmitted by the master is the high-order byte of the
word address and will be written into the address
pointer of the 24XX128. The next byte is the least sig-
nificant address byte. After receiving another acknowl-
edge signal from the 24XX128, the master device will
transmit the data word to be written into the addressed
memory location. The 24XX128 acknowledges again
and the master generates a stop condition. This ini-
tiates the internal write cycle and during this time the
24XX128 will not generate acknowledge signals
(Figure 6-1). If an attempt is made to write to the array
with the WP pin held high, the device will acknowledge
the command but no write cycle will occur, no data will
be written and the device will immediately accept a new
command. After a byte write command, the internal
address counter will point to the address location fol-
lowing the one that was just written.
6.2 Page Write
The write control byte, word address and the first data
byte are transmitted to the 24XX128 in much the same
way as in a byte write. The exception is that instead of
generating a stop condition, the master transmits up to
63 additional bytes, which are temporarily stored in the
on-chip page buffer and will be written into memory
once the master has transmitted a stop condition. Upon
receipt of each word, the six lower address pointer bits
are internally incremented by ‘1’. If the master should
transmit more than 64 bytes prior to generating the stop
condition, the address counter will roll over and the pre-
viously received data will be overwritten. As with the
byte write operation, once the stop condition is
received, an internal write cycle will begin (Figure 6-2).
If an attempt is made to write to the array with the WP
pin held high, the device will acknowledge the com-
mand but no write cycle will occur, no data will be writ-
ten and the device will immediately accept a new
command.
6.3 Write Protection
The WP pin allows the user to write-protect the entire
array (0000-3FFF) when the pin is tied to VCC. If tied
to VSS or left floating, the write protection is disabled.
The WP pin is sampled at the STOP bit for every write
command (Figure 1-1). Toggling the WP pin after the
STOP bit will have no effect on the execution of the
write cycle.
FIGURE 6-1: BYTE WRITE
FIGURE 6-2: PAGE WRITE
Note: Page write operations are limited to
writing bytes within a single physical
page, regardless of the number of
bytes actually being written. Physical
page boundaries start at addresses
that are integer multiples of the page
buffer size (or ‘page size’) and end at
addresses that are integer multiples of
[page size - 1]. If a page write com-
mand attempts to write across a phys-
ical page boundary, the result is that
the data wraps around to the beginning
of the current page (overwriting data
previously stored there), instead of
being written to the next page, as
might be expected. It is, therefore, nec-
essary for the application software to
prevent page write operations that
would attempt to cross a page
boundary.
XX
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
A
R
T
CONTROL
BYTE
ADDRESS
HIGH BYTE
ADDRESS
LOW BYTE DATA
S
T
O
P
A
C
K
A
C
K
A
C
K
A
C
K
X = don’t care bit
S1010 0
A
2A
1A
0P
XX
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
A
R
T
CONTROL
BYTE
ADDRESS
HIGH BYTE
ADDRESS
LOW BYTE DATA BYTE 0
S
T
O
P
A
C
K
A
C
K
A
C
K
A
C
K
DATA BYTE 63
A
C
K
X = don’t care bit
S1010 0
A
2A
1A
0P
2002 Microchip Technology Inc. DS21191J-page 9
24AA128/24LC128/24FC128
7.0 ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (This feature can be used to maximize bus
throughput.) Once the STOP condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master
sending a START condition, followed by the control
byte for a write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, the start bit and control byte must
be resent. If the cycle is complete, then the device will
return the ACK and the master can then proceed with
the next read or write command. See Figure 7-1 for
flow diagram.
FIGURE 7-1: ACKNOWLEDGE
POLLING FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
Next
Operation
No
Yes
24AA128/24LC128/24FC128
DS21191J-page 10 2002 Microchip Technology Inc.
8.0 READ OPERATION
Read operations are initiated in much the same way as
write operations with the exception that the R/W bit of
the control byte is set to ‘1’. There are three basic types
of read operations: current address read, random read
and sequential read.
8.1 Current Address Read
The 24XX128 contains an address counter that main-
tains the address of the last word accessed, internally
incremented by ‘1’. Therefore, if the previous read
access was to address n (n is any legal address), the
next current address read operation would access data
from address n + 1.
Upon receipt of the control byte with R/W bit set to ‘1’,
the 24XX128 issues an acknowledge and transmits the
8-bit data word. The master will not acknowledge the
transfer but does generate a STOP condition and the
24XX128 discontinues transmission (Figure 8-1).
FIGURE 8-1: CURRENT ADDRESS
READ
8.2 Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, the word address must first
be set. This is done by sending the word address to the
24XX128 as part of a write operation (R/W bit set to
‘0’). Once the word address is sent, the master gener-
ates a start condition following the acknowledge. This
terminates the write operation, but not before the inter-
nal address pointer is set. The master then issues the
control byte again but with the R/W bit set to a ‘1’. The
24XX128 will then issue an acknowledge and transmit
the 8-bit data word. The master will not acknowledge
the transfer but does generate a stop condition, which
causes the 24XX128 to discontinue transmission
(Figure 8-2). After a random read command, the inter-
nal address counter will point to the address location
following the one that was just read.
8.3 Sequential Read
Sequential reads are initiated in the same way as a ran-
dom read except that after the 24XX128 transmits the
first data byte, the master issues an acknowledge as
opposed to the STOP condition used in a random read.
This acknowledge directs the 24XX128 to transmit the
next sequentially addressed 8-bit word (Figure 8-3).
Following the final byte transmitted to the master, the
master will NOT generate an acknowledge but will gen-
erate a STOP condition. To provide sequential reads,
the 24XX128 contains an internal address pointer
which is incremented by one at the completion of each
operation. This address pointer allows the entire mem-
ory contents to be serially read during one operation.
The internal address pointer will automatically roll over
from address 3FFF to address 0000 if the master
acknowledges the byte received from the array
address 3FFF.
FIGURE 8-2: RANDOM READ
FIGURE 8-3: SEQUENTIAL READ
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
PS
S
T
O
P
CONTROL
BYTE
S
T
A
R
T
DATA
A
C
K
N
O
A
C
K
1100
AAA1
BYTE
210
XX
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
A
C
K
N
O
A
C
K
A
C
K
A
C
K
A
C
K
S
T
O
P
S
T
A
R
T
CONTROL
BYTE
ADDRESS
HIGH BYTE
ADDRESS
LOW BYTE
CONTROL
BYTE
DATA
BYTE
S
T
A
R
T
X = Don’t Care Bit
S1010AAA0
210 S101 0AAA
1
210 P
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
CONTROL
BYTE DATA (n) DATA (n + 1) DATA (n + 2) DATA (n + X)
N
O
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
S
T
O
P
P
2002 Microchip Technology Inc. DS21191J-page 11
24AA128/24LC128/24FC128
9.0 PACKAGING INFORMATION
9.1 Package Marking Information
XXXXXXXX
XXXXXNNN
YYWW
8-Lead PDIP (300 mil) Example:
8-Lead TSSOP Example:
8-Lead SOIC (150 mil) Example:
XXXXXXXX
XXXXYYWW
NNN
XXXX
XYWW
NNN
8-Lead SOIC (208 mil) Example:
24LC128
0110017
I/SM
24AA128
I/P017
0110
Legend: XX...X Customer specific information*
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
*Standard device marking consists of Microchip part number, year code, week code, and traceability
code. For device marking beyond this, certain price adders apply. Please check with your Microchip
Sales Office.
XXXXXXXX
YYWWNNN
XXXXXXXX
24LC128
I/SN0110
017
4LC
I101
017
24AA128/24LC128/24FC128
DS21191J-page 12 2002 Microchip Technology Inc.
Package Marking Information (Continued)
14-Lead TSSOP Example:
XXXXXXXX
YYWW
NNN
Legend: XX...X Customer specific information*
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
*Standard device marking consists of Microchip part number, year code, week code, and traceability
code. For device marking beyond this, certain price adders apply. Please check with your Microchip
Sales Office.
8-Lead DFN Example:
XXXXXXXX
XXXXXXXX
YYWWNNN
24LC128
XXXXXXXX
0110017
8-Lead MSOP Example:
XXXXXX
YWWNNN
4L128I
101017
24LC128I
0110
017
2002 Microchip Technology Inc. DS21191J-page 13
24AA128/24LC128/24FC128
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
B1
B
A1
A
L
A2
p
α
E
eB
β
c
E1
n
D
1
2
Units INCHES* MILLIMETERS
Dimension Limits MIN NOM MAX MIN NOM MAX
Number of Pins n88
Pitch p.100 2.54
Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32
Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68
Base to Seating Plane A1 .015 0.38
Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26
Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60
Overall Length D .360 .373 .385 9.14 9.46 9.78
Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43
Lead Thickness c.008 .012 .015 0.20 0.29 0.38
Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78
Lower Lead Width B .014 .018 .022 0.36 0.46 0.56
Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92
Mold Draft Angle Top α51015 51015
Mold Draft Angle Bottom β51015 51015
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
JEDEC Equivalent: MS-001
Drawing No. C04-018
.010” (0.254mm) per side.
§ Significant Characteristic
24AA128/24LC128/24FC128
DS21191J-page 14 2002 Microchip Technology Inc.
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
Foot Angle f048048
1512015120
β
Mold Draft Angle Bottom
1512015120
α
Mold Draft Angle Top
0.510.420.33.020.017.013BLead Width
0.250.230.20.010.009.008
c
Lead Thickness
0.760.620.48.030.025.019LFoot Length
0.510.380.25.020.015.010hChamfer Distance
5.004.904.80.197.193.189DOverall Length
3.993.913.71.157.154.146E1Molded Package Width
6.206.025.79.244.237.228EOverall Width
0.250.180.10.010.007.004A1Standoff §
1.551.421.32.061.056.052A2Molded Package Thickness
1.751.551.35.069.061.053AOverall Height
1.27.050
p
Pitch
88
n
Number of Pins
MAXNOMMINMAXNOMMINDimension Limits
MILLIMETERSINCHES*Units
2
1
D
n
p
B
E
E1
h
L
β
c
45×
f
A2
α
A
A1
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
§ Significant Characteristic
2002 Microchip Technology Inc. DS21191J-page 15
24AA128/24LC128/24FC128
8-Lead Plastic Small Outline (SM) – Medium, 208 mil (SOIC)
Foot Angle f048048
1512015120
β
Mold Draft Angle Bottom
1512015120
α
Mold Draft Angle Top
0.510.430.36.020.017.014BLead Width
0.250.230.20.010.009.008
c
Lead Thickness
0.760.640.51.030.025.020LFoot Length
5.335.215.13.210.205.202DOverall Length
5.385.285.11.212.208.201E1Molded Package Width
8.267.957.62.325.313.300EOverall Width
0.250.130.05.010.005.002
A1
Standoff §
1.98.078A2Molded Package Thickness
2.03.080AOverall Height
1.27.050
p
Pitch
88
n
Number of Pins
MAXNOMMINMAXNOMMINDimension Limits
MILLIMETERSINCHES*Units
α
A2
A
A1
L
c
β
f
2
1
D
n
p
B
E
E1
.070 .075
.069 .074
1.78
1.75
1.97
1.88
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
Drawing No. C04-056
§ Significant Characteristic
24AA128/24LC128/24FC128
DS21191J-page 16 2002 Microchip Technology Inc.
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
10501050
β
Mold Draft Angle Bottom
10501050
α
Mold Draft Angle Top
0.300.250.19.012.010.007BLead Width
0.200.150.09.008.006.004
c
Lead Thickness
0.700.600.50.028.024.020LFoot Length
3.103.002.90.122.118.114DMolded Package Length
4.504.404.30.177.173.169E1Molded Package Width
6.506.386.25.256.251.246EOverall Width
0.150.100.05.006.004.002A1Standoff §
0.950.900.85.037.035.033A2Molded Package Thickness
1.10.043AOverall Height
0.65.026
p
Pitch
88
n
Number of Pins
MAXNOMMINMAXNOMMINDimension Limits
MILLIMETERS*INCHESUnits
α
A2
A
A1
L
c
β
φ
1
2
D
n
p
B
E
E1
Foot Angle φ048048
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
§ Significant Characteristic
2002 Microchip Technology Inc. DS21191J-page 17
24AA128/24LC128/24FC128
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
p
A
A1
A2
D
L
c
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
.037.035FFootprint (Reference)
exceed .010" (0.254mm) per side.
Notes:
Drawing No. C04-111
*Controlling Parameter
Mold Draft Angle Top
Mold Draft Angle Bottom
Foot Angle
Lead Width
Lead Thickness
β
α
c
B
φ
7
7
.004
.010
0
.006
.012
(F)
β
Dimension Limits
Overall Height
Molded Package Thickness
Molded Package Width
Overall Length
Foot Length
Standoff §
Overall Width
Number of Pins
Pitch
A
L
E1
D
A1
E
A2
.016
.114
.114
.022
.118
.118
.002
.030
.193
.034
MIN
p
n
Units
.026
NOM
8
INCHES
1.000.950.90.039
0.15
0.30
.008
.016
6
0.10
0.25
0
7
7
0.20
0.40
6
MILLIMETERS*
0.65
0.86
3.00
3.00
0.55
4.90
.044
.122
.028
.122
.038
.006
0.40
2.90
2.90
0.05
0.76
MINMAX NOM
1.18
0.70
3.10
3.10
0.15
0.97
MAX
8
α
E1
E
B
n 1
2
φ
§ Significant Characteristic
.184 .200 4.67 .5.08
24AA128/24LC128/24FC128
DS21191J-page 18 2002 Microchip Technology Inc.
8-Lead Micro Leadframe Package (MF) 6x5 mm Body (DFN-S) (Formerly MLF)
NOM
.050 BSC
INCHES
.194 BSC
.184 BSC
.226 BSC
.236 BSC
.008 REF.
DOverall Width
JEDEC equivalent: pending
Notes:
Drawing No. C04-113
Molded Package Width
Lead Width
*Controlling Parameter
Mold Draft Angle Top
Tie Bar Width
Lead Length
R
α
B
L
D1
.014
.020
Dimension Limits
Molded Package Thickness
Pitch
Overall Height
Overall Length
Molded Package Length
Base Thickness
Standoff
Number of Pins
A3
E1
E
A2
A1
A
.000
Units
n
p
MIN
TOP VIEW
12
A2
A
5.99 BSC
.019
12
.030
.014
.016
.024
0.35
0.50
.356
0.40
0.60
5.74 BSC
12
0.47
0.75
MILLIMETERS*
.039
.002
.031
.026
.0004
.033
0.00
8
MAX MIN
1.27 BSC
0.20 REF.
4.92 BSC
4.67 BSC
0.85
0.01
0.65 0.80
0.05
1.00
MAXNOM
8
BOTTOM VIEW
n
E
E1
PIN 1
p
B
Exposed Pad Length E2
Exposed Pad Width D2 .085 .091 .097 2.16 2.31 2.46
.152 .158 .163 3.85 4.00 4.15
EXPOSED
METAL
PADS
D2
E2
A1
A3
α
L
ID
D1 D
R
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side.
2002 Microchip Technology Inc. DS21191J-page 19
24AA128/24LC128/24FC128
8-Lead Micro Leadframe Package (MF) 6x5 mm Body (DFN-S) (Continued)
Pad Width
*Controlling Parameter
Drawing No. C04-2113
B .014 .016 .019 0.35 0.40 0.47
Pitch
MAX
Units
Dimension Limits
p
INCHES
.050 BSC
MIN NOM MAX
MILLIMETERS*
MIN
1.27 BSC
NOM
Pad Length
Pad to Solder Mask
L .020 .024 .030 0.50 0.60 0.75
M.005.0060.130.15
L
M
M
B
SOLDER
MASK
p
PACKAGE
EDGE
24AA128/24LC128/24FC128
DS21191J-page 20 2002 Microchip Technology Inc.
14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
840840
f
Foot Angle
10501050
β
Mold Draft Angle Bottom
10501050
α
Mold Draft Angle Top
0.300.250.19.012.010.007BLead Width
0.200.150.09.008.006.004
c
Lead Thickness
0.700.600.50.028.024.020LFoot Length
5.105.004.90.201.197.193DMolded Package Length
4.504.404.30.177.173.169E1Molded Package Width
6.506.386.25.256.251.246EOverall Width
0.150.100.05.006.004.002A1Standoff §
0.950.900.85.037.035.033A2Molded Package Thickness
1.10.043AOverall Height
0.65.026
p
Pitch
1414
n
Number of Pins
MAXNOMMINMAXNOMMINDimension Limits
MILLIMETERS*INCHESUnits
L
β
c
f
2
1
D
n
B
p
E1
E
α
A2A1
A
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-087
§ Significant Characteristic
2002 Microchip Technology Inc. Preliminary DS21191J-page 21
24AA128/24LC128/24FC128
Systems Information and Upgrade Hot Line
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive any currently available upgrade kits.The
Hot Line Numbers are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip
World Wide Web (WWW) site.
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape or Microsoft
Explorer. Files are also available for FTP download
from our FTP site.
Connecting to the Microchip Internet Web Site
The Microchip web site is available by using your
favorite Internet browser to attach to:
www.microchip.com
The file transfer site is available by using an FTP ser-
vice to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A vari-
ety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for products, Development Systems,
technical information and more
• Listing of seminars and events
013001
24AA128/24LC128/24FC128
DS21191J-page 22 Preliminary 2002 Microchip Technology Inc.
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this Data Sheet.
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this data sheet easy to follow? If not, why?
4. What additions to the data sheet do you think would enhance the structure and subject?
5. What deletions from the data sheet could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
8. How would you improve our software, systems, and silicon products?
To : Technical Publications Manager
RE: Reader Response
Total Pages Sent
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
Application (optional):
Would you like a reply? Y N
Device: Literature Number:
Questions:
FAX: (______) _________ - _________
DS21191J
24AA128/24LC128/24FC128
2002 Microchip Technology Inc. Preliminary DS21191J-page23
24AA128/24LC128/24FC128
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
PART NO. X/XX
PackageTemperature
Range
Device
Device: 24AA128: 128 Kbit 1.8V I2C Serial EEPROM
24AA128T: 128 Kbit 1.8V I2C Serial EEPROM
(Tape and Reel)
24LC128: 128 Kbit 2.5V I2C Serial EEPROM
24LC128T: 128 Kbit 2.5V I2C Serial EEPROM
(Tape and Reel)
24FC128: 128 Kbit 1 MHz I2C Serial EEPROM
24FC128T: 128 Kbit 1 MHz I2C Serial EEPROM
(Tape and Reel)
Temperature Range: I = -40°C to +85°C
E = -40°C to +125°C
Package: P = Plastic DIP (300 mil body), 8-lead
SN = Plastic SOIC (150 mil body), 8-lead
SM = Plastic SOIC (208 mil body), 8-lead
ST = Plastic TSSOP (4.4 mm), 8-lead
ST14 = Plastic TSSOP (4.4 mm), 14-lead
MF = Dual, Flat, No Lead (DFN)(6x5 mm body), 8-lead
MS = Plastic Micro Small Outline (MSOP), 8-lead
Examples:
a) 24AA128-I/P: Industrial Temperature,
PDIP package.
b) 24AA128T-I/SN: Tape and Reel,
Industrial Temp., SOIC package.
c) 24AA128-I/ST: Industrial Temperature,
TSSOP package.
d) 24AA128-I/MS: Industrial Temperature,
MSOP package.
a) 24LC128-E/P: Extended Temperature,
PDIP package.
b) 24LC128-I/SN: Industrial Temperature,
SOIC package.
c) 24LC128T-I/SN: Tape and Reel,
Industrial Temperature, SOIC package.
d) 24LC128-I/MS: Industrial Temperature,
MSOP package.
a) 24FC128-I/P: Industrial Temperature,
PDIP package.
b) 24FC128-I/SN: Industrial Temperature,
SOIC package.
c) 24FC128T-I/SN: Tape and Reel,
Industrial Temperature, SOIC package
24AA128/24LC128/24FC128
DS21191J-page 24 Preliminary 2002 Microchip Technology Inc.
NOTES:
2002 Microchip Technology Inc. Preliminary DS21191J-page25
24AA128/24LC128/24FC128
NOTES:
24AA128/24LC128/24FC128
DS21191J-page 26 Preliminary 2002 Microchip Technology Inc.
NOTES:
2002 Microchip Technology Inc. DS21191J - page 27
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical com-
ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con-
veyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, FilterLab,
KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER,
PICSTART, PRO MATE, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip Tech-
nology Incorporated in the U.S.A. and other countries.
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, MXLAB, PICC, PICDEM, PICDEM.net, rfPIC, Select
Mode and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
DS21191J-page 28 2002 Microchip Technology Inc.
M
AMERICAS
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200 Fax: 480-792-7277
Technical Support: 480-792-7627
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2767 S. Albright Road
Kokomo, Indiana 46902
Tel: 765-864-8360 Fax: 765-864-8387
Los Angeles
18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: 949-263-1888 Fax: 949-263-1338
New York
150 Motor Parkway, Suite 202
Hauppauge, NY 11788
Tel: 631-273-5305 Fax: 631-273-5335
San Jose
Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950 Fax: 408-436-7955
Toronto
6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699 Fax: 905-673-6509
ASIA/PACIFIC
Australia
Microchip Technology Australia Pty Ltd
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: 61-2-9868-6733 Fax: 61-2-9868-6755
China - Beijing
Microchip Technology Consulting (Shanghai)
Co., Ltd., Beijing Liaison Office
Unit 915
Bei Hai Wan Tai Bldg.
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: 86-10-85282100 Fax: 86-10-85282104
China - Chengdu
Microchip Technology Consulting (Shanghai)
Co., Ltd., Chengdu Liaison Office
Rm. 2401, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Chengdu 610016, China
Tel: 86-28-86766200 Fax: 86-28-86766599
China - Fuzhou
Microchip Technology Consulting (Shanghai)
Co., Ltd., Fuzhou Liaison Office
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
Tel: 86-591-7503506 Fax: 86-591-7503521
China - Shanghai
Microchip Technology Consulting (Shanghai)
Co., Ltd.
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: 86-21-6275-5700 Fax: 86-21-6275-5060
China - Shenzhen
Microchip Technology Consulting (Shanghai)
Co., Ltd., Shenzhen Liaison Office
Rm. 1315, 13/F, Shenzhen Kerry Centre,
Renminnan Lu
Shenzhen 518001, China
Tel: 86-755-2350361 Fax: 86-755-2366086
China - Hong Kong SAR
Microchip Technology Hongkong Ltd.
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200 Fax: 852-2401-3431
India
Microchip Technology Inc.
India Liaison Office
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062
Japan
Microchip Technology Japan K.K.
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
Korea
Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: 82-2-554-7200 Fax: 82-2-558-5934
Singapore
Microchip Technology Singapore Pte Ltd.
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850
Taiw a n
Microchip Technology (Barbados) Inc.,
Taiwan Branch
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
EUROPE
Denmark
Microchip Technology Nordic ApS
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: 45 4420 9895 Fax: 45 4420 9910
France
Microchip Technology SARL
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Germany
Microchip Technology GmbH
Gustav-Heinemann Ring 125
D-81739 Munich, Germany
Tel: 49-89-627-144 0 Fax: 49-89-627-144-44
Italy
Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
Tel: 39-039-65791-1 Fax: 39-039-6899883
United Kingdom
Microchip Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44 118 921 5869 Fax: 44-118 921-5820
Austria
Microchip Technology Austria GmbH
Durisolstrasse 2
A-4600 Wels
Austria
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
05/16/02
WORLDWIDE SALES AND SERVICE
