6522DS–SPD–07Sep07
Features
General
High-performance, Low-power secureAVR® RISC Architecture
135 Powerful Instructions (Most Executed in a Single Clock Cycle)
Low Power Idle and Power-down Modes
Bond Pad Locations Conforming to ISO 7816-2
ESD Protection to ± 6000 V
Operating Ranges: 1.62 to 5.5V
Compliant with GSM, 3GPP and EMV 2000 Specifications; PC Industry Compatible
Available in Wafer s, Modules, QFN44 and SOI C8 packages
Memory
256K Bytes of ROM Program Me mo ry
72K Bytes of EEPROM, Including 128 OTP Bytes and 384-byte Bit-addressable Area
1 to 128-byte Program / Erase
1.25 ms Pr ogram / 1.25 ms Erase
Typically More than 500,000 Write/Erase Cycles at a Temperature of 25oC
10 Years Data Retention
EEPROM Erase Only Mode
Write EEPROM With or Without Autoerase
8K Bytes of RAM
32K Bytes of ROM Dedicated to Atmel’s Crypto-library
Peripherals
ISO 7816 Controller
Up to 625 kbps at 5 MHz
Compliant with T = 0 and T = 1 Protocols
One I/O Port
USB 2.0 Full Speed interface with 5 endpoints and DMA controller
Programmable Internal Oscillator (Up to 40 MHz for CPU and Crypto Accelerator)
Two 16-bit Timers
Random Number Generator (RNG)
2-level, 9-vector Interrupt Controller
Hardware DES and Triple DES DPA/DEMA Re sistant
Checksum Accelerator
CRC 16 & 32 Engine (Compliant with ISO/IEC 3309)
32-bit AdvX™ Cryptographic Accelerator for Public Key Operations with GF(2n)
Multiplier and Firmware (RSA, ECC, Key Generation)
Security
Dedicated Hardware for Protection Against SPA/DPA Attacks
Advanced Protection Against Physical Attack, Including Active Shield
Environmental Protection Systems
Voltag e Monitor
Frequency Monitor
Light Protection
Temperature Monitor
Secure Memory Management/Access Protection (Supervisor Mode)
Certification
CC EAL4+
VISA
CAST
USB 2.0
Secure
Microcontroller
for Smart Cards
AT90SC25672RCT
-USB
Summary
Note: This is a summary document. A complete document will be
available under NDA. For more information, please contact your
local Atmel sales office.
2
AT90SC25672RCT-USB
6522DS–SPD–07Sep07
Development Tools
Voyager Emulation Platform (ATV4 Standard) to Support Software Development
IAR Systems EWAVR® V4.21A Debugger or Above
Software Libraries and Application Notes
Description
The AT90SC256 72RCT-USB is a low-power, high-performance, 8/16-bit microcontroller with ROM program mem ory,
EEPROM data memory, cryptograph ic accelerator based on the secureAVR enhanced RISC architectu re. By executing
powerfu l instru ctions in a single clock cycl e, the AT90S C25672RC T-U SB achiev es throughp uts close to 1 MI PS per MHz .
Its Harvard architecture includes 32 general purpose working registers directly connected to the ALU, allowing two inde-
pendent registers to be accessed in one single instruction executed in one clock cycle.
The AT90SC2567 2RCT-USB u ses a new AVR® architecture, the secureAVR that allows the linear addressing of up to 8M
bytes of code and up to 16M bytes of data as well as a number of new functional and security features.
The cryptographic accelerator featured in this product is the AdvX, a 32-bit accelerator dedicated to performing fast encryp-
tion and authentication functions. It is combined with a 32K byte-ROM for a high-performance and secure crypto firmware.
The ability to map the EEPROM in the code space allows parts of the program memory to be reprogrammed in-sy stem.
This techn ology combin ed with the v ersatil e 8/16- bit CPU on a mo nolith ic chip pr ovid es a highly flexi ble and co st-e ffective
solution to many smart card applications.
Additional security features include power and frequency protection logic, logical scrambling on program data and
addres ses, Power Analysis counterm easure s and memor y accesses controlle d by a superv isor mode. A bl ock diag ram of
the AT90SC25672RCT-USB is shown in Figure 1 hereafter.
USB Controller Description
The AT90S C25672 RCT-USB feature s an U SB V2.0 Full Speed controlle r whi ch requi res a 4 8 MHz external crys tal for the
data transfer. The USB interface consists of a Serial Interface Engine (SIE) and a Universal Function Interface (UFI). The
SIE performs clock/data separation, NRZI encoding and decoding, bit stuffing, CRC generation and checking and serial-
parallel data conversion.
The UFI connects the USB interface to the A VR. It consists of a protocol engine and provides five configurable data transfer
endpoi nts, eac h with its o wn DPRA M in th e memo ry are a. The data trans fer ty pe for each endpo int i s confi gure d by soft-
ware. The table below indicates the characteristics of each endpoint:
A DMA controller allows a fast communication rate between the RAM of the CPU and the DPRAM.
The USB controller provides a dynamic pull-up attachment and detachment and a host detection mechanism. In addition, it
offers an automatic interface detection between the USB 2.0 and the ISO7816 port.
Table 1: Characteristics of each endpoint.
Endpoint
number Size (bytes) Available data transfer modes
EP0 64 BULK, ISOCHRONOUS, INTERRUPT, CONTROL
EP1 2 * 64 BULK, ISOCHRONOUS, INTERRUPT
EP2 2 * 64 BULK, ISOCHRONOUS, INTERRUPT
EP3 64 BULK, ISOCHRONOUS, INTERRUPT, CONTROL
EP4 64 BULK, ISOCHRONOUS, INTERRUPT, CONTROL
3
AT90SC25672RCT-USB
6522DS–SPD–07Sep07
Figure 1. AT90SC25672RCT -USB secureAVR RISC Architecture
A DMA controller allows a fast communication rate between the RAM of the CPU and the DPRAM.
Instruction
Decoder
Program
Memory
Instruction
Register
Access
Control
General
Purpose
Registers
X
Y
Z
Status
Register
AdvX
Crypto-
Coprocessor
RAM
Data Memory
Interrupt
Unit
ISO 7816
I/O Port 0
Control
Lines
ALU
EEPROM
User Memory
OTP
PC
Secure
Control V
CC /
VBu
s
GND
CLK
Access
Control
IN/OUT0
Data Bus
8-bit
RNG
16
16
16
8
88
DES
DPA Counter
measures
Reset
Circuit RST
ISO 7816
Controller
CRC and
Checksum
Accelerator
CRYPTO
ROM
USB Module
USBDM
USBDP
X
IN
X
OUT
Timer 1
Timer 0
4
AT90SC25672RCT-USB
6522DS–SPD–07Sep07
Figure 2. Pinout AT90SC25672RCT-USB - Package QFN44
2
3
1
4
5
6
7
8
9
10
11
32
31
33
30
29
28
27
26
25
24
23
12
13
15
14
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
AT90SC25672RCT-USB
(44-lead QFN top view)
INDEX CORNER
NC
NC
ISO_IO0 / GPI
O
NC
NC
NC
NC
NC
NC
GND
NC
NC
ISO_CLK
USB_XOUT
NC
USB_XIN
ISO_RST
NC
NC
NC
VCC / VBUS
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
USB_DP
NC
NC
NC
NC
NC
NC
NC
USB_DM
NC
5
AT90SC25672RCT-USB
6522DS–SPD–07Sep07
Figure 3. Pinout AT90SC25672RCT-USB - Package SOIC8 - ISO Mode
Figure 4. Pinout AT90SC25672RCT-USB - Package SOIC8 - USB Mode
AT90SC25672RCT-USB
SOIC8
INDEX CORNER
GND
NC
ISO_IO0
NC
1
2
3
4
8
7
6
5
VCC
ISO_RST
NC
ISO_CL
K
AT90SC25672RCT-USB
SOIC8
INDEX CORNER
GND
NC
GPIO
USB_DM
1
2
3
4
8
7
6
5
VBUS
USB_XIN
USB_XOUT
USB_DP
6
AT90SC25672RCT-USB
6522DS–SPD–07Sep07
Figure 5. Quad Flat No Lead Package, 44 Leads
7
AT90SC25672RCT-USB
6522DS–SPD–07Sep07
Figure 6. Plastic Small Outline Package - 8-lead - 0.209” Body
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL MIN NOM MAX NOTE
Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information.
2. Mismatch of the upper and lower dies and resin burrs are not included.
3. It is recommended that upper and lower cavities be equal. If they are different, the larger dimension shall be regarded.
4. Determines the true geometric position.
5. Values b and C apply to pb/Sn solder plated terminal.
The standard thickness of the solder layer shall be 0.010 +0.010/-0.005 mm.
A 1.70 2.16
A1 0.05 0.25
b 0.35 0.48 5
C 0.15 0.35 5
D 5.13 5.35
E1 5.18 5.40 2, 3
E 7.70 8.26
L 0.51 0.85
?
e 1.27 BSC 4
End View
Side View
eb
A
A1
D
E
N
1
C
E1
?
L
Top View
8
AT90SC25672RCT-USB
6522DS–SPD–07Sep07
6522DS–SPD–07Sep07
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