Semiconductor Components Industries, LLC, 2005
March, 2005 − Rev. 5 1Publication Order Number:
MC3423/D
MC3423
Overvoltage Crowbar
Sensing Circuit
This overvoltage protection circuit (OVP) protects sensitive
electronic circuitry from overvoltage transients or regulator failures
when used in conjunction with an external “crowbar” SCR. The
device senses the overvoltage condition and quickly “crowbars” or
short circuits the supply, forcing the supply into current limiting or
opening the fuse or circuit breaker.
The protection voltage threshold is adjustable and the MC3423 can
be programmed for minimum duration of overvoltage condition
before tripping, thus supplying noise immunity.
The MC3423 is essentially a “two terminal” system, therefore it
can be used with either positive or negative supplies.
Features
Pb−Free Package is Available
MAXIMUM RATINGS
Rating Symbol Value Unit
Differential Power Supply Voltage VCC−VEE 40 Vdc
Sense Voltage (1) VSense1 6.5 Vdc
Sense Voltage (2) VSense2 6.5 Vdc
Remote Activation Input Voltage Vact 7.0 Vdc
Output Current IO300 mA
Operating Ambient Temperature Range TA0 to +70 °C
Operating Junction Temperature TJ125 °C
Storage Temperature Range Tstg −65 to +150 °C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.
Figure 1. Simplified Application
Vout
Vin
Cout
Current
Limited
DC
Power
Supply
O. V. P.
MC3423
+
MARKING
DIAGRAMS
MC3423P1 = Device Code
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = W ork Week
SOIC−8
D SUFFIX
PLASTIC PACKAGE
CASE 751
PIN CONNECTIONS
1
2
3
45
6
7
8VCC
Sense 1
Sense 2
Current
Source
Drive
Output
VEE
Indicator
Output
Remote
Activation
(Top View)
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
3423
ALYW
1
8
1
8
MC3423P1
AWL
YYWW
3423 = Device Code
A = Assembly Location
L = W afer Lot
Y = Year
W = W ork Week
1
8PDIP−8
P1 SUFFIX
PLASTIC PACKAGE
CASE 626
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MC3423
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2
ELECTRICAL CHARACTERISTICS (5.0 V VCC − VEE 36 V, Tlow < TA , Thigh, unless otherwise noted.)
Characteristics Symbol Min Typ Max Unit
Supply Voltage Range VCC−VEE 4.5 40 Vdc
Output Voltage (IO = 100 mA) VOVCC−2.2 VCC−1.8 Vdc
Indicator Output Voltage (IO(Ind) = 1.6 mA) VOL(Ind) 0.1 0.4 Vdc
Sense Trip Voltage (TA = 25°C) VSense1,
VSense2 2.45 2.6 2.75 Vdc
Temperature Coef ficient of VSense1 (Figure 2) TCVS1 0.06 %/°C
Remote Activation Input Current
(VIH = 2.0 V, VCC − VEE = 5.0 V)
(VIL = 0.8 V, VCC − VEE = 5.0 V) IIH
IIL
5.0
−120 40
−180
A
Source Current ISource 0.1 0.2 0.3 mA
Output Current Risetime (TA = 25°C) tr 400 mA/s
Propagation Delay Time (TA = 25°C) tpd 0.5 s
Supply Current ID 6.0 10 mA
NOTES: Tlow to Thigh = 0° to +70°C
1
2
4
8
6537
+
−+
+
ISource
VCC
Sense 1
VEE Sense 2
Remote
Activation
Indicator
Output
Output
Current
Source
Vref
2.6V
Figure 2. Representative Block Diagram
(B)
Switch 1 Switch 2
VSense 1
VSense 2
Position A
Position B Closed
Open
Ramp VI until output goes high; this is
the VSense threshold.
V
8
75
1
2
3
4
(A)
Switch 1
Switch 2
VCC
VI
Figure 3. Sense Voltage Test Circuit
MC3423
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Figure 4. Basic Circuit Configuration
Figure 5. Circuit Configuration for Supply Voltage Above 36 V
Figure 6. Basic Configuration for Programmable Duration
of Overvoltage Condition Before Trip
For minimum value of RG, see Figure 9.
*See text for explanation.
R2 10 k for minimum drift
+
To
Load
Power
Supply
R1
R2
MC3423
F1
1
2
3
475
8
RG
(+ Sense
Lead)
(− Sense Lead)
S1*
*
*R2 10 k
Q1: VS 50 V; 2N6504 or equivalent
Q1: VS 100 V; 2N6505 or equivalent
Q1: VS 200 V; 2N6506 or equivalent
Q1: VS 400 V; 2N6507 or equivalent
Q1: VS 600 V; 2N6508 or equivalent
Q1: VS 800 V; 2N6509 or equivalent
RS
Power
Supply MC3423
(− Sense
Lead)
(+ Sense
Lead)
1
8
2
3
4
75
Q1
10F
15V
+
1N4740
10V
+
To
Load
*R2
R1
Indication
Out
R3 Vtrip
td = Vref × C [12 × 103] C  (See Figure 10)
Power
Supply
R1
R2
MC3423
R3
C
1
2
4753
8
6V10
VC
VO
+VCC
VCC
Vtrip
Vref
VIO
VO
VC
0
0
0td
RG
C1 > RS(R1 + R2) 10F
C1
R1R2
10 mA
Isource
VS
Vtrip Vref1R1
R2 2.6 V 1R1
R2
RSVS–10
25 k
Vtrip Vref1R1
R2 2.6 V 1R
R
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APPLICATION INFORMATION
Basic Circuit Configuration
The basic circuit configuration of the MC3423 OVP is
shown in Figure 3 for supply voltages from 4.5 V to 36 V,
and in Figure 4 for trip voltages above 36 V. The threshold
or trip voltage at which the MC3423 will trigger and supply
gate drive to the crowbar SCR, Q1, is determined by the
selection of R1 and R2. Their values can be determined by
the equation given in Figures 3 and 4, or by the graph shown
in Figure 8. The minimum value of the gate current limiting
resistor, R G, is given in Figure 9. Using this value of R G, the
SCR, Q1, will receive the greatest gate current possible
without damaging the MC3423. If lower output currents
are required, RG can be increased in value. The switch, S1,
shown in Figure 3 may be used to reset the crowbar.
Otherwise, the power supply, across which the SCR is
connected, must be shut down to reset the crowbar . I f a n on
current−limited supply is used, a fuse or circuit breaker, F1,
should be used to protect the SCR and/or the load.
The circuit configurations shown in Figures 3 and 4 will
have a typical propagating delay of 1.0 s. If faster
operation is desired, Pin 3 may be connected to Pin 2 with
Pin 4 left floating. This will result in decreasing the
propagating delay to approximately 0.5 s at the expense
of a slightly increased TC for the trip voltage value.
Configuration for Programmable Minimum Duration
of Overvoltage Condition Before Tripping
In many instances, the MC3423 OVP will be used in a
noise environment. To prevent false tripping of the OVP
circuit by noise which would not normally harm the load,
MC3423 has a programmable delay feature. To implement
this feature, the circuit configuration of Figure 5 is used. In
this configuration, a capacitor is connected from Pin 3 to
VEE. The value of this capacitor determines the minimum
duration of the overvoltage condition which is necessary to
trip the OVP. The value of C can be found from Figure 10.
The circuit operates in the following manner: When VCC
rises above the trip point set by R1 and R2, an internal
current source (Pin 4) begins charging the capacitor, C,
connected to Pin 3. If the overvoltage condition disappears
before this occurs, the capacitor is discharged at a rate 10
times faster than the charging rate, resetting the timing
feature until the next overvoltage condition occurs.
Occasionally, it is desired that immediate crowbarring of
the supply occur when a high overvoltage condition occurs,
while retaining the false tripping immunity of Figure 5. In
this case, the circuit of Figure 6 can be used. The circuit will
operate as previously described for small overvoltages, but
will immediately trip if the power supply voltage exceeds
VZ1 + 1.4 V.
Power
Supply
R1
R2 MC3423
RG
(+ Sense
Lead)
(− Sense Lead)
+
1k
Z1
7
34
5
2
1
8
C
Figure 7. Configuration for Programmable
Duration of Overvoltage Condition Before
Trip/With Immediate Trip at
High Overvoltages
Additional Features
1. Activation Indication Output
An additional output for use as an indicator of OVP
activation is provided by the MC3423. This output is an
open collector transistor which saturates when the OVP
is activated. In addition, it can be used to clock an edge
triggered flip−flop whose output inhibits or shuts down
the power supply when the OVP trips. This reduces or
eliminates the heatsinking requirements for the crowbar
SCR.
2. Remote Activation Input
Another feature of the MC3423 is its remote
activation input, Pin 5. If the voltage on this CMOS/TTL
compatible input is held below 0.8 V, the MC3423
operates normally. However, if it is raised to a voltage
above 2.0 V, the OVP output is activated independent of
whether or not an overvoltage condition is present. It
should be noted that Pin 5 has an internal pullup current
source. This feature can be used to accomplish an
orderly and sequenced shutdown of system power
supplies during a system fault condition. In addition, the
activation indication output of one MC3423 can be used
to activate another MC3423 if a single transistor inverter
is used to interface the formers indication output to the
latters remote activation input, as shown in Figure 7. In
this circuit, the indication output (Pin 6) of the MC3423
on power supply 1 is used to activate the MC3423
associated with power supply 2. Q1 is any small PNP
with adequate voltage rating.
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5
Power
Supply
#1
R1
Power
Supply
#2
+
+
10k
Q1
1.0k
5
7
1
7
6
1
Figure 8. Circuit Configuration for
Activating One MC3423 from Another
Note that both supplies have their negative output
leads tied together (i.e., both are positive supplies). If
their po sitive leads are common (two negative supplies)
the emitter of Q1 wou ld be mo v ed to the positiv e lead of
supply 1 and R1 would therefore have to be resized to
deli ver the appropria te drive to Q1.
Crowbar SCR Considerations
Referring to Figure 11, it can be seen that the crowbar
SCR, when activated, is subject to a large current surge
from the output capacitance, Cout. This capacitance
consists of the power supply output caps, the load’s
decoupling caps, and in the case of Figure 11A, the supply’s
input filter caps. This surge current is illustrated in Figure
12, and can cause SCR failure or degradation by any one
of three mechanisms: di/dt, absolute peak sur ge, or I 2t. The
interrelationship of these failure methods and the breadth
of the applications make specification of the SCR by the
semiconductor manufacturer difficult and expensive.
Therefore, the designer must empirically determine the
SCR and circuit elements which result in reliable and
effective OVP operation. However, an understanding of the
factors which influence the SCR’s di/dt and surge
capabilities simplifies this task.
di/dt
As the gate region of the SCR is driven on, its area of
conduction takes a finite amount of time to grow, starting
as a very small region and gradually spreading. Since the
anode current flows through this turned−on gate region,
very high current densities can occur in the gate region if
high anode currents appear quickly (di/dt). This can result
in immediate destruction of the SCR or gradual
degradation of its forward blocking voltage capabilities −
depending on the severity of the occasion.
VT, TRIP VOLTAGE (V)
0 5.0 10 15 20 25 30
Min
30
20
10
0
R1, RESISTANCE (k)
Typ
R2 = 2.7 k Max
Figure 9. R1 versus Trip Voltage
VCC, SUPPLY VOLTAGE (V)
35
30
25
20
15
10 0 1020304050 607080
RG, GATE CURRENT LIMITING RESISTOR ()
RG(min) = 0
if VCC < 11 V
Figure 10. Minimum RG versus Supply Voltage
td, DELAY TIME (ms)
C, CAPACITANCE (F)
µ
123571
1
5
2
10.0001
0.001
0.01
0.1
1.0
0.001 0.01 0.1 1.0 10
Figure 11. Capacitance versus
Minimum Overvoltage Duration
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OV
Sense
OV
Sense
*Needed if supply not current limited
Vin
Vin
Vout
Vout
DC
Power
Supply
DC
Power
Supply
Cout
Cout
+
+
*
(11A)
(11B)
Figure 12. Typical Crowbar OVP Circuit
Configurations
lpk
Surge Due to
Output Capacitor
Current Limited
Supply Output
di
dt
l
t
Figure 13. Crowbar SCR Surge Current
Waveform
R & L EMPIRICALLY DETERMINED!
ESR
ESL
RLead LLead
Output
Cap
To
MC3423
R
L
Figure 14. Circuit Elements Affecting
SCR Surge and di/dt
The usual design compromise then is to use a garden
variety fuse (3AG or 3AB style) which cannot be relied on
to blow before the thyristor does, and trust that if the SCR
does fail, it will fail short circuit. In the majority of the
designs, this will be the case, though this is difficult to
guarantee. Of course, a suf ficiently high surge will cause an
open. These comments also apply to the fuse in Figure 11B.
The value of di/dt that an SCR can safely handle is
influenced by its construction and the characteristics of the
gate drive signal. A center−gate−fire SCR has more di/dt
capability than a corner−gate−fire type, and heavily
overdriving (3 to 5 times IGT) the SCR gate with a fast
<1.0 s rise time signal will maximize its di/dt capability.
A typical maximum number in phase control SCRs of less
than 50 A(RMS) rating might be 200 A/s, assuming a gate
current of five times IGT and < 1.0 s rise time. If having
done this, a di/dt problem is seen to still exist, the designer
can also decrease the di/dt of the current waveform by
adding inductance in series with the SCR, as shown in
Figure 13. Of course, this reduces the circuit’s ability to
rapidly reduce the DC bus voltage and a tradeoff must be
made between speedy voltage reduction and di/dt.
Surge Current
If the peak current and/or the duration of the surge is
excessive, immediate destruction due to device
overheating will result. The surge capability of the SCR is
directly proportional to its die area. If the surge current
cannot be reduced (by adding series resistance − see
Figure 13) to a safe level which is consistent with the
systems requirements for speedy bus voltage reduction, the
designer must use a higher current SCR. This may result in
the average current capability of the SCR exceeding the
steady state current requirements imposed by the DC
power supply.
A WORD ABOUT FUSING
Before leaving the subject of the crowbar SCR, a few
words about fuse protection are in order. Referring back to
Figure 11A, it will be seen that a fuse is necessary if the
power supply to be protected is not output current limited.
This fuse is not meant to prevent SCR failure but rather to
prevent a fire!
In order to protect the SCR, the fuse would have to
possess an I 2t rating less than that of the SCR and yet have
a high enough continuous current rating to survive normal
supply output currents. In addition, it must be capable of
successfully clearing the high short circuit currents from
the supply. Such a fuse as this is quite expensive, and may
not even be available.
CROWBAR SCR SELECTION GUIDE
As an aid in selecting an SCR for crowbar use, the
following selection guide is presented.
Device IRMS IFSM Package
2N6400 Series 16 A 160 A TO−220 Plastic
2N6504 Series 25 A 160 A TO−220 Plastic
2N1842 Series 16 A 125 A Metal Stud
2N2573 Series 25 A 260 A Metal TO−3 Type
2N681 Series 25 A 200 A Metal Stud
MCR3935−1 Series 35 A 350 A Metal Stud
MCR81−5 Series 80 A 1000 A Metal Stud
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ORDERING INFORMATION
Device Operating Temperature Range Package Shipping
MC3423D SOIC−8 98 Units / Rail
MC3423DG SOIC−8
(Pb−Free) 98 Units / Rail
MC3423DR2 SOIC−8 2500 Tape & Reel
MC3423DR2G TA = 0° to +70°CSOIC−8
(Pb−Free) 2500 Tape & Reel
MC3423P1 PDIP−8 1000 Units / Rail
MC3423P1G PDIP−8
(Pb−Free) 1000 Units / Rail
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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PACKAGE DIMENSIONS
PDIP−8
P1 SUFFIX
CASE 626−05
ISSUE L
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14
58
F
NOTE 2 −A−
−B−
−T−
SEATING
PLANE
H
J
GDK
N
C
L
M
M
A
M
0.13 (0.005) B M
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A9.40 10.16 0.370 0.400
B6.10 6.60 0.240 0.260
C3.94 4.45 0.155 0.175
D0.38 0.51 0.015 0.020
F1.02 1.78 0.040 0.070
G2.54 BSC 0.100 BSC
H0.76 1.27 0.030 0.050
J0.20 0.30 0.008 0.012
K2.92 3.43 0.115 0.135
L7.62 BSC 0.300 BSC
M−−− 10 −−− 10
N0.76 1.01 0.030 0.040

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SOIC−8
D SUFFIX
CASE 751−07
ISSUE AE
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
SEATING
PLANE
1
4
58
N
J
X 45
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
BS
D
H
C
0.10 (0.004)
DIM
AMIN MAX MIN MAX
INCHES
4.80 5.00 0.189 0.197
MILLIMETERS
B3.80 4.00 0.150 0.157
C1.35 1.75 0.053 0.069
D0.33 0.51 0.013 0.020
G1.27 BSC 0.050 BSC
H0.10 0.25 0.004 0.010
J0.19 0.25 0.007 0.010
K0.40 1.27 0.016 0.050
M0 8 0 8
N0.25 0.50 0.010 0.020
S5.80 6.20 0.228 0.244
−X−
−Y−
G
M
Y
M
0.25 (0.010)
−Z−
Y
M
0.25 (0.010) Z SXS
M

1.52
0.060
7.0
0.275
0.6
0.024 1.270
0.050
4.0
0.155
mm
inches
SCALE 6:1
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MC3423/D
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