International PD-9.525D Rectifier IRFR220 HEXFET Power MOSFET IRFU220 Dynamic dv/dt Rating Repetitive Avalanche Rated D _ Surface Mount (IRFR220) Voss = 200V Straight Lead (IRFU220) Available in Tape & Reel Fast Switching @ Ease of Paralleling 5 Ip =4.8A Rpsvon) = 0.800 Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The D-Pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications. D-PAK LPAK TO-252AA TO-251AA Absolute Maximum Ratings Parameter Max. Units Ip @ Tce = 25C Continuous Drain Current, Vas @ 10 V 48 Ip @ Tc = 100C | Continuous Drain Current, Ves @ 10 V 3.0 A Ibm Pulsed Drain Current 19 Pp @ Tc =25C_ | Power Dissipation 42 Ww Pp @ Ta= 25C _ | Power Dissipation (PCB Mount)** 2.5 Linear Derating Factor 0.33 Wec Linear Derating Factor (PCB Mount)** 0.020 Vas Gate-to-Source Voltage +20 Vv Eas Single Pulse Avalanche Energy @ 230 mJ lar Avalanche Current 48 A Ear Repetitive Avalanche Energy 42 mJ dv/dt Peak Diode Recovery dv/dt @ 5.0 Vins Tu, Tste Junction and Storage Temperature Range -55 to +150 C Soldering Temperature, for 10 seconds 260 (1.6mm from case) Thermal Resistance Parameter Min. Typ. Max. Units Rac Junction-to-Case _ _ 3.0 Rosa Junction-to-Ambient (PCB mount)** _ _ 50 C/W Rea Junction-to-Ambient = = 110 | When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. 1157IRFR220, IRFU220 Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. | Units Test Conditions VieryDss Drain-to-Source Breakdown Voltage 200 = _ Vi | Ves=0V, lo= 250A AVerypss/ATy| Breakdown Voltage Temp. Coefficient | 029 | | V/C | Reference to 25C, Ip= 1mA Rpscon) Static Drain-to-Source On-Resistance = | 0.80] Q | Vas=10V, Ip=2.9A Vestn) Gate Threshold Voltage 2.0 _ 4.0 V_ | Vps=Ves, lp= 250nA Dts Forward Transconductance 1.7 _ _ S | Vps=50V, In=2.9A @ Ipss Drain-to-Source Leakage Current 25 LA Vos=200V, Vas=0V _ 250 Vps=160V, Vas=0V, Ty=125C. lass Gate-to-Source Forward Leakage _ _ 100 nA Vas=20V J Gate-to-Source Reverse Leakage _ | -100 Vas=-20V Qg Total Gate Charge _ 14 Ip=4.8A Qgs Gate-to-Source Charge | | 3.0 | nC | Vps=160V Qoa Gate-to-Drain ("Miller") Charge a 7.9 Vas=10V See Fig. 6 and 13 taton) Turn-On Delay Time _ 7.2 _ Vop=100V tr Rise Time _ 22 _ ns Ip=4.8A tatott) Turn-Off Delay Time _ 19 _ Re=18Q tt Fall Time _ 13 = Ro=20Q See Figure 10 @ Lp Internal Drain Inductance _ 45 _ Bee on (& t nH | from package a Ls internal Source Inductance |75) and center of | die contact 8 Ciss Input Capacitance | 260) Vas=0V Coss Output Capacitance | 100; PF | Vpg=25V Criss Reverse Transfer Capacitance _ 30 _ f=1.0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter Min. | Typ. | Max. | Units Test Conditions Is Continuous Source Current _ _ 48 MOSFET symbol D (Body Diode) : A showing the Ism Pulsed Source Current _ _ 19 integral reverse (Body Diode) p-n junction diode. s Vsp Diode Forward Voltage _ _ 1.8 Vs | Ty=25C, Is=4.8A, Vas=0V @ tir Reverse Recovery Time _ 150 | 300 | ns | Ty=25C, Ir=4.8A Qn Reverse Recovery Charge | 091} 18 | pC jdi/dt=100A/us ton Forward Turn-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp) Notes: @ Repetitive rating; pulse width limited by max. junction temperature (See Figure 11) Vpp=50V, starting Ty=25C, L=14mH Re=250, las=4.8A (See Figure 12) Isp<5.2A, di/dt<95A/us, VppsV(BRypss, Tys150C @ Pulse width < 300 1s; duty cycle <2%. 1158Ip, Drain Current (Amps) Ip, Drain Current (Amps) oS oO 4 Ss 1 20us WIDTH Te = 26C 19-2 407 Vps, Drain-to-Source Voltage (volts) Fig 1. Typical Output Characteristics, Tco=25C sot 190 so71 Vpg = 50V 20us PULSE WIDTH 40 Vas, Gate-to-Source Voltage (voits) Fig 3. Typical Transfer Characteristics Ros(on Drain-to-Source On Resistance Ip, Drain Current (Amps) (Normalized) eS IRFR220, IRFU220 S a 3 1 20us PULSE WIDTH Te = 1509C 10-1 100 40! Vps, Drain-to-Source Voltage (volts) Fig 2. Typical Output Characteristics, To=150C w nm th Vgg = 10V O55 -40 -20 0 20 40 60 80 1 120 140 160 Ty, Junction Temperature (C) Fig 4. Normalized On-Resistance Vs. Temperature 1159IRFR220, IRFU220 20 Cgs + Cgg. Cys SHORTED Cgq Cas + B a mo Capacitance (pF) Coss Vas, Gate-to-Source Voltage (volts) C rss FOR TEST CIRCUIT 10! 0 3 6 9 12 15 Vps, Drain-to-Source Voltage (volts) Qe, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voltage 102 OPERATION IN THIS AREA LIMITED ge BY ADs (ON) e z E c g <= 10 5 ~ o o & 5 & 8 Cc 2 , oO Q > n o a 2 L a T ms Ty=150C Ves = OV SINGLE 0.4 0. Q. . . 4.5 1 2 5 10 2 5 102 2 5 103 Vsp, Source-to-Drain Voltage (volts) Vps, Drain-to-Source Voltage (volts) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage 1160Ip, Drain Current (Amps) IRFR220, IRFU220 Vos WN D.U.T. 5.0 K =1Vbo ] 4.0 Pulse Width < 1pts Duty Factor < 0.1% L 3.0 . oo, . = oo, Fig 10a. Switching Time Test Circuit we fo \ [. 90% 10% + 0.0 t XN TAN eo 50 75 100 425 150 Ves|_ : Ye Tc, Case Temperature (C) tgjon) tr ta(ot) 4 Fig 9. Maximum Drain Current Vs. Case Temperature 108 10-4 10-3 Fig 10b. Switching Time Waveforms a 3 D N ~ ao 1 Ww cS 8 a. wn jn E | Fos ~ oa SINGLE PULSE Pot = (THEAMAL RESPONSE) lat feel ea NOTES: 4. DUTY FACTOR, D=t4/t2 - 2, PEAK Ty=Pom x Zthjc + Te 10 10-2 0.1 1 10 t;, Rectangular Pulse Duration (seconds) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1161IRFR220, IRFU220 Vary tp to obtain Vps > required las Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS Eas, Single Pulse Energy (mJ) 30 = 50V Vos 25 50 75 100 125 450 Starting Tj, Junction Temperature(C} lag ee Fig 12c. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator Q tovf> oT [Ses yr Seo Va Charge + la Ib Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1505 Appendix B: Package Outline Mechanical Drawing See pages 1512, 1513 Appendix D: Tape & Ree! information - See page 1523 roe Hoctfier 1162 Appendix C: Part Marking Information See page 1518