1
LTC1046
1046fb
“Inductorless”
5V to –5V Converter
Generating –5V from 5V
Output Voltage vs Load Current for V+ = 5V
The LTC
®
1046 is a 50mA monolithic CMOS switched
capacitor voltage converter. It plugs in for the ICL7660/
LTC1044 in 5V applications where more output current is
needed. The device is optimized to provide high current
capability for input voltages of 6V or less. It trades off
operating voltage to get higher output current. The
LTC1046 provides several voltage conversion functions:
the input voltage can be inverted (VOUT = –VIN), divided
(VOUT = VIN/2) or multiplied (VOUT = ±nVIN).
Designed to be pin-for-pin and functionally compatible
with the ICL7660 and LTC1044, the LTC1046 provides 2.5
times the output drive capability.
■
50mA Output Current
■
Plug-In Compatible with ICL7660/LTC1044
■
R
OUT
= 35Ω Maximum
■
300µA Maximum
No Load Supply Current at 5V
■
Boost Pin (Pin 1) for Higher Switching Frequency
■
97% Minimum Open-Circuit Voltage Conversion
Efficiency
■
95% Minimum Power Conversion Efficiency
■
Wide Operating Supply Voltage Range: 1.5V to 6V
■
Easy to Use
■
Low Cost
■
Conversion of 5V to ±5V Supplies
■
Precise Voltage Division, V
OUT
= V
IN
/2
■
Supply Splitter, V
OUT
= ±V
S
/2
FEATURES
DESCRIPTIO
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APPLICATIO S
U
TYPICAL APPLICATIO
U
, LTC and LT are registered trademarks of Linear Technology Corporation.
1
2
3
4
8
7
6
5
V
+
OSC
LV
V
OUT
BOOST
CAP
+
GND
CAP
–
LTC1046
10µF
10µF
1046 TA01
5V INPUT
–5V OUTPUT
+
+
LOAD CURRENT, I
L
(mA)
0
0
OUTPUT VOLTAGE (V)
–1
–2
–3
–4
–5
10 20 30 40
1046 TA02
50
ICL7660/LTC1044,
R
OUT
= 55Ω
T
A
= 25°C
LTC1046,
R
OUT
= 27Ω
LTC1046
2
1046fb
A
U
G
W
A
W
U
W
ARBSOLUTEXI T
IS
ORDER PART
NUMBER
Supply Voltage ....................................................... 6.5V
Input Voltage on Pins 1, 6 and 7
(Note 2) ............................ –0.3 < V
IN
< (V
+
) +0.3V
Current into Pin 6 .................................................. 20µA
Output Short Circuit Duration
(V
+
≤ 6V) ...............................................Continuous
WU
U
PACKAGE/ORDER I FOR ATIO
LTC1046MJ8
T
JMAX
= 160°C, θ
JA
= 100°C
Operating Temperature Range
LTC1046C .................................... 0°C ≤ T
A
≤ 70°C
LTC1046I .................................–40°C ≤ T
A
≤ 85°C
LTC1046M (OBSOLETE) ............ –55°C to 125°C
Storage Temperature Range ............... –65°C to +150°C
Lead Temperature (Soldering, 10 sec.).................300°C
(Note 1)
ORDER PART
NUMBER
LTC1046CN8
LTC1046CS8
LTC1046IN8
LTC1046IS8
S8 PART MARKING
1046
1046I
T
JMAX
= 110°C, θ
JA
= 130°C (N8)
T
JMAX
= 150°C, θ
JA
= 150°C (S8)
1
2
3
4
8
7
6
5
TOP VIEW
V
+
OSC
LV
V
OUT
BOOST
CAP
+
GND
CAP
–
J8 PACKAGE
8-LEAD CERDIP
OBSOLETE PACKAGE
Consider the N8 or S8 for Alternate Source
1
2
3
4
8
7
6
5
TOP VIEW
V
+
OSC
LV
V
OUT
BOOST
CAP
+
GND
CAP
–
N8 PACKAGE
8-LEAD PDIP S8 PACKAGE
8-LEAD PLASTIC SO
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL C CHARA TERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, COSC = 0pF, unless otherwise noted.
LTC1046C LTC1046I/M
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
I
S
Supply Current R
L
= ∞, Pins 1 and 7 No Connection 165 300 165 300 µA
R
L
= ∞, Pins 1 and 7 No Connection, 35 35 µA
V
+
= 3V
V
+L
Minimum Supply Voltage R
L
= 5kΩ●1.5 1.5 V
V
+H
Maximum Supply Voltage R
L
= 5kΩ●66V
R
OUT
Output Resistance V
+
= 5V, I
L
= 50mA (Note 3) 27 35 27 35 Ω
●27 45 27 50 Ω
V
+
= 2V, I
L
= 10mA ●60 85 60 90 Ω
f
OSC
Oscillator Frequency V
+
= 5V (Note 4) 20 30 20 30 kHz
V
+
= 2V 4 5.5 4 5.5 kHz
P
EFF
Power Efficiency R
L
= 2.4kΩ95 97 95 97 %
V
OUTEFF
Voltage Conversion R
L
= ∞97 99.9 97 99.9 %
Efficiency
I
OSC
Oscillator Sink or Source V
OSC
= 0V or V
+
Current Pin 1 = 0V ●4.2 35 4.2 40 µA
Pin 1 = V
+
●15 45 15 50 µA
3
LTC1046
1046fb
OSCILLATOR FREQUENCY, fOSC (Hz)
100
80
POWER CONVERSION EFFICIENCY, PEFF (%)
86
92
98
100
1k 10k 100k 1M
1046 G06
96
94
90
88
84
82
V+ = 5V
TA = 25°C
C1 = C2
A = 100µF, 1mA
B = 100µF, 15mA
C = 10µF, 1mA
D = 10µF, 15mA
E = 1µF, 1mA
F = 1µF, 15mA
A
C
B
E
D
F
LOAD CURRENT, IL (mA)
0
30
POWER CONVERSION EFFICIENCY, PEFF (%)
50
60
70
80
90
100
30 40 60 70
1046 G05
40
10 20 50
PEFF
IS
20
10
0
TA = 25°C
V+ = 5V
C1 = C2 = 10µF
fOSC = 30kHz
30
50
60
70
80
90
100
40
20
10
0
SUPPLY CURRENT (mA)
LOAD CURRENT, IL (mA)
0
30
POWER CONVERSION EFFICIENCY, PEFF (%)
50
60
70
80
90
100
34 67
1046 G04
40
12 5
PEFF
IS
20
10
0
TA = 25°C
V+ = 2V
C1 = C2 = 10µF
fOSC = 8kHz
8910
3
5
6
7
8
9
10
4
2
1
0
SUPPLY CURRENT (mA)
AMBIENT TEMPERATURE (°C)
–55
10
OUTPUT RESISTANCE (Ω)
30
40
50
60
70
80
25 50 100 125
1046 G03
20
–25 0 75
C1 = C2 = 10µF
V+ = 2V, COSC = 0pF
V+ = 5V, COSC = 0pF
OSCILLATOR FREQUENCY, f
OSC
(Hz)
100
0
OUTPUT RESISTANCE, R
O
(Ω)
200
300
400
500
1k 10k 100k
1046 G01
100
T
A
= 25°C
V
+
= 5V
I
L
= 10mA
C1 = C2
= 1µF
C1 = C2
= 10µF
C1 = C2
= 100µF
CCHARA TERISTICS
UW
ATYPICALPER
FORCE
(Using Test Circuit in Figure 1)
Output Resistance vs Output Resistance vs Output Resistance vs
Oscillator Frequency Supply Voltage Temperature
Power Conversion Efficiency vs Power Conversion Efficiency vs Power Conversion Efficiency vs
Load Current for V+ = 2V Load Current for V+ = 5V Oscillator Frequency
SUPPLY VOLTAGE, V
+
(V)
0
10
OUTPUT RESISTANCE, R
O
(Ω)
100
1000
2567
1046 G02
134
T
A
= 25°C
I
L
= 3mA
C
OSC
= 100pF
C
OSC
= 0pF
Note 1: Absolute Maximum Ratings are those values beyond which
the life of the device may be impaired.
Note 2: Connecting any input terminal to voltages greater than V
+
or
less than ground may cause destructive latch-up. It is recommended
that no inputs from sources operating from external supplies be
applied prior to power-up of the LTC1046.
Note 3: R
OUT
is measured at T
J
= 25°C immediately after power-on.
Note 4: f
OSC
is tested with C
OSC
= 100pF to minimize the effects of test
fixture capacitance loading. The 0pF frequency is correlated to this 100pF
test point, and is intended to simulate the capacitance at pin 7 when the
device is plugged into a test socket and no external capacitor is used.
ELECTRICAL C CHARA TERISTICS
LTC1046
4
1046fb
AMBIENT TEMPERATURE (°C)
–55
26
OSCILLATOR FREQUENCY, f
OSC
(kHz)
30
32
34
36
38
40
25 50 100 125
1046 G11
28
–25 0 75
V
+
= 5V
C
OSC
= 0pF
AMBIENT TEMPERATURE (°C)
0
1
OSCILLATOR FREQUENCY, f
OSC
(kHz)
10
100
1457
1046 G10
23 6
T
A
= 25°C
C
OSC
= 0pF
CCHARA TERISTICS
UW
ATYPICALPER
FORCE
TEST CIRCUIT
Figure 1
Oscillator Frequency as a Oscillator Frequency vs
Function of Supply Voltage Temperature
(Using Test Circuit in Figure 1)
C
OSC
EXTERNAL
OSCILLATOR
C2
10µF
V
OUT
V
+
(5V)
R
L
I
S
I
L
1046 F01
1
2
3
4
8
7
6
5
V
+
OSC
LV
V
OUT
BOOST
CAP
+
GND
CAP
–
LTC1046
C1
10µF
+
+
EXTERNAL CAPACITOR (PIN 7 TO GND), C
OSC
(pF)
1
0.1
OSCILLATOR FREQUENCY, f
OSC
(kHz)
1
10
100
10 100 10000
1046 G09
1000
V
+
= 5V
T
A
= 25°C
PIN 1 = OPEN
PIN 1 = V
+
LOAD CURRENT, I
L
(mA)
0
–2.5
OUTPUT VOLTAGE (V)
–2.0
–1.5
–1.0
–0.5
0.0
0.5
2468
1046 G07
10 12 14 16 18 20
1.0
1.5
2.0
2.5
SLOPE = 52Ω
T
A
= 25°C
V
+
= 2V
f
OSC
= 8kHz
C1 = C2 = 10µF
LOAD CURRENT, I
L
(mA)
0
–5
OUTPUT VOLTAGE (V)
–4
–3
–2
–1
0
1
10 20 30 40
1046 G08
50 60 70 80 90 100
2
3
4
5
SLOPE = 27Ω
T
A
= 25°C
V
+
= 5V
f
OSC
= 30kHz
C1 = C2 = 10µF
Output Voltage vs Load Current Output Voltage vs Load Current Oscillator Frequency as a
for V+ = 2V for V+ = 5V Function of COSC
5
LTC1046
1046fb
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PPLICATI
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Theory of Operation
To understand the theory of operation of the LTC1046, a
review of a basic switched capacitor building block is
helpful.
In Figure 2, when the switch is in the left position, capacitor
C1 will charge to voltage V1. The total charge on C1 will be
q1 = C1V1. The switch then moves to the right, discharging
C1 to voltage V2. After this discharge time, the charge on
C1 is q2 = C1V2. Note that charge has been transferred
from the source, V1, to the output, V2. The amount of
charge transferred is:
∆ q = q1 – q2 = C1(V1 – V2).
If the switch is cycled “f” times per second, the charge
transfer per unit time (i.e., current) is:
I = f • ∆q = f • C1(V1 – V2).
Examination of Figure 4 shows that the LTC1046 has the
same switching action as the basic switched capacitor
building block. With the addition of finite switch ON
resistance and output voltage ripple, the simple theory,
although not exact, provides an intuitive feel for how the
device works.
For example, if you examine power conversion efficiency
as a function of frequency (see typical curve), this simple
theory will explain how the LTC1046 behaves. The loss,
and hence the efficiency, is set by the output impedance.
As frequency is decreased, the output impedance will
eventually be dominated by the 1/fC1 term and power
efficiency will drop. The typical curves for power effi-
ciency versus frequency show this effect for various capaci-
tor values.
Note also that power efficiency decreases as frequency
goes up. This is caused by internal switching losses which
occur due to some finite charge being lost on each
switching cycle. This charge loss per unit cycle, when
multiplied by the switching frequency, becomes a current
loss. At high frequency this loss becomes significant and
the power efficiency starts to decrease.
Figure 3. Switched Capacitor Equivalent Circuit
Figure 4. LTC1046 Switched Capacitor
Voltage Converter Block Diagram
C2
R
EQUIV
=
1046 F03
V2V1
R
L
R
EQUIV
1
fC1
1046 F04
CAP+
(2)
CAP–
(4)
GND
(3)
V
OUT
(5)
V
+
(8)
LV
(6)
3x
(1)
OSC
(7)
OSC +2
CLOSED WHEN
V
+
> 3.0V
C1
C2
BOOST
SW1 SW2
φ
φ
+
+
Figure 2. Switched Capacitor Building Block
C1
f
C2
1046 F02
V2V1
RL
Rewriting in terms of voltage and impedance equivalence,
IVV
fC
VV
REQUIV
=
()
=
12
11
12–
/
–.
A new variable, R
EQUIV
, has been defined such that
R
EQUIV
= 1/fC1. Thus, the equivalent circuit for the switched
capacitor network is as shown in Figure 3.
LTC1046
6
1046fb
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PPLICATI
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LV (Pin 6)
The internal logic of the LTC1046 runs between V
+
and LV
(Pin 6). For V
+
greater than or equal to 3V, an internal
switch shorts LV to GND (Pin 3). For V
+
less than 3V, the
LV pin should be tied to ground. For V
+
greater than or
equal to 3V, the LV pin can be tied to ground or left floating.
OSC (Pin 7) and BOOST (Pin 1)
The switching frequency can be raised, lowered or driven
from an external source. Figure 5 shows a functional
diagram of the oscillator circuit.
By connecting the BOOST (Pin 1) to V
+
, the charge and
discharge current is increased and, hence, the frequency
is increased by approximately three times. Increasing the
frequency will decrease output impedance and ripple for
higher load currents.
Loading Pin 7 with more capacitance will lower the fre-
quency. Using the BOOST pin in conjunction with external
capacitance on Pin 7 allows user selection of the fre-
quency over a wide range.
Driving the LTC1046 from an external frequency source
can be easily achieved by driving Pin 7 and leaving the
BOOST pin open, as shown in Figure 6. The output current
from Pin 7 is small, typically 15µA, so a logic gate is
capable of driving this current. The choice of using a CMOS
logic gate is best because it can operate over a wide supply
voltage range (3V to 15V) and has enough voltage swing
to drive the internal Schmitt trigger shown in Figure 5. For
5V applications, a TTL logic gate can be used by simply
adding an external pull-up resistor (see Figure 6).
Capacitor Selection
While the exact values of C
IN
and C
OUT
are noncritical,
good quality, low ESR capacitors such as solid tantalum
are necessary to minimize voltage losses at high currents.
For C
IN
the effect of the ESR of the capacitor will be
multiplied by four, due to the fact that switch currents are
approximately two times higher than output current, and
losses will occur on both the charge and discharge cycle.
This means that using a capacitor with 1Ω of ESR for C
IN
will have the same effect as increasing the output imped-
ance of the LTC1046 by 4Ω. This represents a significant
increase in the voltage losses. For C
OUT
the effect of ESR
is less dramatic. C
OUT
is alternately charged and dis-
charged at a current approximately equal to the output
current, and the ESR of the capacitor will cause a step
function to occur, in the output ripple, at the switch
transitions. This step function will degrade the output
regulation for changes in output load current, and should
be avoided. Realizing that large value tantalum capacitors
can be expensive, a technique that can be used is to
parallel a smaller tantalum capacitor with a large alumi-
num electrolytic capacitor to gain both low ESR and
reasonable cost. Where physical size is a concern some
of the newer chip type surface mount tantalum capacitors
can be used. These capacitors are normally rated at
working voltages in the 10V to 20V range and exhibit very
low ESR (in the range of 0.1Ω).
Figure 6. External Clocking
C2
V
+
100k
OSC INPUT
REQUIRED FOR TTL LOGIC
–(V
+
)
1046 F06
1
2
3
4
8
7
6
5
V
+
OSC
LV
V
OUT
BOOST
CAP
+
GND
CAP
–
LTC1046
C1
NC
+
+
Figure 5. Oscillator
OSC
(7)
1046 F05
LV
(6)
BOOST
(1)
∼14pF
I2I
I2I
V
+
SCHMITT
TRIGGER
7
LTC1046
1046fb
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PPLICATITYPICAL
Figure 7. Negative Voltage Converter
Negative Voltage Converter
Figure 7 shows a typical connection which will provide a
negative supply from an available positive supply. This
circuit operates over full temperature and power supply
ranges without the need of any external diodes. The LV pin
(Pin 6) is shown grounded, but for V
+
≥ 3V, it may be
floated, since LV is internally switched to GND (Pin 3) for
V
+
≥ 3V.
The output voltage (Pin 5) characteristics of the circuit are
those of a nearly ideal voltage source in series with an 27Ω
resistor. The 27Ω output impedance is composed of two
terms: 1) the equivalent switched capacitor resistance
(see Theory of Operation), and 2) a term related to the ON
resistance of the MOS switches.
At an oscillator frequency of 30kHz and C1 = 10µF, the first
term is:
R= 1
f/2
EQUIV OSC
()
=
=
•
•• .
•–
C1
1
15 10 10 10 67
36
Ω.
Notice that the equation for R
EQUIV
is not a capacitive
reactance equation (X
C
= 1/ωC) and does not contain a 2π
term.
The exact expression for output impedance is complex,
but the dominant effect of the capacitor is clearly shown on
Figure 8. Voltage Doubler
Figure 9. Ultraprecision Voltage Divider
the typical curves of output impedance and power effi-
ciency versus frequency. For C1 = C2 = 10µF, the output
impedance goes from 27Ω at f
OSC
= 30kHz to 225Ω at
f
OSC
= 1kHz. As the 1/fC term becomes large compared to
switch ON resistance term, the output resistance is deter-
mined by 1/fC only.
Voltage Doubling
Figure 8 shows a two diode, capacitive voltage doubler.
With a 5V input, the output is 9.1V with no load and 8.2V
with a 10mA load.
1
2
3
4
8
7
6
5
V
+
OSC
LV
V
OUT
BOOST
CAP
+
GND
CAP
–
LTC1046
10µF
10µF
1046 F07
V
+
1.5V TO 6V
V
OUT
= –V
+
REQUIRED FOR V
+
< 3V
T
MIN
≤ T
A
≤ T
MAX
+
+
1
2
3
4
8
7
6
5
V
+
OSC
LV
V
OUT
BOOST
CAP
+
GND
CAP
–
LTC1046
10µF10µF
V
D
V
D
+
+
1046 F08
V
+
1.5V TO 6V
V
OUT
= 2
(V
IN
–1)
REQUIRED
FOR
V
+
< 3V
+ +
Ultraprecision Voltage Divider
An ultraprecision voltage divider is shown in Figure 9. To
achieve the 0.0002% accuracy indicated, the load current
should be kept below 100nA. However, with a slight loss
in accuracy, the load current can be increased.
1
2
3
4
8
7
6
5
V
+
OSC
LV
V
OUT
BOOST
CAP
+
GND
CAP
–
LTC1046
C1
10µF
C2
10µF
T
MIN
≤ T
A
≤ T
MAX
I
L
≤ 100nA
REQUIRED FOR V
+
< 6V
1046 F09
V
+
3V TO 12V
+
+
±0.002%
V
+
2
LTC1046
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1046fb
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Battery Splitter
A common need in many systems is to obtain positive and
negative supplies from a single battery or single power
supply system. Where current requirements are small, the
circuit shown in Figure 10 is a simple solution. It provides
symmetrical positive or negative output voltages, both
Figure 10. Battery Splitter
1
2
3
4
8
7
6
5
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
LTC1046
C1
10µF
VB
9V
C2
10µF
OUTPUT COMM0N
REQUIRED FOR VB < 6V
3V ≤ VB ≤ 12V 1046 F10
+VB/2
4.5V
–VB/2
–4.5V
+
+
equal to one half the input voltage. The output voltages are
both referenced to Pin 3 (output common). If the input
voltage between Pin 8 and Pin 5 is less than 6V, Pin 6
should also be connected to Pin 3, as shown by the
dashed line.
Paralleling for Lower Output Resistance
Additional flexibility of the LTC1046 is shown in Figures 11
and 12. Figure 11 shows two LTC1046s connected in
parallel to provide a lower effective output resistance. If,
however, the output resistance is dominated by 1/fC1,
increasing the capacitor size (C1) or increasing the fre-
quency will be of more benefit than the paralleling
circuit shown.
Figure 12 makes use of “stacking” two LTC1046s to
provide even higher voltages. In Figure 12, a negative
voltage doubler or tripler can be achieved depending upon
how Pin 8 of the second LTC1046 is connected, as shown
schematically by the switch.
1
2
3
4
8
7
6
5
V
+
OSC
LV
V
OUT
BOOST
CAP
+
GND
CAP
–
LTC1046
C1
10µFC1
10µF
+
1
2
3
4
8
7
6
5
V
+
OSC
LV
V
OUT
BOOST
CAP
+
GND
CAP
–
LTC1046
1/4 CD4077
+
C2
20µF
1046 F11
V
OUT
= –(V
+
)
OPTIONAL SYNCHRONIZATION
CIRCUIT TO MINIMIZE RIPPLE
V
+
+
Figure 11. Paralleling for 100mA Load Current
1
2
3
4
8
7
6
5
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
LTC1046
V+
10µF
C1
10µF
–(V+)
+
1
2
3
4
8
7
6
5
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
LTC1046
FOR VOUT = –2V+
FOR VOUT = –3V+
+
10µF10µF
1046 F12
VOUT
++
Figure 12. Stacking for Higher Voltage
9
LTC1046
1046fb
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PACKAGE DESCRIPTIO
J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
J8 0801
.014 – .026
(0.360 – 0.660)
.200
(5.080)
MAX
.015 – .060
(0.381 – 1.524)
.125
3.175
MIN
.100
(2.54)
BSC
.300 BSC
(7.62 BSC)
.008 – .018
(0.203 – 0.457) 0° – 15°
.005
(0.127)
MIN
.405
(10.287)
MAX
.220 – .310
(5.588 – 7.874)
1234
8765
.025
(0.635)
RAD TYP
.045 – .068
(1.143 – 1.650)
FULL LEAD
OPTION
.023 – .045
(0.584 – 1.143)
HALF LEAD
OPTION
CORNER LEADS OPTION
(4 PLCS)
.045 – .065
(1.143 – 1.651)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
OBSOLETE PACKAGE
LTC1046
10
1046fb
U
PACKAGE DESCRIPTIO
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
N8 1002
.065
(1.651)
TYP
.045 – .065
(1.143 – 1.651)
.130 ± .005
(3.302 ± 0.127)
.020
(0.508)
MIN
.018 ± .003
(0.457 ± 0.076)
.120
(3.048)
MIN
12 34
8765
.255 ± .015*
(6.477 ± 0.381)
.400*
(10.160)
MAX
.008 – .015
(0.203 – 0.381)
.300 – .325
(7.620 – 8.255)
.325 +.035
–.015
+0.889
–0.381
8.255
()
NOTE:
1. DIMENSIONS ARE INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.100
(2.54)
BSC
11
LTC1046
1046fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
PACKAGE DESCRIPTIO
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
SO8 0303
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN .160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
LTC1046
12
1046fb
LINEAR TECHNOLOGY CORPORATION 1991
LT/TP 0403 1K REV B • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
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