Programmable Precision References TL431, A, B Series The TL431, A, B integrated circuits are three-terminal programmable shunt regulator diodes. These monolithic IC voltage references operate as a low temperature coefficient zener which is programmable from Vref to 36 V with two external resistors. These devices exhibit a wide operating current range of 1.0 mA to 100 mA with a typical dynamic impedance of 0.22 . The characteristics of these references make them excellent replacements for zener diodes in many applications such as digital voltmeters, power supplies, and op amp circuitry. The 2.5 V reference makes it convenient to obtain a stable reference from 5.0 V logic supplies, and since the TL431, A, B operates as a shunt regulator, it can be used as either a positive or negative voltage reference. * Programmable Output Voltage to 36 V * Voltage Reference Tolerance: 0.4%, Typ @ 25C (TL431B) * Low Dynamic Output Impedance, 0.22 Typical * Sink Current Capability of 1.0 mA to 100 mA * Equivalent Full-Range Temperature Coefficient of 50 ppm/C Typical * Temperature Compensated for Operation over Full Rated Operating Temperature Range * Low Output Noise Voltage PROGRAMMABLE PRECISION REFERENCES SEMICONDUCTOR TECHNICAL DATA LP SUFFIX PLASTIC PACKAGE CASE 29 (TO-92) 1 2 Pin 1. Reference 2. Anode 3. Cathode 3 P SUFFIX PLASTIC PACKAGE CASE 626 8 1 ORDERING INFORMATION Device Operating Temperature Range TL431CLP, ACLP, BCLP Plastic TA = 0 to +70C TL431CD, ACD, BCD 7 N/C SOP-8 N/C 3 6 Anode N/C 4 5 N/C TL431IP, AIP, BIP Plastic TL431ID, AID, BID 8 Reference N/C 2 TO-92 TA = -40 40 to +85C Cathode 1 MICRO-8 TL431ILP, AILP, BILP TL431IDM, AIDM, BIDM 1 Package TO-92 TL431CP, ACP, BCP TL431CDM, ACDM, BCDM DM SUFFIX PLASTIC PACKAGE CASE 846A (MICRO-8) 8 (Top View) MICRO-8 SOP-8 D SUFFIX PLASTIC PACKAGE CASE 751 (SOP-8) 8 1 Cathode 1 8 2 7 3 6 N/C 4 5 Anode Reference Anode N/C (Top View) SOP-8 is an internally modified SO-8 package. Pins 2, 3, 6 and 7 are electrically common to the die attach flag. This internal lead frame modification decreases power nal dimensions of the standard SO-8 package. Semiconductor Components Industries, LLC, 2001 March, 2001 - Rev. 8 1 Publication Order Number: TL431/D TL431, A, B Series Symbol Representative Schematic Diagram Component values are nominal Cathode (K) Cathode (K) Reference (R) 20 pF Representative Block Diagram Reference (R) 3.28 k Cathode (K) + 800 800 Reference (R) Anode (A) 2.4 k 7.2 k 20 pF 150 4.0 k 10 k 1.0 k 2.5 Vref 800 Anode (A) Anode (A) This device contains 12 active transistors. MAXIMUM RATINGS (Full operating ambient temperature range applies, unless otherwise noted.) Rating Symbol Value Unit VKA 37 V Cathode Current Range, Continuous IK -100 to +150 mA Reference Input Current Range, Continuous Iref -0.05 to +10 mA Operating Junction Temperature TJ 150 C Operating Ambient Temperature Range TL431I, TL431AI, TL431BI TL431C, TL431AC, TL431BC TA Storage Temperature Range Tstg Total Power Dissipation @ TA = 25C Derate above 25C Ambient Temperature D, LP Suffix Plastic Package P Suffix Plastic Package DM Suffix Plastic Package PD Total Power Dissipation @ TC = 25C Derate above 25C Case Temperature D, LP Suffix Plastic Package P Suffix Plastic Package PD Cathode to Anode Voltage NOTE: C -40 to +85 0 to +70 -65 to +150 C W 0.70 1.10 0.52 W 1.5 3.0 ESD data available upon request. RECOMMENDED OPERATING CONDITIONS Condition Cathode to Anode Voltage Symbol Min VKA Vref 36 V IK 1.0 100 mA Cathode Current Max Unit THERMAL CHARACTERISTICS Symbol D, LP Suffix Package P Suffix Package DM Suffix Package Unit Thermal Resistance, Junction-to-Ambient RJA 178 114 240 C/W Thermal Resistance, Junction-to-Case RJC 83 41 - C/W Characteristic http://onsemi.com 2 TL431, A, B Series ELECTRICAL CHARACTERISTICS (TA = 25C, unless otherwise noted.) TL431I Characteristic Min Symbol Reference Input Voltage (Figure 1) VKA = Vref, IK = 10 mA TA = 25C TA = Tlow to Thigh (Note 1) Typ TL431C Max Min Typ Max Vref V 2.44 2.41 2.495 - 2.55 2.58 2.44 2.423 2.495 - 2.55 2.567 - 7.0 30 - 3.0 17 Vref Reference Input Voltage Deviation Over Temperature Range (Figure 1, Notes 1, 2) VKA= Vref, IK = 10 mA V Ratio of Change in Reference Input Voltage to Change in Cathode to Anode Voltage IK = 10 mA (Figure 2), VKA = 10 V to Vref VKA = 36 V to 10 V V mV mV/V ref KA - - Reference Input Current (Figure 2) IK = 10 mA, R1 = 10 k, R2 = TA = 25C TA = Tlow to Thigh (Note 1) Unit -1.4 -1.0 -2.7 -2.0 - - -1.4 -1.0 -2.7 -2.0 A Iref - - 1.8 - 4.0 6.5 - - 1.8 - 4.0 5.2 Reference Input Current Deviation Over Temperature Range (Figure 2, Note 1, 4) IK = 10 mA, R1 = 10 k, R2 = Iref - 0.8 2.5 - 0.4 1.2 A Minimum Cathode Current For Regulation VKA = Vref (Figure 1) Imin - 0.5 1.0 - 0.5 1.0 mA Off-State Cathode Current (Figure 3) VKA = 36 V, Vref = 0 V Ioff - 260 1000 - 260 1000 nA |ZKA| - 0.22 0.5 - 0.22 0.5 Dynamic Impedance (Figure 1, Note 3) VKA = Vref, IK = 1.0 mA to 100 mA f 1.0 kHz NOTES: 1. Tlow = -40C for TL431AIP TL431AILP, TL431IP, TL431ILP, TL431BID, TL431BIP, TL431BILP, TL431AIDM, TL431IDM, TL431BIDM = 0C for TL431ACP, TL431ACLP, TL431CP, TL431CLP, TL431CD, TL431ACD, TL431BCD, TL431BCP, TL431BCLP, TL431CDM, TL431ACDM, TL431BCDM Thigh = +85C for TL431AIP, TL431AILP, TL431IP, TL431ILP, TL431BID, TL431BIP, TL431BILP, TL431IDM, TL431AIDM, TL431BIDM = +70C for TL431ACP, TL431ACLP, TL431CP, TL431ACD, TL431BCD, TL431BCP, TL431BCLP, TL431CDM, TL431ACDM, TL431BCDM 2. The deviation parameter Vref is defined as the difference between the maximum and minimum values obtained over the full operating ambient temperature range that applies. Vref max Vref = Vref max -Vref min TA = T2 - T1 Vref min T1 Ambient Temperature T2 The average temperature coefficient of the reference input voltage, Vref is defined as: ppm V ref C V V ref ref @ 25C T X 106 A V x 10 6 ref T (V @ 25C) A ref Vref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature. (Refer to Figure 6.) Example : V V ref 8.0 mV and slope is positive, @ 25C 2.495 V, T 70C ref A V ref V 0.008 x 106 45.8 ppmC 70 (2.495) KA I K When the device is programmed with two external resistors, R1 and R2, (refer to Figure 2) the total dynamic impedance of the circuit is defined as: 3. The dynamic impedance ZKA is defined as |Z KA| |Z | |Z | KA KA 1 R1 R2 http://onsemi.com 3 TL431, A, B Series ELECTRICAL CHARACTERISTICS (TA = 25C, unless otherwise noted.) TL431AI Characteristic Min Symbol Reference Input Voltage (Figure 1) VKA = Vref, IK = 10 mA TA = 25C TA = Tlow to Thigh Typ TL431AC Max Min Typ TL431BI Max Min Typ Max Unit Vref 2.47 2.44 2.495 - 2.52 2.55 2.47 2.453 2.495 - 2.52 2.537 2.483 2.475 2.495 2.495 2.507 2.515 - 7.0 30 - 3.0 17 - 3.0 17 Vref Reference Input Voltage Deviation Over Temperature Range (Figure 1, Notes 1, 2) VKA= Vref, IK = 10 mA Ratio of Change in Reference Input Voltage to Change in Cathode to Anode Voltage IK = 10 mA (Figure 2), VKA = 10 V to Vref VKA = 36 V to 10 V V V V mV/V ref KA - - Reference Input Current (Figure 2) IK = 10 mA, R1 = 10 k, R2 = TA = 25C TA = Tlow to Thigh (Note 1) mV -1.4 -1.0 -2.7 -2.0 - - -1.4 -1.0 -2.7 -2.0 - - -1.4 -1.0 -2.7 -2.0 A Iref - - 1.8 - 4.0 6.5 - - 1.8 - 4.0 5.2 - - 1.1 - 2.0 4.0 Reference Input Current Deviation Over Temperature Range (Figure 2, Note 1) IK = 10 mA, R1 = 10 k, R2 = Iref - 0.8 2.5 - 0.4 1.2 - 0.8 2.5 A Minimum Cathode Current For Regulation VKA = Vref (Figure 1) Imin - 0.5 1.0 - 0.5 1.0 - 0.5 1.0 mA Off-State Cathode Current (Figure 3) VKA = 36 V, Vref = 0 V Ioff - 260 1000 - 260 1000 - 230 500 nA |ZKA| - 0.22 0.5 - 0.22 0.5 - 0.14 0.3 Dynamic Impedance (Figure 1, Note 3) VKA = Vref, IK = 1.0 mA to 100 mA f 1.0 kHz NOTES: 1. Tlow = -40C for TL431AIP TL431AILP, TL431IP, TL431ILP, TL431BID, TL431BIP, TL431BILP, TL431AIDM, TL431IDM, TL431BIDM = 0C for TL431ACP, TL431ACLP, TL431CP, TL431CLP, TL431CD, TL431ACD, TL431BCD, TL431BCP, TL431BCLP, TL431CDM, TL431ACDM, TL431BCDM Thigh = +85C for TL431AIP, TL431AILP, TL431IP, TL431ILP, TL431BID, TL431BIP, TL431BILP, TL431IDM, TL431AIDM, TL431BIDM = +70C for TL431ACP, TL431ACLP, TL431CP, TL431ACD, TL431BCD, TL431BCP, TL431BCLP, TL431CDM, TL431ACDM, TL431BCDM 2. The deviation parameter Vref is defined as the difference between the maximum and minimum values obtained over the full operating ambient temperature range that applies. Vref max Vref = Vref max -Vref min TA = T2 - T1 Vref min T1 Ambient Temperature T2 The average temperature coefficient of the reference input voltage, Vref is defined as: ppm V ref C V V ref ref @ 25C T X 106 A x 10 6 ref T (V @ 25C) A ref V Vref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature. (Refer to Figure 6.) Example : V V ref 8.0 mV and slope is positive, @ 25C 2.495 V, T 70C ref A V ref 0.008 x 106 45.8 ppmC 70 (2.495) V KA 3. The dynamic impedance ZKA is defined as |Z KA| I K When the device is programmed with two external resistors, R1 and R2, (refer to Figure 2) the total dynamic impedance of the circuit is defined as: |Z | |Z | KA KA 1 R1 R2 http://onsemi.com 4 TL431, A, B Series Input Input VKA IK VKA Iref R1 Vref Input Ioff IK R2 V KA V VKA 1 R1 I R1 ref R2 ref Vref Figure 1. Test Circuit for VKA = Vref 100 Input VKA = Vref TA = 25C IK 800 IK , CATHODE CURRENT ( A) IK , CATHODE CURRENT (mA) 150 Figure 2. Test Circuit for VKA > Vref VKA 50 0 -50 -100 -2.0 -1.0 0 1.0 2.0 Figure 3. Test Circuit for Ioff VKA = Vref TA = 25C 600 Input 400 200 0 -200 -1.0 3.0 0 VKA IK VKA = Vref IK = 10 mA Input 2560 Vref Vref Max = 2550 mV 2540 2520 Vref Typ = 2495 mV 2500 2480 2460 2440 Vref Min = 2440 mV 2420 2400 -55 -25 0 25 50 2.0 3.0 Figure 5. Cathode Current versus Cathode Voltage Iref , REFERENCE INPUT CURRENT ( A) Vref , REFERENCE INPUT VOLTAGE (mV) Figure 4. Cathode Current versus Cathode Voltage 2580 1.0 VKA, CATHODE VOLTAGE (V) VKA, CATHODE VOLTAGE (V) 2600 IMin VKA IK 75 100 125 3.0 2.5 2.0 1.5 1.0 0.5 0 -55 TA, AMBIENT TEMPERATURE (C) Input IK = 10 mA 10k Iref -25 IK 0 VKA 25 50 75 100 TA, AMBIENT TEMPERATURE (C) Figure 6. Reference Input Voltage versus Ambient Temperature Figure 7. Reference Input Current versus Ambient Temperature http://onsemi.com 5 125 0 IK = 10 mA TA = 25C -8.0 -16 Input IK R1 -24 -32 Ioff , OFF-STATE CATHODE CURRENT (nA) Vref , REFERENCE INPUT VOLTAGE (mV) TL431, A, B Series R2 VKA Vref 0 10 30 20 1.0 k 100 10 1.0 Input 0.01 -55 40 -25 10 + Gnd 1.0 0.1 1.0 k 10 k 100 k 1.0 M 0.280 0.260 -25 0 25 50 75 100 125 Figure 11. Dynamic Impedance versus Ambient Temperature IK 15k 80 Output 230 8.25k NOISE VOLTAGE (nV/ Hz) A VOL, OPEN LOOP VOLTAGE GAIN (dB) 125 TA, AMBIENT TEMPERATURE (C) 30 Gnd 20 10 100 0.220 0.200 -55 10 M 60 40 75 0.240 Figure 10. Dynamic Impedance versus Frequency 9.0 F 50 VKA = Vref IK = 1.0 mA to 100 mA f 1.0 kHz Output 1.0k IK 50 + Gnd 0.300 f, FREQUENCY (MHz) 50 25 0.320 |ZKA|, DYNAMIC IMPEDANCE ( ) |ZKA|, DYNAMIC IMPEDANCE ( ) 50 0 Figure 9. Off-State Cathode Current versus Ambient Temperature TA = 25C IK = 1.0 mA to 100 mA Output IK VKA TA, AMBIENT TEMPERATURE (5C) Figure 8. Change in Reference Input Voltage versus Cathode Voltage 1.0 k Ioff 0.1 VKA, CATHODE VOLTAGE (V) 100 VKA = 36 V Vref = 0 V IK = 10 mA TA = 25C 60 40 Input 20 VKA = Vref IK = 10 mA TA = 25C Output IK 0 -10 1.0 k 10 k 100 k 1.0 M 0 10 10 M 100 1.0 k 10 k f, FREQUENCY (Hz) f, FREQUENCY (MHz) Figure 12. Open-Loop Voltage Gain versus Frequency Figure 13. Spectral Noise Density http://onsemi.com 6 100 k TL431, A, B Series Input Monitor Output 2.0 220 Output Pulse Generator f = 100 kHz 1.0 IK , CATHODE CURRENT (mA) 3.0 VOLTAGE SWING (V) 140 TA = 25C 50 Gnd 0 5.0 Input 0 0 4.0 12 8.0 16 A) VKA = Vref B) VKA = 5.0 V @ IK = 10 mA C) VKA = 10 V @ IK = 10 mA D) VKA = 15 V @ IK = 10 mA D) TA = 25C 120 100 A A B 80 B Stable 60 C D 40 20 0 100 pF 20 Stable 1000 pF t, TIME (s) 0.01 F 0.1 F 1.0 F 10 F CL, LOAD CAPACITANCE Figure 14. Pulse Response Figure 15. Stability Boundary Conditions 150 150 IK IK V+ 10 k V+ CL Figure 16. Test Circuit For Curve A of Stability Boundary Conditions CL Figure 17. Test Circuit For Curves B, C, And D of Stability Boundary Conditions TYPICAL APPLICATIONS V+ V+ Vout Vout R1 R1 R2 R2 V out 1 R1 V R2 ref V out 1 R1 V R2 ref Figure 18. Shunt Regulator Figure 19. High Current Shunt Regulator http://onsemi.com 7 TL431, A, B Series V+ V+ MC7805 Out In Common Vout R1 Vout R1 R2 R2 V out min V ref V out min V 5.0V Figure 20. Output Control for a Three-Terminal Fixed Regulator RCL V+ V out 1 R1 V R2 ref V out 1 R1V R2 ref ref V be Figure 21. Series Pass Regulator V+ Iout Isink I V I out ref R CL Sink V ref R S RS Figure 22. Constant Current Source V+ Figure 23. Constant Current Sink V+ Vout Vout R1 R1 R2 R2 V 1 R1 V out(trip) R2 ref V Figure 24. TRIAC Crowbar out(trip) 1 R1 V R2 ref Figure 25. SRC Crowbar http://onsemi.com 8 TL431, A, B Series V+ Vout l R1 V+ R3 Vout Vin R2 R4 Vin Vth = Vref L.E.D. indicator is on' when V+ is between the upper and lower limits. UpperLimit 1 R3V R4 ref LowerLimit 1 R1 V R2 ref Figure 26. Voltage Monitor 1N5305 5.0 k 1% 50 k 1% 10 k V 1.0 k V 500 k 1% 5.0 M 1% 100 k V Range RX 1.0 M V Vout < Vref V+ > Vref 2.0 V Figure 27. Single-Supply Comparator with Temperature-Compensated Threshold 25 V 38 V 2.0 mA TI 10 k Calibrate 25 V LM11 + 330 Tl = 330 to 8.0 8.0 + 360 k 470 F 1.0 F * Vout *Thermalloy *THM 6024 *Heatsink on *LP Package -5.0 V R x V out Range V Figure 28. Linear Ohmmeter 56 k 10 k 0.05 F Tone 25 k Volume 47 k Figure 29. Simple 400 mW Phono Amplifier http://onsemi.com 9 TL431, A, B Series 150 H @ 2.0 A Vin = 10 V to 20 V TIP115 Vout = 5.0 V Iout = 1.0 A 1.0 k 4.7 k + 4.7 k MPSA20 2200 F 1N5823 0.01F 100 k 4.7 k 470 F 0.1 F 2.2 k 10 51 k Figure 30. High Efficiency Step-Down Switching Converter Test Conditions Results Line Regulation Vin = 10 V to 20 V, Io = 1.0 A 53 mV (1.1%) Load Regulation Vin = 15 V, Io = 0 A to 1.0 A 25 mV (0.5%) Output Ripple Vin = 10 V, Io = 1.0 A 50 mVpp P.A.R.D. Output Ripple Vin = 20 V, Io = 1.0 A 100 mVpp P.A.R.D. Efficiency Vin = 15 V, Io = 1.0 A 82% http://onsemi.com 10 + TL431, A, B Series APPLICATIONS INFORMATION The TL431 is a programmable precision reference which is used in a variety of ways. It serves as a reference voltage in circuits where a non-standard reference voltage is needed. Other uses include feedback control for driving an optocoupler in power supplies, voltage monitor, constant current source, constant current sink and series pass regulator. In each of these applications, it is critical to maintain stability of the device at various operating currents and load capacitances. In some cases the circuit designer can estimate the stabilization capacitance from the stability boundary conditions curve provided in Figure 15. However, these typical curves only provide stability information at specific cathode voltages and at a specific load condition. Additional information is needed to determine the capacitance needed to optimize phase margin or allow for process variation. A simplified model of the TL431 is shown in Figure 31. When tested for stability boundaries, the load resistance is 150 . The model reference input consists of an input transistor and a dc emitter resistance connected to the device anode. A dependent current source, Gm, develops a current whose amplidute is determined by the difference between the 1.78 V internal reference voltage source and the input transistor emitter voltage. A portion of Gm flows through compensation capacitance, CP2. The voltage across CP2 drives the output dependent current source, Go, which is connected across the device cathode and anode. Z1 GG R GoR M GM L Example 1: I 10 mA, R 230 , C 0. Define the transfer gain. L L C The DC gain is: GG R GoR M GM L (2.138)(1.0 M)(1.25 )(230) 615 56 dB Loop gain G P2 C P1 1 2 R C P2 P2 8.25 k 218 47 dB 8.25 k 15 k The resulting transfer function Bode plot is shown in Figure 32. The asymptotic plot may be expressed as the following equation: 1 jf 500 kHz Av 615 8.01 kHzjf 601 kHzjf Resistor and capacitor typical values are shown on the model. Process tolerances are 20% for resistors, 10% for capacitors, and 40% for transconductances. An examination of the device model reveals the location of circuit poles and zeroes: 1 1 500 kHz 2 * 15.9 k * 20 pF Also, the transfer dc voltage gain of the TL431 is: Go = 1.25 (Vcp2) mhos. GM 1 P L 2 R C L L where IC is the device cathode current and Gm is in mhos 2 R C Z1 P1 In addition, there is an external circuit pole defined by the load: Model component values are: Vref = 1.78 V Gm = 0.3 + 2.7 exp (-IC/26 mA) P1 1 2 R The Bode plot shows a unity gain crossover frequency of approximately 600 kHz. The phase margin, calculated from the equation, would be 55.9 degrees. This model matches the Open-Loop Bode Plot of Figure 12. The total loop would have a unity gain frequency of about 300 kHz with a phase margin of about 44 degrees. 1 7.96 kHz 2 * 1.0 M * 20 pF 1 60 kHz 2 * 10 M * 0.265 pF http://onsemi.com 11 TL431, A, B Series VCC RL CL Input 3 15 k Cathode 9.0 F Ref Vref 1.78 V 1 + - 500 k 8.25 k RP2 10 M GM Rref CP1 20 pF RGM 1.0 M 16 Anode RZ1 15.9 k Go 1.0 mho CP2 0.265 pF 2 Figure 31. Simplified TL431 Device Model TL431 OPEN-LOOP VOLTAGE GAIN VERSUS FREQUENCY Note that the transfer function now has an extra pole formed by the load capacitance and load resistance. Note that the crossover frequency in this case is about 250 kHz, having a phase margin of about -46 degrees. Therefore, instability of this circuit is likely. 50 40 30 20 TL431 OPEN-LOOP BODE PLOT WITH LOAD CAP 80 10 0 Av, OPEN-LOOP GAIN (dB) Av, OPEN-LOOP VOLTAGE GAIN (dB) 60 -10 -20 101 102 103 104 105 106 10 f, FREQUENCY (Hz) Figure 32. Example 1 Circuit Open Loop Gain Plot Example 2. IC = 7.5 mA, RL = 2.2 k, CL = 0.01 F. Cathode tied to reference input pin. An examination of the data sheet stability boundary curve (Figure 15) shows that this value of load capacitance and cathode current is on the boundary. Define the transfer gain. The DC gain is: 60 40 20 0 -20 101 102 103 104 105 10 f, FREQUENCY (Hz) Figure 33. Example 2 Circuit Open Loop Gain Plot With three poles, this system is unstable. The only hope for stabilizing this circuit is to add a zero. However, that can only be done by adding a series resistance to the output capacitance, which will reduce its effectiveness as a noise filter. Therefore, practically, in reference voltage applications, the best solution appears to be to use a smaller value of capacitance in low noise applications or a very large value to provide noise filtering and a dominant pole rolloff of the system. GG R GoR M GM L (2.323)(1.0 M)(1.25 )(2200) 6389 76 dB The resulting open loop Bode plot is shown in Figure 33. The asymptotic plot may be expressed as the following equation: 1 jf 500 kHz Av 615 8.01 kHzjf 601 kHzjf 7.21 kHzjf http://onsemi.com 12 TL431, A, B Series OUTLINE DIMENSIONS LP SUFFIX PLASTIC PACKAGE CASE 29-11 (TO-92) ISSUE AL A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. B R P L SEATING PLANE K DIM A B C D G H J K L N P R V D X X G J H V C SECTION X-X 1 N INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.021 0.045 0.055 0.095 0.105 0.015 0.020 0.500 --0.250 --0.080 0.105 --0.100 0.115 --0.135 --- MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.407 0.533 1.15 1.39 2.42 2.66 0.39 0.50 12.70 --6.35 --2.04 2.66 --2.54 2.93 --3.43 --- N P SUFFIX PLASTIC PACKAGE CASE 626-05 ISSUE L 8 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 -B- 1 4 F -A- NOTE 2 L C J -T- N SEATING PLANE D H M K G 0.13 (0.005) M T A M B M http://onsemi.com 13 DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC --10 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC --10 0.030 0.040 TL431, A, B Series OUTLINE DIMENSIONS DM SUFFIX PLASTIC PACKAGE CASE 846A-02 (MICRO-8) ISSUE E NOTES: 6. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 7. CONTROLLING DIMENSION: MILLIMETER. 8. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 9. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. -A- -B- K PIN 1 ID G D 8 PL 0.08 (0.003) -T- M T B S A DIM A B C D G H J K L S SEATING PLANE 0.038 (0.0015) C INCHES MIN MAX 0.114 0.122 0.114 0.122 --0.043 0.010 0.016 0.026 BSC 0.002 0.006 0.005 0.009 0.187 0.199 0.016 0.028 L J H MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 --1.10 0.25 0.40 0.65 BSC 0.05 0.15 0.13 0.23 4.75 5.05 0.40 0.70 D SUFFIX PLASTIC PACKAGE CASE 751-07 (SOP-8) ISSUE W -X- NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. A 8 5 0.25 (0.010) S B 1 M Y M 4 K -Y- G C N X 45 SEATING PLANE -Z- 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X S http://onsemi.com 14 J DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0 8 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 8 0.010 0.020 0.228 0.244 TL431, A, B Series Notes http://onsemi.com 15 TL431, A, B Series ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303-675-2167 or 800-344-3810 Toll Free USA/Canada N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (Mon-Fri 2:30pm to 7:00pm CET) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (Mon-Fri 2:00pm to 7:00pm CET) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (Mon-Fri 12:00pm to 5:00pm GMT) Email: ONlit@hibbertco.com CENTRAL/SOUTH AMERICA: Spanish Phone: 303-308-7143 (Mon-Fri 8:00am to 5:00pm MST) Email: ONlit-spanish@hibbertco.com Toll-Free from Mexico: Dial 01-800-288-2872 for Access - then Dial 866-297-9322 ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001-800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com EUROPEAN TOLL-FREE ACCESS*: 00-800-4422-3781 *Available from Germany, France, Italy, UK, Ireland For additional information, please contact your local Sales Representative. http://onsemi.com 16 TL431/D