GENERAL DESCRIPTION
The ML4831 is a complete solution for a dimmable, high
power factor, high efficiency electronic ballast. Contained
in the ML4831 are controllers for “boost” type power
factor correction as well as for a dimming ballast.
The Power factor circuit uses the average current sensing
method with a gain modulator and over-voltage
protection. This system produces power factors of better
than 0.99 with low input current THD at > 95%
efficiency. Special care has been taken in the design of the
ML4831 to increase system noise immunity by using a
high amplitude oscillator, and a current fed multiplier. An
over-voltage protection comparator inhibits the PFC
section in the event of a lamp out or lamp failure
condition.
The ballast section provides for programmable starting
scenarios with programmable preheat and lamp out-of-
socket interrupt times. The IC controls lamp output
through either frequency modulation using lamp current
feedback.
The ML4831 is designed using Micro Linear‘s Semi-
Standard tile array technology. Customized versions of this
IC, optimized to specific ballast architectures can be made
available. Contact Micro Linear or an authorized
representative for more information. * This product is End Of Life as of July 1, 2000
FEATURES
Complete Power Factor Correction and Dimming
Ballast Control on one IC
Low Distortion, High Efficiency Continuous Boost,
Average Current sensing PFC section
Programmable Start Scenario for Rapid or Instant Start
Lamps
Lamp Current feedback for Dimming Control
Variable Frequency dimming and starting
Programmable Restart for lamp out condition to
reduce ballast heating
Over-Temperature Shutdown replaces external heat
sensor for safety
PFC Over-Voltage comparator eliminates output
“runaway” due to load removal
Large oscillator amplitude and gain modulator
improves noise immunity
BLOCK DIAGRAM
JULY 2000
ML4831*
Electronic Ballast Controller
1
7R(SET)
OSCILLATOR
8R(T)/C(T)
10 R(X)/C(X) PRE-HEAT
AND INTERRUPT
TIMERS
CONTROL
&
GATING LOGIC
2IA OUT
4IA+
POWER
FACTOR
CONTROLLER
UNDER-VOLTAGE
AND THERMAL
SHUTDOWN
OUTPUT
DRIVERS
3I(SINE)
1EA OUT
18 EA–/OVP VREF 17
PFC OUT 15
GND 11
VCC 16
PGND 12
OUT B 13
OUT A 14
LFB OUT 6
LAMP F.B. 5
INTERRUPT 9
ML4831
2
PIN CONFIGURATION
PIN# NAME FUNCTION PIN# NAME FUNCTION
1 EA OUT PFC Error Amplifier output and
compensation node
2 IA OUT Output and compensation node of the
PFC average current transconductance
amplifier.
3 I(SINE) PFC gain modulator input.
4 IA+ Non-inverting input of the PFC
average current transconductance
amplifier and peak current sense point
of the PFC cycle by cycle current limit
comparator.
5 LAMP F.B. Inverting input of an Error Amplifier
used to sense (and regulate) lamp arc
current. Also the input node for
dimming control.
6 LFB OUT Output from the Lamp Current Error
Transconductance Amplifier used for
lamp current loop compensation
7 R(SET) External resistor which sets oscillator
FMAX, and R(X)/C(X) charging current
PIN DESCRIPTION
8 R(T)C(T) Oscillator timing components
9 INTERRUPT Input used for lamp-out detection and
restart. A voltage greater than 7.5 volts
resets the chip and causes a restart
after a programmable interval.
10 R(X)/C(X) Sets the timing for the preheat,
dimming lockout, and interrupt
11 GND Ground
12 P GND Power ground for the IC
13 OUT B Ballast MOSFET drive output
14 OUT A Ballast MOSFET drive output
15 PFC OUT Power Factor MOSFET drive output
16 VCC Positive Supply for the IC
17 VREF Buffered output for the 7.5V voltage
reference
18 EA–/OVP Inverting input to PFC error amplifier
and OVP comparator input
ML4831
18-Pin DIP (P18)
EA OUT
IA OUT
I(SINE)
IA+
LAMP F.B.
LFB OUT
R(SET)
R(T)/C(T)
INTERRUPT
EA–/OVP
V
REF
VCC
PFC OUT
OUT A
OUT B
P GND
GND
R(X)/C(X)
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
TOP VIEW
ML4831
3
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, R(SET) = 31.6k, R(T) = 16.2k, C(T) = 1.5nF, TJ = Junction Operating Temperature Range,
ICC = 25mA
PARAMETER CONDITIONS MIN TYP MAX UNITS
PFC Current Sense Amplifier (Pins 2, 4)
Small Signal Transconductance 130 200 270 µmhos
Input Voltage Range –0.3 3.5 V
Output Low ISINE = 0mA, VPIN1 = 0V,
VPIN4 = –0.3V, RL = 0.2 0.4 V
Output High ISINE = 1.5mA, VPIN18/4 = 0V, RL = 5.2 5.6 6 V
Source Current ISINE = 1.5mA, VPIN18/4 = 0V, VPIN2 = 5V –0.3 mA
Sink Current ISINE = 0mA, VPIN2 = 0.3V,
VPIN4 = –0.3V, VPIN1 = 0V 0.3 mA
PFC Voltage Feedback Amplifier (Pins 1, 18)/Lamp Current Amplifier (Pins 5, 6)
Input Offset Voltage ±3.0 ±10.0 mV
Input Bias Current –0.3 –1.0 µA
Small Signal Transconductance 50 80 110 µmhos
Input Voltage Range –0.3 3.5 V
Output Low VPIN5/18 = 3V, RL = 0.2 0.4 V
Output High VPIN5/18 = 2V, RL = 7.2 7.5 V
Source Current VPIN5/18 = 0V, VPIN1/6 = 7V –0.2 mA
Sink Current VPIN5/18 = 5V, VPIN1/6 = 0.3V 0.2 mA
Gain Modulator
Output Voltage ISINE = 100µA, VPIN1 = 3V 40 mV
ISINE = 300µA, VPIN1 = 3V 130 mV
ISINE =100µA, VPIN1 = 6V 112 mV
ISINE = 300µA, VPIN1 = 6V 350 mV
Output Voltage Limit ISINE = 1.5mA, VPIN18 = 0V 865 mV
Offset Voltage ISINE = 0, VPIN18 = 0V 15 mV
ISINE = 150µA, VPIN18 = 3V 15 mV
I(SINE) Input Voltage ISINE = 200µA 0.8 1.4 1.8 V
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
Supply Current (ICC) ............................................... 75mA
Output Current, Source or Sink (Pins 13, 14, 15)
DC ................................................................... 250mA
Output Energy (capacitive load per cycle) .............. 1.5 mJ
Gain Modulator I(SINE) Input (Pin 3) ..................... 10 mA
Analog Inputs (Pins 5, 9, 18) ............... –0.3V to VCC –2V
Pin 4 input voltage ........................................... –3V to 2V
Maximum Forced Voltage (Pins 1, 6) .......... –0.3V to 7.7V
Maximum Forced Current (Pins 1, 2, 6) ................ ±20mA
Maximum Forced Voltage (Pin 2) .................. –0.3V to 6V
Junction Temperature ............................................. 150°C
Storage Temperature Range ..................... –65°C to 150°C
Lead Temperature (Soldering 10 Sec.)..................... 260°C
Thermal Resistance (θJA)
Plastic DIP–P ................................................... 70°C/W
OPERATING CONDITIONS
Temperature Range
ML4831C .................................................. 0°C to 85°C
ML4831
4
ELECTRICAL CHARACTERISTICS (Continued)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Oscillator
Initial accuracy TA = 25°C 727680kHz
Voltage stability VCCZ – 3V < VCC <VCCZ – 0.5V 1 %
Temperature stability 2%
Total Variation Line, temperature 69 83 kHz
Ramp Valley to Peak 2.5 V
C(T) Charging Current (FM Modes) VPIN5 = 3V, VPIN8 = 2.5V,
VPIN10 = 0.9V (Preheat) –78 µA
VPIN5 = 3V, VPIN8 = 2.5V,
VPIN10 = Open –156 µA
C(T) Discharge Current VPIN8 = 2.5V 5 mA
Output Drive Deadtime 0.75 µs
Reference Section
Output Voltage TA = 25°C, IO = 1mA 7.4 7.5 7.6 V
Line regulation VCCZ – 3V < VCC < VCCZ – 0.5V 2 10 mV
Load regulation 1mA < IO < 20mA 2 15 mV
Temperature stability 0.4 %
Total Variation Line, load, temp 7.35 7.65 V
Output Noise Voltage 10Hz to 10KHz 50 µV
Long Term Stability TJ = 125°C, 1000 hrs 5 mV
Short Circuit Current VCC < VCCZ – 0.5V, VREF = 0V –40 mA
Preheat and Interrupt Timer (Pin 10) (R(X) = 590K, C(X) = 5.6µF)
Initial Preheat Period 0.8 s
Subsequent Preheat Period 0.7 s
Start Period 2.1 s
Interrupt Period 6.3 s
Pin 10 Charging Current –19 µA
Pin 10 Open Circuit Voltage VCC = 12.3V in UVLO 0.4 0.9 1.1 V
Pin 10 Maximum Voltage 7.0 7.3 7.7 V
Input Bias Current VPIN10 = 1.2V –0.2 µA
Preheat Lower Threshold 1.18 V
Preheat Upper Threshold 3.36 V
Interrupt Recovery Threshold 1.18 V
Start Period End Threshold 6.7 V
Interrupt Input (Pin 9)
Interrupt Threshold 7.35 7.5 7.65 V
Input Bias Current –0.3 –1 µA
ML4831
5
ELECTRICAL CHARACTERISTICS (Continued)
PARAMETER CONDITIONS MIN TYP MAX UNITS
OVP Comparator (Pin 18)
OVP Threshold 2.6 2.7 2.8 V
Hysteresis 0.25 V
Propagation Delay 500 ns
Outputs
Output Voltage Low IOUT = 20mA 0.4 0.8 V
IOUT = 200mA 2.1 3.0 V
Output Voltage High IOUT = –20mA VCC – 2.5 VCC – 1.9 V
IOUT = –200mA VCC – 3.0 VCC – 2.2 V
Output Voltage Low in UVLO IOUT = 10mA, VCC = 8V 0.8 1.5 V
Output Rise/Fall Time CL = 1000pF 50 ns
Under-Voltage Lockout and Bias Circuits
IC Shunt Voltage (VCCZ)I
CC = 25mA 12.8 13.5 14.2 V
VCCZ Load Regulation 25mA < ICC < 68mA 150 300 mV
VCCZ Total Variation Load, Temp 12.4 14.6 V
Start-up Current VCC 12.3V 1.3 1.7 mA
Operating Current VCC = VCCZ – 0.5V 15 19 mA
Start-up Threshold VCCZ – 0.5 V
Shutdown Threshold VCCZ – 3.5 V
Shutdown Temperature (TJ) 120 °C
Hysteresis (TJ)30 °C
FUNCTIONAL DESCRIPTION
OVERVIEW
The ML4831 consists of an Average Current controlled
continuous boost Power Factor front end section with a
flexible ballast control section. Start-up and lamp-out retry
timing are controlled by the selection of external timing
components, allowing for control of a wide variety of
different lamp types. The ballast section controls the lamp
power using frequency modulation (FM) with additional
programmability provided to adjust the VCO frequency
range. This allows for the IC to be used with a variety of
different output networks.
POWER FACTOR SECTION
The ML4831 Power Factor section is an average current
sensing boost mode PFC control circuit which is
architecturally similar to that found in the ML4821. For
detailed information on this control architecture, please
refer to Application Note 16 and the ML4821 data sheet.
GAIN MODULATOR
The ML4831 gain modulator provides high immunity to
the disturbances caused by high power switching. The
rectified line input sine wave is converted to a current via
a dropping resistor. In this way, small amounts of ground
noise produce an insignificant effect on the reference to
the PWM comparator.
The output of the gain modulator appears on the positive
terminal of the IA amplifier to form the reference for the
current error amplifier. Please refer to Figure 1.
VISINE VEA V
mA
MUL
×−
[]
()( .)
.
11
417
(1)
where: I(SINE) is the current in the dropping resistor,
V(EA) is the output of the error amplifier (Pin 1).
The output of the gain modulator is limited to 1.0V.
ML4831
6
AVERAGE CURRENT AND OUTPUT VOLTAGE
REGULATION
The PWM regulator in the PFC Control section will act to
offset the positive voltage caused by the multiplier output
by producing an offsetting negative voltage on the current
sense resistor at Pin 4. A cycle-by-cycle current limit is
included to protect the MOSFET from high speed current
transients. When the voltage at Pin 4 goes negative by
more than 1V, the PWM cycle is terminated.
For more information on compensating the average
current and boost voltage error amplifier loops, see
ML4821 data sheet.
OVERVOLTAGE PROTECTION AND INHIBIT
The OVP pin serves to protect the power circuit from
being subjected to excessive voltages if the load should
change suddenly (lamp removal). A divider from the high
voltage DC bus sets the OVP trip level. When the voltage
on Pin 18 exceeds 2.75V, the PFC transistors are inhibited.
The ballast section will continue to operate. The OVP
threshold should be set to a level where the power
components are safe to operate, but not so low
as to interfere with the boost voltage regulation loop.
Figure 1. ML4831 Block Diagram
TRANSCONDUCTANCE AMPLIFIERS
The PFC voltage feedback, PFC current sense, and the
loop current amplifiers are all implemented as operational
transconductance amplifiers. They are designed to have
low small signal forward transconductance such that a
large value of load resistor (R1) and a low value ceramic
capacitor (<1µF) can be used for AC coupling (C1) in the
frequency compensation network. The compensation
network shown in Figure 2 will introduce a zero and a
pole at:
fRC fRC
ZP
==
1
2
1
2
11 12
ππ
(2)
+
18
2.5V
R1
C1
C2
Figure 2. Compensation Network
7R(SET)
R(X)/C(X)
VCC
V
REF
GND
IA OUT
IA + –V
MUL
+
10
16
17
11
2
4
OUT B 13
+
+
+
+
2.5V
V
REF
–1V
PREHEAT
TIMER
OSC
UNDER-VOLTAGE
AND THERMAL
SHUTDOWN
+
S
R
Q
T
Q
Q
P GND 12
OUT A 14
PFC OUT 15
R(T)/C(T) 8
INTERRUPT 9
LFB OUT 6
LAMP F.B. 5
7K
PWM (PFC)
7K
I(SINE)
EA OUT
EA –/OVP
3
1
18
+
2.5V
+
2.75V
OVP
GAIN
MODULATORS
ML4831
7
Figure 3 shows the output configuration for the
operational transconductance amplifiers.
CURRENT
MIRROR
IN OUT
CURRENT
MIRROR
IN OUT
gmV
IN
io = gmV
IN
IQ + 2
gmV
IN
IQ – 2
Figure 3. Output Configuration
A DC path to ground or VCC at the output of the
transconductance amplifiers will introduce an offset error.
The magnitude of the offset voltage that will appear at the
input is given by VOS = io/gm. For a io of 1uA and a gm
of 0.08 µmhos the input referred offset will be 12.5mV.
Capacitor C1 as shown in Figure 2 is used to block the
DC current to minimize the adverse effect of offsets.
Slew rate enhancement is incorporated into all of the
operational transconductance amplifiers in the ML4831.
This improves the recovery of the circuit in response to
power up and transient conditions. The response to large
signals will be somewhat non-linear as the
transconductance amplifiers change from their low to high
transconductance mode. This is illustrated in Figure 4.
V
IN
Differential
Linear Slope Region
0
i
O
Figure 4. Transconductance Amplifier Characteristics
BALLAST OUTPUT SECTION
The IC controls output power to the lamps via frequency
modulation with non-overlapping conduction. This means
that both ballast output drivers will be low during the
discharging time tDIS of the oscillator capacitor CT.
OSCILLATOR
The VCO frequency ranges are controlled by the output of
the LFB amplifier (Pin 6). As lamp current decreases, Pin 6
rises in voltage, causing the C(T) charging current to
decrease, thereby causing the oscillator frequency to
decrease. Since the ballast output network attenuates high
frequencies, the power to the lamp will be increased.
17
+
1.25/3.75
8
C(T)
V
REF
I
CHG
V
REF
CONTROL
R(T)/C(T)
R(T)
5 mA
CLOCK
C(T)
V
TH
= 3.75V
V
TL
= 1.25V
t
DIS
t
CHG
Figure 5. Oscillator Block Diagram and Timing
The oscillator frequency is determined by the following
equations:
Ftt
OSC CHG DIS
=+
1
(3)
and
tRCIn
VIRV
VIRV
CHG T T REF CH T TL
REF CH T TH
=+−
+−
(4)
ML4831
8
The oscillators minimum frequency is set when ICH = 0
where:
FRC
OSC TT
×
1
051.
(5)
This assumes that tCHG >> tDIS.
When LFB OUT is high, ICH = 0 and the minimum
frequency occurs. The charging current varies according
to two control inputs to the oscillator:
1. The output of the preheat timer
2. The voltage at Pin 6 (lamp feedback amplifier
output)
In preheat condition, charging current is fixed at
IR SET
CHG PREHEAT()
.
()
=
25 (6)
In running mode, charging current decreases as the VPIN6
rises from 0V to VOH of the LAMP FB amplifier. The
highest frequency will be attained when ICHG is highest,
which is attained when VPIN6 is at 0V:
IR SET
CHG( )
()
0
5
=
(7)
Highest lamp power, and lowest output frequency are
attained when VPIN6 is at its maximum output voltage
(VOH).
In this condition, the minimum operating frequency of the
ballast is set per (5) above.
For the IC to be used effectively in dimming ballasts with
higher Q output networks a larger CT value and lower RT
value can be used, to yield a smaller frequency excursion
over the control range (VPIN6). The discharge current is set
to 5mA. Assuming that IDIS >> IRT:
tC
DIS VCO T()
≅×490
(8)
IC BIAS, UNDER-VOLTAGE LOCKOUT AND THERMAL
SHUTDOWN
The IC includes a shunt regulator which will limit the
voltage at VCC to 13.5 (VCCZ). The IC should be fed with
a current limited source, typically derived from the ballast
transformer auxiliary winding. When VCC is below
VCCZ – 0.7V, the IC draws less than 1.7mA of quiescent
current and the outputs are off. This allows the IC to start
using a “bleed resistor” from the rectified AC line.
To help reduce ballast cost, the ML4831 includes a
temperature sensor which will inhibit ballast operation if
the IC’s junction temperature exceeds 120°C. In order to
use this sensor in lieu of an external sensor, care should be
taken when placing the IC to ensure that it is sensing
temperature at the physically appropriate point in the
ballast. The ML4831’s die temperature can be estimated
with the following equation:
TT P CW
JAD
≅××°65 /
(9)
VCCZ
V(ON)
V(OFF)
15mA
1.3mA
V
CC
I
CC
t
t
Figure 6. Typical VCC and ICC Waveforms when
the ML4831 is Started with a Bleed Resistor from
the Rectified AC Line and Bootstrapped from an
Auxiliary Winding.
STARTING, RE-START, PREHEAT AND INTERRUPT
The lamp starting scenario implemented in the ML4831
is designed to maximize lamp life and minimize ballast
heating during lamp out conditions.
The circuit in Figure 7 controls the lamp starting scenarios:
Filament preheat and Lamp Out interrupt. C(X) is charged
with a current of IR(SET)/4 and discharged through R(X).
The voltage at C(X) is initialized to 0.7V (VBE) at power
up. The time for C(X) to rise to 3.4V is the filament preheat
time. During that time, the oscillator charging current
(ICHG) is 2.5/R(SET). This will produce a high frequency
for filament preheat, but will not produce sufficient
voltage to ignite the lamp.
After cathode heating, the inverter frequency drops to FMIN
causing a high voltage to appear to ignite the lamp. If the
voltage does not drop when the lamp is supposed to have
ignited, the lamp voltage feedback coming into Pin 9 rises
to above VREF, the C(X) charging current is shut off and the
inverter is inhibited until C(X) is discharged by R(X) to the
1.2V threshold. Shutting off the inverter in this manner
prevents the inverter from generating excessive heat when
the lamp fails to strike or is out of socket. Typically this
time is set to be fairly long by choosing a large value of R(X).
ML4831
9
10
9
R(X)
C(X)
6.8
+
1.2/3.4
HEAT
INHIBIT
0.625
R(SET)
+
1.2/6.8
+
V
REF
DIMMING
LOCKOUT
R(X)/C(X)
INT Q
R
S
Figure 7. Lamp Preheat and Interrupt Timers
LFB OUT is ignored by the oscillator until C(X) reaches
6.8V threshold. The lamps are therefore driven to full
power and then dimmed. The C(X) pin is clamped to
about 7.5V.
A summary of the operating frequencies in the various
operating modes is shown below.
Operating Mode Operating Frequency
[F(MAX) to F(MIN)]
Preheat 2
Dimming
Lock-out F(MIN)
Dimming
Control F(MIN) to F(MAX)
6.8
3.4
1.2
.65
0
7.5
R(X)/C(X)
HEAT
DIMMING
LOCKOUT
INT
INHIBIT
Figure 8. Lamp Starting and Restart Timing
ML4831
10
APPLICATIONS POWER FACTOR CORRECTED FLUORESCENT DIMMING LAMP BALLAST
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
ML4831
D1 D3
D2 D4
L
G
N
F1
120V
L1
L2 C2
C1 C3
D8
T1
41
32
R6
R14
C12 C5 D5
D6
R1 R4 R2 R3 R5 R24
C25 C26 C4 C6 C7
R16
R10
R17
C10
+
R7
R11
Q1
D7
C11
+
R12
R13
R9 R8
C13 C14 C24 C15 C16
++
R15
D11 D12
C22
Q2
Q3
T2
5
84
1
C17
R21 R22
T3
2
1
4
5
3
6
8
7
10 9
C20
C19
T4
1
4
8
5
41
85
T5
C23
Y
Y
R
R
B
B
D13
C21
R23
Figure 9. Typical Application: 2-Lamp Isolated Dimming Ballast with Active Power Factor Correction for 120VAC Input
ML4831
11
TABLE 1: PARTS LIST FOR THE ML4831EVAL EVALUATION KIT
CAPACITORS
QTY. REF. DESCRIPTION MFR. PART NUMBER
2 C1, 2 3.3nF, 125VAC, 10%, ceramic, “Y” capacitor Panasonic ECK-DNS332ME
1 C3 0.33µF, 250VAC, “X”, capacitor Panasonic ECQ-U2A334MV
4 C4, 8, 9, 22 0.1µF, 50V, 10%, ceramic capacitor AVX SR215C104KAA
2 C5, 21 0.01µF, 50V, 10%, ceramic capacitor AVX SR211C103KAA
1 C6 1.5µF, 50V, 2.5%, NPO ceramic capacitor AVX RPE121COG152
2 C7, 12 1µF, 50V, 20%, ceramic capacitor AVX SR305E105MAA
1 C10 100µF, 25V, 20%, electrolytic capacitor Panasonic ECE-A1EFS101
1 C11 100µF, 250V, 20%, electrolytic capacitor Panasonic ECE-S2EG101E
1 C13 4.7µF, 50V, 20%, electrolytic capacitor Panasonic ECE-A50Z4R7
3 C14, 15, 17 0.22µF, 50V, 10%, ceramic capacitor AVX SR305C224KAA
1 C16 1.5µF, 50V, 10%, ceramic capacitor AVX SR151V152KAA
1 C19 22nF, 630V, 5%, polypropylene capacitor WIMA MKP10, 22nF, 630V, 5%
1 C20 0.1µF, 250V, 5%, polypropylene capacitor WIMA MKP10, 0.1µF, 250V, 5%
1 C23 0.068µF, 160V, 5%, polypropylene capacitor WIMA MKP4, 68nF, 160V, 5%
1 C24 220µF, 16V, 20%, electrolytic capacitor Panasonic ECE-A16Z220
1 C25 47nF, 50V, 10%, ceramic capacitor AVX SR211C472KAA
1 C26 330pF, 50V, 10%, ceramic capacitor AVX SR151A331JAA
RESISTORS:
1 R1 0.33, 5%, 1/2W, metal film resistor NTE HWD33
1 R2 4.3K, 1/4W, 5%, carbon film resistor Yageo 4.3K-Q
1 R3 47K, 1/4W, 5%, carbon film resistor Yageo 47K-Q
1 R4 12K, 1/4W, 5%, carbon film resistor Yageo 12K-Q
1 R5 20K, 1/4W, 1%, metal film resistor Dale SMA4-20K-1
1 R6 360K, 1/4W, 5%, carbon film resistor Yageo 360K-Q
1 R7 36K, 1W, 5%, carbon film resistor Yageo 36KW-1-ND
3 R8, 22, 11 22, 1/4W, 5%, carbon film resistor Yageo 22-Q
1 R9 402K, 1/4W, 1%, metal film resistor Dale SMA4-402K-1
1 R10 17.8K, 1/4W, 1%, metal film resistor Dale SMA4-17.8K-1
1 R12 475K, 1/4W, 1%, metal film resistor Dale SMA4-475K-1
1 R13 5.49K, 1/4W, 1%, metal film resistor Dale SMA4-5.49K-1
ML4831
12
TABLE 1: PARTS LIST FOR ML4831EVAL EVALUATION KIT (Continued)
RESISTORS: (Continued)
QTY. REF. DESCRIPTION MFR. PART NUMBER
4 R14, 17, 24, 25 100K, 1/4W, 5%, carbon film resistor Yageo 100K-Q
1 R15 681K, 1/4W, 5%, carbon film resistor Yageo 681K-Q
1 R16 10K, 1/4W, 1%, metal film resistor Dale SMA4-10K-1
1 R21 33, 1/4W, 5%, carbon film resistor Yageo 33-Q
1 R23 25K, pot (for dimming adjustment) Bourns 3386P-253-ND
DIODES:
4 D1, 2, 3, 4 1A, 600V, 1N4007 diode Motorola 1N4007TR
(or 1N5061 as a substitute)
2 D5, 6 1A, 50V (or more), 1N4001 diodes Motorola 1N4001TR
1 D7 3A, 400V, BYV26C or BYT03 400 fast recovery GI BYV26C
or MUR440 Motorola ultra Fast diode
5 D8, 9, 11, 0.1A, 75V, 1N4148 signal diode Motorola 1N4148TR
12, 13
IC’s:
1 IC1 ML4831, Electronic Ballast Controller IC Micro ML4831CP
Linear
TRANSISTORS:
3 Q1, 2, 3 3.3A, 400V, IRF720 power MOSFET IR IR720
MAGNETICS:
1 T1 T1 Boost Inductor, E24/25, 1mH, Custom Coils P/N 5039 or Coiltronics P/N CTX05-12538-1
E24/25 core set, TDK PC40 material
8-pin vertical bobbin (Cosmo #4564-3-419),
Wind as follows:
195 turns 25AWG magnet wire, start pin #1, end pin #4
1 layer mylar tape
14 turns 26AWG magnet wire, start pin #3, end pin #2
NOTE: Gap for 1mH ±5%
1 T2 T2 Gate Drive Xfmr, LPRI = 3mH, Custom Coils P/N 5037 or Coiltronics P/N CTX05-12539-1
Toroid Magnetics YW-41305-TC
Wind as follows:
Primary = 25 turns 30AWG magnet wire, start pin #1, end pin #4
Secondary = 50 turns 30AWG magnet wire, start pin #5, end pin #8
ML4831
13
TABLE 1: PARTS LIST FOR ML4831EVAL EVALUATION KIT (Continued)
MAGNETICS: (Continued)
QTY. REF. DESCRIPTION MFR. PART NUMBER
1 T3 T3 Inductor, LPRI = 1.66mH, Custom Ciols P/N 5041 or Coiltronics P/N CTX05-12547-1
E24/25 core set, TDK PC40 material
10 pin horizontal bobbin (Plastron #0722B-31-80)
Wind as follows:
1st: 170T of 25AWG magnet wire; start pin #10, end pin #9.
1 layer of mylar tape
2nd: 5T of #32 magnet wire; start pin #2, end pin #1
1 layer of mylar tape
3rd: 3T of #30 Kynar coated wire; start pin #4, end pin #5
4th: 3T of #30 Kynar coated wire; start pin #3, end pin #6
5th: 3T of #30 Kynar coated wire; start pin #7, end pin #8
NOTE: Gap for 1.66mH ±5% (pins 9 to 10)
1 T4 T4 Power Xfmr, LPRI = 3.87mH, Custom Ciols P/N 5038 or Coiltronics P/N CTX05-12545-1
E24/25 core set, TDK PC40 material
8 pin vertical bobbin (Cosmo #4564-3-419)
Wind as follows:
1st: 200T of 30AWG magnet wire; start pin #1, end pin #4.
1 layer of mylar tape
2nd: 300T of 32AWG magnet wire; start pin #5, end pin #8
NOTE: Gap for inductance primary: (pins 1 to 4) @ 3.87mH ±5%
1 T5 T5 Current Sense Inductor, Custom Coils P/N 5040 or Coiltronics P/N CTX05-12546-1
Toroid Magnetics YW-41305-TC
Wind as follows:
Primary = 3T 30AWG magnet coated wire, start pin #1, end pin #4
Secondary = 400T 35AWG magnet wire, start pin #5, end pin #8
INDUCTORS:
2 L1, 2 EMI/RFI Inductor, 600µH, DC resistance = 0.45Prem. SPE116A
Magnetics
FUSES:
1 F1 2A fuse, 5 x 20mm miniature Littlefuse F948-ND
2 Fuse Clips, 5 x 20mm, PC Mount F058-ND
HARDWARE:
1 Single TO-220 Heatsink Aavid Eng. PB1ST-69
2 Double TO-220 Heatsink IERC PSE1-2TC
3 MICA Insulators Keystone 4673K-ND
ML4831
14
ORDERING INFORMATION
PART NUMBER TEMPERATURE RANGE PACKAGE
ML4831CP0°C to 85°CMolded PDIP (P18) (END OF LIFE)
Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design.
Micro Linear does not assume any liability arising out of the application or use of any product described herein,
neither does it convey any license under its patent right nor the rights of others. The circuits contained in this
data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to
whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility
or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel
before deciding on a particular application.
DS4831-01
2092 Concourse Drive
San Jose, CA 95131
Tel: 408/433-5200
Fax: 408/432-0295
SEATING PLANE
0.240 - 0.260
(6.09 - 6.61)
PIN 1 ID 0.295 - 0.325
(7.49 - 8.26)
0.890 - 0.910
(22.60 - 23.12)
0.016 - 0.022
(0.40 - 0.56)
0.100 BSC
(2.54 BSC)
0.008 - 0.012
(0.20 - 0.31)
0.015 MIN
(0.38 MIN)
18
0º - 15º
1
0.050 - 0.065
(1.27 - 1.65)
0.170 MAX
(4.32 MAX)
0.125 MIN
(3.18 MIN)
0.045 MIN
(1.14 MIN)
(4 PLACES)
Package: P18
18-Pin PDIP
© Micro Linear 1997
Micro Linear
is a registered trademark of Micro Linear Corporation
Products described in this document may be covered by one or more of the following patents, U.S.: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940;
5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; Japan: 2598946. Other patents are pending.
PHYSICAL DIMENSIONS inches (millimeters)