HARRIS SEMICONDUCTOR CD4076BMS CMOS 4 -Bit D-Type Registers December 1992 Features Pinout High Voltage Type (20V Rating) conervewe * Three State Outputs * Input Disabled Without Gating the Clock , {" EE Hs] VDO * Gated Output Control Lines for Enabling or Disabling DISABLE '} w [2] His] RESET the Outputs ai fs] Ha] DATA 1 * Standardized Symmetrical Output Characteristics aals 13] DATA 2 * 100% Tested for Quiescent Current at 20V as [s 2] DATA 3 * Maximum input Current of 1A at 18V Over Full Pack- as[s H1] DATA 4 age Temperature Range; 100nA at 18V and +25C crock [7 Ho] G2) DATA * Noise Margin (Over Full Package/Temperature Range) vss [fs Oo af ee oLe - 1Vat VDD =5V - 2V at VDD = 10V - 2.5V at VDD = 15V SV, 10V and 15V Parametric Ratings Functional Diagram Meets All Requirements of JEDEC Tentative Standard No. 138, Standard Specifications for Description of B Series CMOS Devices DATA INPUT OUTPUT DISABLE DISABLE Description G1 @ cLocK uooOU+N 2 CD4076BMS types are four-bit registers consisting of D-type * u | Ml | | flip-flops that feature three-state outputs. Data Disable inputs 4 , ob 3 are provided to contro! the entry of data into the flip-flops. Di | 4 a When both Data Disable inputs are low, data at the D inputs 13 4 are loaded into their respective flip-flops on the next positive | 2 1---e/o FUP FLOES ot 2 transition of the clock input. Output Disable inputs are also With provided. When the Output Disable inputs are both low, the os 12 , AND-OR r, 5 a normal logic states of the four outputs are available to the Loic load. The outputs are disabled independently of the clock by rT] . , 6 a high logic level at either Output Disable input, and present Dt o7fo 7 as a high impedance. | . so: . 18 VSS 8 The CD4076BMS is supplied in these 16 lead outline pack- RESET VDD 16 ages: Braze Seal DIP H4T Frit Seat DIP HIE Ceramic Flatpack Hew CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper |.C. Handling Procedures. 7-1029 Copyright Harris Corporation 1992 FileNumber 3325 LOGIC aSpecifications CD4076BMS Absolute Maximum Ratings Reliability Information DC Supply Voltage Range, (VDD) ............... -0.5V to +20V Thermal Resistance ..............0. Ga 8, (Voltage Referenced to VSS Terminals) Ceramic DIP and FRIT Package ..... 80C/W 20C/W Input Voltage Range, All Inputs ............. -0.5V to VDD +0.5V Flatpack Package ................ 70C 20C/w DC Input Current, Any One Input................000002 008 +10mA = Maximum Package Power Dissipation (PD) at +125C Operating Temperature Range................ -55C to +125C For TA = -55C to +100C (Package Type D,F,K) ...... 500mW Package Types D, F, K, H For TA = +100C to +125C (Package Type D, F,K)...... Derate Storage Temperature Range (TSTG)........... ~65C to +150C Linearity at 12mW/C to 200mW Lead Temperature (During Soldering) ................. +265C _ Device Dissipation per Output Transistor ............... 100mWw At Distance 1/16 + 1/32 Inch (1.59mm + 0.79mm) from case for For TA = Full Package Tamperature Range (All Package Types) 10s Maximum Junction Temperature 0... e eee eens +175C TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A LIMITS SUBGROUP UNIT PARAMETER SYMBOL CONDITIONS (NOTE 1) s TEMPERATURE MIN | MAX s Supply Current IDD | VDD = 20V, VIN = VDD or GND 1 +25C - 10 pA 2 +125C - 1000 | pA VDD = 18V, VIN = VDD or GND 3 -55C : 10 pA Input Leakage Current HL VIN=VDDorGND [VOD =20 1 +25C -100 - nA 2 +125C -4000 - nA VDD = 18V 3 -55C -100 - nA Input Leakage Current (lH VIN=VODorGND [VDD =20 1 425C - 100 nA 2 +125C : 1000 nA VDD = i8V 3 -55C. - 100 nA Output Voltage VOL15 | VDD = 15V, No Load 1,2,3 +25C, +125C, - : 50 mV 55C Output Voltage VOH15 | VDD = 15V, No Load (Note 3) 1,2,3 425C, +125C, - 14.95 - Vv 55C Output Current (Sink) fOL5 VOD = 5V, VOUT = 0.4V 1 +25C 0.53 : mA Output Current (Sink) 1OL10 | VDD = 10V, VOUT =0.5V 1 425C 1.4 - mA Output Current (Sink) 1OL15 | VDD = 15V, VOUT = 1.5V 1 425C 3.5 : mA Output Current |OHSA | VDD = 5V, VOUT = 4.6V 1 +25C - 053 [ mA (Source) Output Current IOH5B | VDD = 5V, VOUT = 2.5V 1 +25C - -1.8 mA (Source) Output Current IOH10 [| VDD = 10V, VOUT =9.5V 1 +25C - -1.4 mA (Source) Output Current IOH15 [VDD = 15V, VOUT = 13.5V 1 425C - -3.5 mA (Source) N Threshold Voltage VNTH [VDD = 10V, ISS = -10A 1 +25C -2.8 0.7 Vv P Threshold Voltage VPTH [VSS = OV, IDD = 10pA 1 425C 0.7 2.8 Vv Functional F VDD = 2.8V, VIN = VDD of GND 7 425C VOH> | VOL Vv VDD = 20V, VIN = VOD or GND 7 +25C vbby2 Vox Pp VDD = 18V, VIN = VDD or GND 8A 4+128C DD VDD = 3V, VIN = VOD or GND 8B 55C Input Voltage Low VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1,2,3 425C, +125C, - : 1.5 Vv (Note 2) 55C Input Voltage High VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1,2,3 +25C, +125C, - 3.5 : v (Note 2) 55C Input Voltage Low VIL VDD = 15V, VOH > 13.5V, 1,2,3 +25C, +1256C, - : 4 v (Note 2) VOL < 1.5V 55C Input Voltage High VIH VDD = 15V, VOH > 13.5V, 1,2,3 +25C, +125C, - 1 - Vv (Note 2) VOL < 1.5V 55C Tri-State Output 1O2ZL VIN = VDD or GND VDD = 20V 1 425C -~0.4 : pA Leakage VOUT = 0V 2 4125C 12 - pA VDD = 18V 3 -65C -0.4 : pA 7-1030Specifications CD4076BMS TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A LIMITS SUBGROUP UNIT PARAMETER SYMBOL CONDITIONS (NOTE 1) s TEMPERATURE MIN | MAX s Tri-State Output 10ZH |VIN=VDDorGND |VDD=20V 1 425C : 0.4 pA Leakage VOUT = VDD 2 +125C : 12 | WA VOD = 18V 3 55C . 0.4 pA NOTES: 1. Ail voltages referenced to'device GND, 100% testing being 3. For accuracy, voltage is measured differentially to VDD. implemented. Umit is 0.050V max. 2. Go/No Go test with fimits applied to inputs. TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A UMITS PARAMETER SYMBOL | CONDITIONS (Notes 1,2) | SUBGROUPS | TEMPERATURE| MIN MAX | UNITS Propagation Delay TPHL | VDD =5V, VIN = VOD or GND 9 +25C - 600 ns Clock to Q Output TPLH 10, 11 +125C, 55C | - 810 | 6 Transition Time TTHL | VDD = 5V, VIN = VOD or GND 9 +25C : 200 ns TH 10, 11 +125C, -55C - 270 ns NOTES: 1. CL = 50pF, RL = 200K, input TR, TF < 20ns. 2. -5C and +125C limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE| MIN MAX | UNITS Supply Current 100 VDD = 5V, VIN = VDD or GND 1,2 -55C, +25C . 5 pa +125C : 150 pA VOD = 10V, VIN = VDD ofr GND 1,2 -55C, +25C : 10 pA +125C : 300 pA oO VDD = 15V, VIN = VDD or GND 1,2 55C, +25C - 10 pA 8 4+125C . 600 A 4 Output Voltage VOL VDD = 5V, No Load 1,2 +25C, +125C, - 50 mV -55C Output Voltage VOL VDD = 10V, No Load 1,2 425C, +125C, . mV -55C Output Voltage VOH VDD = 5V, No Load 1,2 +28C, +125C, | 4.95 : Vv 55C Output Voltage VOH VDD = 10V, No Load 1,2 +25C, +125C, | 9.95 . v 65C Output Current (Sink) 1OL5 =| VDD = 5V, VOUT = 0.4V 1,2 +125C 0.36 . mA 55C 0.64 - mA Output Current (Sink) 1OL10 | VDD = 10V, VOUT = 0.5V 1,2 +125C 0.9 : mA -55C 1.6 - mA Output Current (Sink) (OL15 | VDD = 15V, VOUT = 1.5V 1,2 +125C 2.4 : mA -55C 4.2 - mA Output Current (Source) IOH5A_ | VOD = 5V, VOUT = 4.6V 1,2 +125C - 0.36 mA -55C : 0.64 mA Output Current (Source) IOH5B | VDD = 5V, VOUT = 2.5V 1,2 +125C. - 1.15 mA -55C : -2.0 mA 7-1031Specifications CD4076BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE} MIN MAX UNITS Output Current (Source) 1OH10 | VDD = 10V, VOUT = 9.5V 1,2 +125C . 0.9 mA -55C - -2.6 mA Output Current (Source) fOH15 | VDD =15V, VOUT = 13.5V 1,2 +125C . 2.4 mA -55C - 4.2 mA Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL < 1,2 425C, +125C, - 3 Vv 1v 55C Input Voltage High VIH VDD = 10V, VOH > 9V, VOL < 1,2 +25C, +125C, 7 - Vv 1V -55C Propagation Delay TPHL1 [VDD = 10V 1,2,3 +25C. - 250 ns Clock to Q Output TPLHY [Vop = 15V 12,3 +25C : 180 | ns Propagation Delay TPHL2 [VDD =5Vv 1,2,3 +25C - 460 ns Reset VDD = 10V 1,2,3 +25C - 200 ns VDD = 15V 1,2,3 425C : 150 ns Propagation Delay TPHZ | VDD =5V 1,2,4 +25C - 300 ns 3 - State TPLZ WVop = 10V 12,4 +25C : 150 | ns VOD = 15V 4,2,4 +25C - 120 ns Propagation Delay TPZH | VOD =5V 1,2,4 +25C - 300 ns 3 State TPZL Wop = 10v 12,4 425C : 150 | ns VDD = 15V 1,2,4 +25C. - 120 ns Transition Time TTHL |[VDO=10V 1,2,3 +25C : 100 ns TYLH [Vop = 15v 1,2,3 425C - 80 ns Transition Time TTLH | VOD = 10V 1,2,3 +25C : - ns VDD = 15V 1,2,3 +25C : ns Maximum Clock Input FCL VDD = 5V 1,2,3 +25C 3 - MHz Frequency VDD = 10V 12,3 +25C 6 - MHz VDD = 15V 1,2,3 +25C 8 - MHz Minimum Data Setup TS VDD = 5V 1,2,3 +25C - 200 ns Time VDD = 10V 12,3 425C : 80 ns VDD = 15V 1,2,3 +25C. - 60 ns Minimum Data Hold Time Tw VDD = 5V 1,2,3 +25C - 120 ns Reset Pulse Width VOD = 10V 1,2,3 +25C - 50 ns VDD = 15V 1,2,3 +25C : 40 ns Minimum Clock Pulse Tw VDD = 5V 1,2,3 425C : 200 ns Width VDD = 10V 1,2,3 425C - 100 | ns VDD = 15V 1,2,3 +25C. : 80 ns Minimum Data input Set- TS VDD = 5V 1,2,3 +26C - 180 ns Up Time VOD = 10V 1,2,3 +25C : 100 ns VDD = 15V 1,2,3 4+25C - 70 ns Maximum Clock Input TRCL |VDD=5V 1,2,3,5 +25C - 15 us Rise and Fail Time TFCL VDD = 10V 1,2,3,5 425C . 5 HS VDD = 15V 1,2,3,5 +25C - 5 ys 7-1032Specifications CD4076BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE} MIN MAX | UNITS Input Capacitance CIN Any Input 1,2 +25C . 75 pF NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. CL = 50pF, AL = 1K, input TR, TF < 20ns. 5. If more than one unit is cascaded, TRCL should be made less than or equal to the sum of the transition time and the fixed propagation delay of the output of the driving stage for the estimated capacitive load. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE] MIN MAX | UNITS Supply Current 1DD VDD = 20V, VIN = VOD or GND 1,4 +25C : 25 pA N Threshold Voltage VNTH [VDD = 10V, ISS = -10pA 1,4 +25C. 2.8 0.2 v N Threshold Voltage AVTN) | VDD = 10V, ISS = -10pA 1.4 +25C - +1 v Dalta P Threshold Voltage VTP | VSS = OV, IDD = 10pA 1,4 +25C. 0.2 28 Vv P Threshold Voltage AVTP [VSS = OV, IDD = 10pA 1,4 +25C - +1 Vv Delta Functional F VDD = 18V, VIN = VOD or GND 1 +25C VOH > | VOL < v VDD = 3V, VIN = VDD or GND voo/e | voD/2 Propagation Delay Time TPHL | VOD =5V 1,2,3,4 425C : 1.35 x ns TPLH +25C Limit NOTES: 1. All voltages referenced to device GND. 3. See Table 2 for +25C limit. o 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. Read and Record 8 TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25C PARAMETER SYMBOL DELTA LIMIT Supply Current - MSI-2 IDD t 1.0pA Output Current (Sink) fOLs + 20% x Pre-Test Reading Output Current (Source) IOH5A + 20% x Pre-Test Reading TABLE 6. APPLICABLE SUBGROUPS MIL-STD-883 CONFORMANCE GROUP METHOD GROUP A SUBGROUPS READ AND RECORD Initial Test (Pra Bum-in) 100% 5004 1,7,9 IDD, IOL5, IOHSA Interim Test 1 (Post Burn-in) 100% 5004 1,7,9 IDD, IOL5, IOHSA Interim Test 2 (Post Burn-in) 100% 5004 1,7,9 IDD, IOL5, IOHSA PDA (Note 1) 100% 5004 1,7, 9, Deltas Interim Test 3 (Post Burn-in) 100% 5004 1,7,9 IDD, IOL5, IOHSA PDA (Note 1) 100% 5004 1,7, 9, Deltas Final Test 100% 5004 2, 3, BA, 8B, 10, 11 Group A Sample 5005 1, 2, 3, 7, BA, 8B, 9, 10, 11 Group B Subgroup B-5 Sample 5005 1,2, 3, 7, BA, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11 Subgroup B-6 Sample 5005 1,7,9 7-1033Specifications CD4076BMS TABLE 6. APPLICABLE SUBGROUPS MIL-STD-883 CONFORMANCE GROUP METHOD GROUP A SUBGROUPS READ AND RECORD Group D Sample 5005 1, 2, 3, 8A, 8B, 9 Subgroups 1,23 NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-889 TEST READ AND RECORD CONFORMANCE GROUPS METHOD PRE-IRRAD POST-IRRAD PRE4IARAD POST-IRRAD Group E Subgroup 2 5005 1,7,9 Table 4 1,9 Table 4 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION OPEN GROUND VDD 9V+-0.5V 50kHz 25kHz Static Burn-in 1 Note 1 3-6 1,2,7-15 16 Static Burn-in 2 Note 1 3-6 8 1,2,7,9-16 Dynamic Bum-in Note 1 - 1,2, 8-10, 15 16 3-6 7 11-14 irradiation (Note 2) 3-6 8 1,2,7,9-16 NOTE: 1. Each pin except VDD and GND will have a series rasistor of 10K + 5%, VDO = 18V + 0.5V 2. Each pin excapt VDD and GND will have a series resistor of 47K + 5%; Group E, Subgroup 2, sample siza is 4 dica/waler, 0 failures, VDD = 10V + 0.5V u@ OUTPUT DISABLE voo DATA 1 DATA Gt a INPUT DISABLE G2 DATA 2 a CLOCK DATA 3 a3 * ALL INPUTS PROTECTED BY CMOS PROTECTION NETWORK vob DATA 4 aa yss vss RESET FIGURE 1. CD4076BMS LOGIC DIAGRAM 7-1034CD4076BMS TRUTH TABLE NEXT STATE DATA INPUT DISABLE DATA OUTPUT RESET CLOCK G1 G2 D Qa 1 x x xX xX 0 0 0 x x x Q NC 0 _S/_ 1 x x Q NC 0 _/_ x 1 x Q NC 0 _f/_ 0 0 1 1 0 _f_ 0 0 0 0 0 1 x Xx x Q NC 0 . xX xX xX Qa NC When either Output Disable M or N is high, the outputs are disabled (high impedance state), however sequential operation of the flip-flops is not affected 1 = High Level X = Don't Care 0 = Low Level NC = No Change Typical Performance Characteristics (Tg) = 425C 8 _ wn OUTPUT LOW (SINK) CURRENT (IOL) (mA) gg 8 0 5 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (v) AMBIENT TEMPERATURE (Tq) = +25C GATE-TO-SOURCE VOLTAGE (VGS) = 5V 4 & OUTPUT HIGH (SOURCE) CURRENT (10H) (mA) 8 FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS 6m 6 & 8 OUTPUT LOW (SINK) CURRENT (FOL) (ma) b 5v 0 s 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (Vv) -15 10 4 AMBIENT TEMPERATURE (T,) = +25C GATE-TO-SOURCE VOLTAGE (VGS) = -5V ~~ oo o oa -15V ar aw 3 OUTPUT HIGH (SOURCE) CURRENT (10H) (mA) FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS 7-1035 2 o o aaCD4076BMS Typical Performance Characteristics (Continued) AMBIENT TEMPERATURE (Tg) = 425C SUPPLY VOLTAGE (VDD) = 5V 1sV PROPAGATION DELAY TIME (tPHL, tPLH) (ns) 0 20 40 60 80 100 120 140 LOAD CAPACITANCE (CL) (pF) FIGURE 6. TYPICAL PROPAGATION DELAY TIME vs LOAD CAPACITANCE (CLOCK TO Q) AMBIENT TEMPERATURE (Ta) = +25C LOAD CAPACITANCE (CL) = 50pF | ae y _ Lal Q L w a, MAXIMUM CLOCK FREQUENCY (fCL MAX) (MHz) 6 10 15 20 SUPPLY VOLTAGE (VDD) (V) FIGURE8. TYPICAL MAXIMUM CLOCK INPUT FREQUENCY vs SUPPLY VOLTAGE tw tw ! I l q AMBIENT TEMPERATURE (Ta) = 425C z = E 200 Z = SUPPLY VOLTAGE (VDD) = 5V w 150 = e Lo 5 100 a - 10V 2 # nn 5Vv ac 50 = 0 0 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF) FIGURE 7. TYPICAL TRANSITION TIME vs LOAD CAPACITANCE 105 z = sot? SUPPLY VOLTAGE (VDD) ae 3 ys? ce 10 wo = 4 3 2 = 10? = g 3 Ss 0 zs CLs 2 2 CL = 15pF mins 2468 2468 2468 2468 2468 2468 101 1 10 10? 103 194 INPUT FREQUENCY (f (kHz) FIGURE 9. TYPICAL DYNAMIC POWER DISSIPATION vs FREQUENCY DATA INPUT DIABLE RESET tTHL +| ~* ox a So% OUTPUT 10% PHL | [~<- tPLH tPHL FIGURE 10. FUNCTIONAL WAVEFORM 7-1036CD4076BMS _ vod 50% x Xk. sox TEST VOLTAGE OUTPUT DISABLE vss CHARACTER ATD ATQ me y ot ~ vo (PHZ a) vss @ourTPuT 10% Ko VoL tPLZ vss voD aourpuT ox vou tPZL vss VDD XN 10% vss 1PZH vpD vss ae eee wPHZ (PzH FIGURE 11. FUNCTIONAL WAVEFORM Chip Dimensions and Pad Layout 69-77 (1.783 ~ 1.986) 82-90 (2.083 2.286) LOGIC Dimensions in parentheses are in mifimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in ms (10 inch) METALLIZATION: Thickness: 11kA - 14kA, AL. PASSIVATION: 10.4kA- 15.6kA, Silane BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches 7-1037