APDS-9120 Integrated Optical Proximity Sensors Data Sheet Description Features Avago's APDS-9120 is an integrated optical proximity sensor that combines built-in signal conditioning and space-saving packaging technology. x Small form factor with conditioning IC, emitter and detector integrated into one single package This integrated sensor provides ease of use, as it eliminates design efforts required in implementing external LED drivers, signal filtering and amplification, sunlight and ambient light immunity and LED stuck high protection circuit. x Low power consumption APDS-9120 is designed to be a robust proximity sensor. It has artificial light immunity and operates in sunlight exposure. Both analog and/or digital output options are available. x Shutdown current 1PA max To maximize power savings and battery life in applications such as portable or battery-operated devices, APDS-9120 has a shutdown mode feature. With an external limiting resistor, the LED current of the optical proximity sensors can be configured to various levels. The pulse width, burst rate, duty cycle and frequency can be controlled to minimize power consumption. These features make it ideal for low power mobile and handheld devices. x Artificial light immunity Application Support Information x PDA and mobile phones The Application Engineering Group is available to assist you with the application design associated with APDS9120 module. You can contact them through your local sales representatives for additional details. x Portable and Handheld devices - H1.1mm x W4.4mm x L4.4mm - LED pulse width control - Low shut down current - External LED drive-current control x Supply voltage : 2.4 V to 3.6 V x Typical detection distance 30mm based on Kodak 18% grey card x Operational in sunlight conditions x Analog & Digital output available - Built in hysteresis comparator for digital output x LED stuck Hi protection Applications x Personal Computers/Notebooks x Contactless Switches Ordering Information Part Number Package Type Shipping Option APDS-9120-020 Tape & Reel 2500 Absolute Maximum Ratings (Ta=25C) Parameter Symbol Min. Max. Units Supply Voltage Peak LED Current Reflow Soldering Temperature Input Logic Voltage VCC ILEDpk 0 0 VI 0 4.0 500 260 4.0 V mA C V Parameter Symbol Min. Max. Units Operating Temperature Storage Temperature Supply Voltage TA TS VCC -40 -40 2.4 85 100 3.6 C C V Conditions Pulsed at 12.5% Duty-cycle Recommended Operating Conditions Conditions Electrical & Optical Specifications (Ta=25C) Parameters Input Symbol Min. Typ. Max. Units Conditions Logic High Voltage, LEDON Logic High Voltage, ENB VIH VIH 1.6 1.4 1.5 - - - VCC VCC VCC V V V For VCC = 2.4V For 2.4 VTH DOUT = High when VPFILT < VTH 10 GND Ground Ground (10) GND (1) PFILT R3 (9) DOUT Pin 3 R1 Comparator 5 (6) LEDK Sunlight Cancellation (8) NC8 C3 Typical Characteristics Detector Spectral response LED spectal response 1.00 Rel response Relative response 0.80 0.60 0.40 0.20 0.00 700 800 900 1000 Wavelength in nm 1100 1200 Figure 1. LED emitting spectrum 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 600 700 1.02 1 1.00 0.98 Avg Rel Icc Rel Icc 1.02 0.98 0.96 0.94 2.6 0.96 0.94 0.92 Rel Icc Vs Vcc 2.4 2.8 1100 Avg Rel Icc Vs Temp at Vcc=3V Rel Icc Vs Vcc 0.90 1000 Figure 2. PIN spectral sensitivity 1.04 0.92 800 900 Wavelength in nm 3 Vcc 3.2 3.4 0.9 3.6 Figure 3. Relative supply current over supply voltage Avg Rel Icc Vs Temp at Vcc=3V -40 -20 0 20 40 Temp in Degress 60 80 100 Figure 4. Average relative supply current over temperature Rel PFILT Vs Vcc Avg ISD Vs Temp 1.2 400.0E-9 350.0E-9 1 0.8 250.0E-9 REl PFLT Avg ISD 300.0E-9 200.0E-9 150.0E-9 0.6 0.4 100.0E-9 000.0E+0 20 40 60 Temp in Degrees Figure 5. Average shutdown current over temperature 4 0.2 Avg ISD Vs Temp 50.0E-9 -40 -20 0 80 100 Rel PFILT Vs Vcc 0 2.4 2.6 2.8 3 3.2 Vcc Figure 6. Relative output PFILT over supply voltage 3.4 3.6 Rel ILED Vs Vcc Avg Rel PFILT Vs Temp at 3V 1.6 1.2 1.4 1 Rel ILED Avg Rel PFLT 1.2 0.8 0.6 0.4 1 0.8 0.6 0.4 0.2 0 Avg Rel PFILT Vs Temp at 3V -40 -20 0 20 40 Temp in Degrees Rel ILED Vs Vcc 0.2 60 80 0 100 Figure 7. Average relative output PFILT over temperature 2.4 2.6 2.8 1 1 0.8 Rel response Rel PFLT 0.8 0.6 0.4 10 20 30 40 Distance in mm Figure 9. Relative output PFILT over detection distance 5 3.6 0.6 0.4 0.2 Rel PFILT Vs Distance 0 3.4 Angular Response Rel PFILT Vs Distance 0 3.2 Figure 8. Relative ILED current over temperature 1.2 0.2 3 Vcc Angular Response 50 60 0 -90 -70 -50 Figure 10. Angular response -30 -10 10 30 Angle in Degrees 50 70 90 APDS-9120 Package Dimensions SIDE VIEW TOP VIEW 1.17 1.10 Detector 0.05 0.18 9 8 2 7 3 6 1.20 2.11 1.20 1 1 1.02 10 4 Laser Groove 5 0.20 0.05 LED 1.2 Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 0.8 0.05 : : : : : PFILT NC2 NC3 Vcc LEDON Pin 6 : Pin 7 : Pin 8 : Pin 9 : Pin 10 : LEDK ENBAR NC8 DOUT GND BOTTOM VIEW 4.4 0.8 1.20 1 0.70 MARKING DETAILS 1.20 4.4 1.20 1.50 0.95 1.05 0.48 0.90 YWW 0.75 0.70 1.06 Font type Font size Marking type Format R0.15 0.30 0.05 Notes: 1. All dimensions are in millimeters. Dimension tolerance is 0.1 mm unless otherwise stated. 2. This package contains no lead. 3. Do NOT connect the bottom exposed pads. 4. No PCB circuitry under the device. 6 : : : : Stroke Roman 0.3mm Laser YWW Y = Year (last digit) WW = Week number (two digits) Tape and Reel Dimensions 8.00 0.10 2.00 0.05 4.00 0.10 O1.50 0.10 1.75 0.10 5.50 0.05 12.0 0.30 -0.10 O1.00 0.25 9 0.138 0.10 9 MAX 0.28 0.02 4.68 0.10 Dimensions in mm Reel Drawings 7 4.680.10 SMT Assembly Application Note 1.1 Solder Pad, Mask and Metal Stencil Aperture Metal Stencil For Solder Paste Printing Stencil Aperture Land Pattern Solder Mask PCBA Figure 11. Stencil and PCBA 1.2 Recommended Land Pattern 4.7 4.4 Unit: mm Tolerance: 0.1mm 0.4 1.2 1.15 1.20 0.8 Notes: 1. Do NOT connect the NC (no connect) pins. 2. Manual soldering on APDS-9120 is not recommended. Please refer to Recommended Reflow Profile for soldering. Figure 12. Recommended Land Pattern 8 4.7 R 0.2 4.4 1.2 0.9 1.0 Land Pattern 1.3 Recommended Metal Solder Stencil Aperture It is recommended that a 0.11 mm thick stencil be used for solder paste printing. Aperture opening for shield pad is 0.8mm x 0.4mm (as per land pattern). This is to ensure adequate printed solder paste volume and no shorting. Aperture Opening 0.11 4.7 Unit: mm 4.7 Figure 13. Solder Stencil Aperture 1.4 Adjacent Land Keepout and Solder Mask Areas Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. The minimum solder resist strip width required to avoid solder bridging adjacent pads is 0.2 mm. Note: Wet/Liquid Photo-Imageable solder resist/mask is recommended. Min. 0.2 mm Solder Mask Area 5.7 mm 5.7 mm Figure 14. Adjacent Land Keepout and Solder Mask Areas 9 Recommended Pickup Nozzle TOP VIEW SIDE VIEW BOTTOM VIEW Dimension in mm 10 APDS-9120 Typical Timing Waveforms VCC ENB >50ns Burst Pulses LEDON >20Ps VTH PFLIT DOUT Note: Pulses at LEDON can only be activated at least 20us after ENB turn from high to low. 11 Typical Application Circuit VI0 R2 GND DOUT 10 PFILT 9 8 1 R3 C3 MCU NC2 2 NC3 3 APDS-9120 5 VCC C1 ENBAR 7 6 4 Vcc C2 Note: 1. Do NOT connect the NC (no connect) pins 12 NC8 LEDK R1 LEDON Recommended Operating Condition (a) Recommended burst pulse to drive LEDON (pin5) : 50 s Pulsing waveform Time with pulsing = Period x Number of pulses = 5 ms R1 10 ohm Iled (typ) 120mA Number of Burst Pulse 50 Period of Burst Pulse 100Ps Duty Cycle of Burst Pulse 50% Interval Between Burst Pulse 1 sec Interval time between burst pulses = 1s (b) Recommended components used: Component Recommended Values R1 10 ohm R2 10k ohm R3 1M ohm C1 100nF, Ceramic C2 6.8PF, Tantalum C3 3.3nF, Ceramic Note: 1. R3 and C3 are integrated circuit that can be adjusted to meet desired detectable distance 2. Detectable distance is the distance when the object is first detected to trigger a "LOW" at DOUT (pin9). Optical Window Design Reference Please refer to AN 5464: APDS-9120-020 Integrated Optical Proximity Sensor Window Guide Design. http://www.avagotech.com/docs/AV02-2401EN/ 13 Moisture Proof Packaging All APDS-9120 options are shipped in moisture proof package. Once opened, moisture absorption begins. This part is compliant to JEDEC MSL 3. Units in A Sealed Mositure-Proof Package Package Is Opened (Unsealed) Environment less than 30 deg C, and less than 60% RH ? Yes No Baking Is Necessary Package Is Opened less than 168 hours ? Yes No Perform Recommended Baking Conditions Baking Conditions: No Recommended Storage Conditions: Package Temperature Time Storage Temperature 100C to 300C In Reel 60 C 48 hours Relative Humidity below 60% RH In Bulk 100 C 4 hours Time from unsealing to soldering: If the parts are not stored in dry conditions, they must be baked before reflow to prevent damage to the parts. Baking should only be done once. 14 After removal from the bag, the parts should be soldered within 168 hours if stored at the recommended storage conditions. If times longer than 168 hours are needed, the parts must be stored in a dry box. Recommended Reflow Profile MAX 260C T - TEMPERATURE (C) 255 R3 230 217 200 180 150 120 R2 R4 60 sec to 90 sec Above 217 C R5 R1 80 25 0 50 P1 HEAT UP 100 150 200 P3 SOLDER REFLOW P2 SOLDER PASTE DRY 250 P4 COOL DOWN 300 t-TIME (SECONDS) Process Zone Symbol 'T Maximum 'T/'time or Duration Heat Up P1, R1 25C to 150C 3C/s Solder Paste Dry P2, R2 150C to 200C 100s to 180s Solder Reflow P3, R3 P3, R4 200C to 260C 260C to 200C 3C/s -6C/s Cool Down P4, R5 200C to 25C -6C/s Time maintained above liquidus point, 217C > 217C 60s to 120s Peak Temperature 260C - Time within 5C of actual Peak Temperature - 20s to 40s Time 25C to Peak Temperature 25C to 260C 8mins The reflow profile is a straight-line representation of a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different 'T/'time temperature change rates or duration. The 'T/'time rates or duration are detailed in the above table. The temperatures are measured at the component to printed circuit board connections. In process zone P1, the PC board and component pins are heated to a temperature of 150C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 3C per second to allow for even heating of both the PC board and component pins. Process zone P2 should be of sufficient time duration (100 to 180 seconds) to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder. Process zone P3 is the solder reflow zone. In zone P3, the tem- For product information and a complete list of distributors, please go to our web site: perature is quickly raised above the liquidus point of solder to 260C (500F) for optimum results. The dwell time above the liquidus point of solder should be between 60 and 90 seconds. This is to assure proper coalescing of the solder paste into liquid solder and the formation of good solder connections. Beyond the recommended dwell time the intermetallic growth within the solder connections becomes excessive, resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25C (77F) should not exceed 6C per second maximum. This limitation is necessary to allow the PC board and component pins to change dimensions evenly, putting minimal stresses on the component. It is recommended to perform reflow soldering no more than twice. www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright (c) 2005-2010 Avago Technologies. All rights reserved. AV02-1937EN - March 24, 2010