APDS-9120
Integrated Optical Proximity Sensors
Data Sheet
Description
Avagos APDS-9120 is an integrated optical proximity
sensor that combines built-in signal conditioning and
space-saving packaging technology.
This integrated sensor provides ease of use, as it elimi-
nates design efforts required in implementing external
LED drivers, signal filtering and amplification, sunlight
and ambient light immunity and LED stuck high protec-
tion circuit.
APDS-9120 is designed to be a robust proximity sensor.
It has artificial light immunity and operates in sunlight
exposure. Both analog and/or digital output options are
available.
To maximize power savings and battery life in applications
such as portable or battery-operated devices, APDS-9120
has a shutdown mode feature. With an external limiting
resistor, the LED current of the optical proximity sensors
can be configured to various levels. The pulse width,
burst rate, duty cycle and frequency can be controlled
to minimize power consumption. These features make it
ideal for low power mobile and handheld devices.
Application Support Information
The Application Engineering Group is available to assist
you with the application design associated with APDS-
9120 module. You can contact them through your local
sales representatives for additional details.
Features
x Small form factor with conditioning IC, emitter and
detector integrated into one single package
H1.1mm x W4.4mm x L4.4mm
x Low power consumption
LED pulse width control
Low shut down current
External LED drive-current control
x Shutdown current 1PA max
x Supply voltage : 2.4 V to 3.6 V
x Typical detection distance 30mm based on Kodak 18%
grey card
x Artificial light immunity
x Operational in sunlight conditions
x Analog & Digital output available
Built in hysteresis comparator for digital output
x LED stuck Hi protection
Applications
x PDA and mobile phones
x Portable and Handheld devices
x Personal Computers/Notebooks
x Contactless Switches
Ordering Information
Part Number Package Type Shipping Option
APDS-9120-020 Tape & Reel 2500
2
Absolute Maximum Ratings (Ta=25°C)
Parameter Symbol Min. Max. Units Conditions
Supply Voltage VCC 0 4.0 V
Peak LED Current ILEDpk 0 500 mA Pulsed at 12.5% Duty-cycle
Reflow Soldering Temperature 260 °C
Input Logic Voltage VI 0 4.0 V
Recommended Operating Conditions
Parameter Symbol Min. Max. Units Conditions
Operating Temperature TA-40 85 °C
Storage Temperature TS-40 100 °C
Supply Voltage VCC 2.4 3.6 V
Electrical & Optical Specifications (Ta=25°C)
Parameters Symbol Min. Typ. Max. Units Conditions
Input
Logic High Voltage, LEDON VIH 1.6 VCC V
Logic High Voltage, ENB VIH 1.4 VCC V For VCC = 2.4V
1.5 VCC V For 2.4 <VCC d 3V
1.7 VCC V For 3 < VCC d 3.6V
Logic Low Voltage, LEDON VIL 0 0.3 V
Logic Low Voltage, ENB VIL 0 0.3 V
Logic High Input Current, LEDON IIH 0.1 1 PAVIVIH
Logic High Input Current, ENB IIH 0.1 1 PAVIVIH
Logic Low Input Current, LEDON IIL 0.1 1 PAVIVIL
Logic Low Input Current, ENB IIL 0.1 1 PAVIVIL
Shutdown Current ISD 0.3 1 PAVCC = 3V, ENB = 3V
Idle Current ICC 500 650 PAVCC = 3V, ENB = 0V
Output
Analog Output VPFILT 1.25 1.9 2.55 V VCC = 3V, ENB = 0V, LEDON = 10
kHz, 50% DC, Continuous pulses;
R3 = 1Mohm, C3 = 3.3nF;
Kodak 18% grey card at detectable
distance = 10mm from the APDS-
9120
Digital Output VOL 0 0.3 V IDOUT(Low) = 2mA, VCC = 3V
Rise Time(DOUT) TR–1–PsV
CC = 3V, R2 = 10k:,
Frequency = 10kHz
Fall Time(DOUT) TF–1–PsV
CC = 3V, R2 = 10k:,
Frequency = 10kHz
Transmitter
Max ILED Pulse Width Max-PW 120 PsVCC = 3V, ENB = 0V
ILED Peak Pulse Current ILEDpk 85 120 155 mA VCC = 3V, R1 = 10:
Hysterisis Comparator
Hysterisis VHYS 40 mV VCC = 3V
Threshold Voltage VTH 655 mV VCC = 3V
Ambient light tolerance 100k -Iux Sun light
10K -Incandescent
5K -Fluorescent
10K -Halogen
3
APDS-9120 Internal Block Diagram
V-I
Converter
C3
LED Driver with
Stuck High
Protection
Sunlight
Cancellation
TIA
(4) Vcc(7) ENBAR
(5) LEDON
(10) GND
(9) DOUT
(6) LEDK
(1) PFILT
R1
R2
VIO
LED
PIN
R3
(3) NC3
(8) NC8
(2) NC2
Comparator
APDS-9120 I/O Pins Configuration Table
Pin Symbol Type Description
1 PFILT Analog
O/P
Analog Output
Connect to integration circuit
(R3 & C3)
2 NC2 No Connection
3 NC3 No Connection
4V
CC Supply Voltage Supply
5 LEDON Digital
I/P
LED Driver Input
LEDA will turn off when LEDON is
stuck in high state for more than
Max-PW
6 LEDK LED
Cathode
Connect to a current limiting resistor
7 ENBAR Digital
I/P
Power Down Enable
ENB = 0 Normal mode operation
ENB = 1 Shut down mode
8 NC8 No Connection
9 DOUT Digital
O/P
Digital Output
An open drain output that requires
a pull-up resistor of recommended
value 10k:
DOUT = Low when VPFILT > VTH
DOUT = High when VPFILT < VTH
10 GND Ground Ground
1
2
3
45
6
7
8
9
10
4
LED spectal response
0.00
0.20
0.40
0.60
0.80
1.00
700 800 900 1000 1100 1200
Wavelength in nm
Relative response
Rel Icc Vs Vcc
0.90
0.92
0.94
0.96
0.98
1.00
1.02
1.04
2.4 2.6 2.8 3 3.2 3.4 3.6
Vcc
Rel Icc
Rel Icc Vs Vcc
Avg ISD Vs Temp
000.0E+0
50.0E-9
100.0E-9
150.0E-9
200.0E-9
250.0E-9
300.0E-9
350.0E-9
400.0E-9
-40 -20 0 20 40 60 80 100
Tem
p
in De
g
rees
Avg ISD
Detector Spectral response
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
600 700 800 900 1000 1100
Wavelength in nm
Rel response
Avg Rel Icc Vs Temp at Vcc=3V
0.9
0.92
0.94
0.96
0.98
1
1.02
-40 -20 0 20 40 60 80 100
Temp in Degress
Avg Rel Icc
Rel PFILT Vs Vcc
0
0.2
0.4
0.6
0.8
1
1.2
2.4 2.6 2.8 3 3.2 3.4 3.6
Vcc
REl PFLT
Avg Rel Icc Vs Temp at Vcc=3V
Avg ISD Vs Temp Rel PFILT Vs Vcc
Typical Characteristics
Figure 1. LED emitting spectrum Figure 2. PIN spectral sensitivity
Figure 3. Relative supply current over supply voltage Figure 4. Average relative supply current over temperature
Figure 5. Average shutdown current over temperature Figure 6. Relative output PFILT over supply voltage
5
Figure 7. Average relative output PFILT over temperature Figure 8. Relative ILED current over temperature
Figure 9. Relative output PFILT over detection distance Figure 10. Angular response
Angular Response
Avg Rel PFILT Vs Temp at 3V
0
0.2
0.4
0.6
0.8
1
1.2
-40 -20 0 20 40 60 80 100
Temp in Degrees
Avg Rel PFLT
Rel ILED Vs Vcc
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
2.4 2.6 2.8 3 3.2 3.4 3.6
Vcc
Rel ILED
Rel PFILT Vs Distance
0
0.2
0.4
0.6
0.8
1
1.2
0102030405060
Distance in mm
Rel PFLT
Angular Response
0
0.2
0.4
0.6
0.8
1
-90 -70 -50 -30 -10 10 30 50 70 90
An
g
le in De
g
rees
Rel response
Avg Rel PFILT Vs Temp at 3V Rel ILED Vs Vcc
Rel PFILT Vs Distance
6
2.11
0.18
1.17
1.02
1
2
3
45
6
7
8
910
LED
Detector
0.20
±0.05
0.05
1.10
1
1.201.20
4.4
4.4
0.30
±0.05
0.90
0.48
0.95
0.70
1.50 1.05
0.70 1.060.75
1.20
0.8
1
1.201.20
R0.15
0.05
1.2 0.8
YWW
Laser Groove
APDS-9120 Package Dimensions
TOP VIEW SIDE VIEW
Pin 1 : PFILT
Pin 2 : NC2
Pin 3 : NC3
Pin 4 : Vcc
Pin 5 : LEDON
Pin 6 : LEDK
Pin 7 : ENBAR
Pin 8 : NC8
Pin 9 : DOUT
Pin 10 : GND
BOTTOM VIEW
Notes:
1. All dimensions are in millimeters. Dimension tolerance is ±0.1 mm unless otherwise stated.
2. This package contains no lead.
3. Do NOT connect the bottom exposed pads.
4. No PCB circuitry under the device.
MARKING DETAILS
Font type : Stroke Roman
Font size : 0.3mm
Marking type : Laser
Format : YWW
Y = Year (last digit)
WW = Week number (two digits)
7
Tape and Reel Dimensions
9° MAX
4.68 ± 0.10 4.68±0.10
0.28 ± 0.02
0.138 ± 0.10
Dimensions in mm
Ø1.00 ± 0.25
5.50 ± 0.05
1.75 ± 0.10
2.00 ± 0.05 4.00 ± 0.10
8.00 ± 0.10 Ø1.50 ± 0.10
12.0 ± 0.30
–0.10
Reel Drawings
8
SMT Assembly Application Note
1.1 Solder Pad, Mask and Metal Stencil Aperture
1.2 Recommended Land Pattern
Figure 11. Stencil and PCBA
Figure 12. Recommended Land Pattern
Metal Stencil For Solder
Paste Printing
Stencil
Aperture
Solder
Mask
Land
Pattern
PCBA
Notes:
1. Do NOT connect the NC (no connect) pins.
2. Manual soldering on APDS-9120 is not recommended.
Please refer to Recommended Reflow Profile for soldering.
4.7
4.4
Unit: mm
Tolerance: ±0.1mm
Land Pattern
4.7
4.4
1.2
1.2
1.0
1.15
0.4
1.20 0.8
0.9
R 0.2
9
1.3 Recommended Metal Solder Stencil Aperture
It is recommended that a 0.11 mm thick stencil be used for solder paste printing. Aperture opening for shield pad is
0.8mm x 0.4mm (as per land pattern). This is to ensure adequate printed solder paste volume and no shorting.
Figure 13. Solder Stencil Aperture
Figure 14. Adjacent Land Keepout and Solder Mask Areas
1.4 Adjacent Land Keepout and Solder Mask Areas
Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no
other SMD components within this area.
The minimum solder resist strip width required to avoid solder bridging adjacent pads is 0.2 mm.
Note: Wet/Liquid Photo-Imageable solder resist/mask is recommended.
0.11
4.7
4.7
Unit: mm
Aperture Opening
5.7 mm
5.7 mm
Solder Mask Area
Min. 0.2 mm
10
Recommended Pickup Nozzle
Dimension in mm
TOP VIEW
SIDE VIEW
BOTTOM VIEW
11
APDS-9120 Typical Timing Waveforms
Note:
Pulses at LEDON can only be activated at least 20us after ENB turn from high to low.
Burst Pulses
>50ns
VCC
ENB
LEDON
PFLIT
DOUT
>20Ps
VTH
12
Typical Application Circuit
R3
GND DOUT
ENBAR
LEDON
VCC
NC3
PFILT
NC2
NC8
LEDK
Vcc
VI0
C1C2
C3
R1
R2
5
4
2
3
1
109
8
7
6
APDS-9120
MCU
Note:
1. Do NOT connect the NC (no connect) pins
13
Recommended Operating Condition
(a) Recommended burst pulse to drive LEDON (pin5) :
Pulsing
waveform
50μs
Time with pulsing = Period x
Number of pulses = 5 ms
Interval time between
burst pulses = 1s
R1 10 ohm
Iled (typ) 120mA
Number of Burst Pulse 50
Period of Burst Pulse 100Ps
Duty Cycle of Burst Pulse 50%
Interval Between Burst Pulse 1 sec
(b) Recommended components used:
Component Recommended Values
R1 10 ohm
R2 10k ohm
R3 1M ohm
C1 100nF, Ceramic
C2 6.8PF, Tantalum
C3 3.3nF, Ceramic
Note:
1. R3 and C3 are integrated circuit that can be
adjusted to meet desired detectable distance
2. Detectable distance is the distance when the
object is first detected to trigger a “LOW at
DOUT (pin9).
Optical Window Design Reference
Please refer to AN 5464: APDS-9120-020 Integrated Optical Proximity Sensor Window Guide Design.
http://www.avagotech.com/docs/AV02-2401EN/
14
Moisture Proof Packaging
All APDS-9120 options are shipped in moisture proof
package. Once opened, moisture absorption begins. This
part is compliant to JEDEC MSL 3.
Units in A Sealed
Mositure-Proof
Package
Package Is
Opened (Unsealed)
Environment
less than 30 deg C, and
less than 60% RH ?
Package Is
Opened less
than 168 hours ?
Perform Recommended
Baking Conditions
No Baking
Is Necessary
No
Yes
No
Yes
Baking Conditions:
Package Temperature Time
In Reel 60C 48 hours
In Bulk 100C 4 hours
If the parts are not stored in dry conditions, they must be
baked before reflow to prevent damage to the parts.
Baking should only be done once.
Recommended Storage Conditions:
Storage Temperature 100C to 300C
Relative Humidity below 60% RH
Time from unsealing to soldering:
After removal from the bag, the parts should be soldered
within 168 hours if stored at the recommended storage
conditions. If times longer than 168 hours are needed, the
parts must be stored in a dry box.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved.
AV02-1937EN - March 24, 2010
Process Zone Symbol 'T
Maximum 'T/'time
or Duration
Heat Up P1, R1 25°C to 150°C 3°C/s
Solder Paste Dry P2, R2 150°C to 200°C 100s to 180s
Solder Reflow P3, R3
P3, R4
200°C to 260°C
260°C to 200°C
3°C/s
-6°C/s
Cool Down P4, R5 200°C to 25°C -6°C/s
Time maintained above liquidus point, 217°C > 217°C 60s to 120s
Peak Temperature 260°C
Time within 5°C of actual Peak Temperature 20s to 40s
Time 25°C to Peak Temperature 25°C to 260°C 8mins
Recommended Reflow Profile
50 100 300150 200 250
t-TIME
(SECONDS)
25
80
120
150
180
200
230
255
0
T - TEMPERATURE (°C)
R1
R2
R3 R4
R5
217
MAX 260C
60 sec to 90 sec
Above 217 C
P1
HEAT
UP
P2
SOLDER PASTE DRY
P3
SOLDER
REFLOW
P4
COOL DOWN
The reflow profile is a straight-line representation of
a nominal temperature profile for a convective reflow
solder process. The temperature profile is divided into
four process zones, each with different 'T/'time tem-
perature change rates or duration. The 'T/'time rates
or duration are detailed in the above table. The tempera-
tures are measured at the component to printed circuit
board connections.
In process zone P1, the PC board and component pins are
heated to a temperature of 150°C to activate the flux in
the solder paste. The temperature ramp up rate, R1, is
limited to 3°C per second to allow for even heating of
both the PC board and component pins.
Process zone P2 should be of sufficient time duration (100 to
180 seconds) to dry the solder paste. The temperature is
raised to a level just below the liquidus point of the solder.
Process zone P3 is the solder reflow zone. In zone P3, the tem-
perature is quickly raised above the liquidus point of solder
to 260°C (500°F) for optimum results. The dwell time above
the liquidus point of solder should be between 60 and 90
seconds. This is to assure proper coalescing of the solder
paste into liquid solder and the formation of good solder
connections. Beyond the recommended dwell time the in-
termetallic growth within the solder connections becomes
excessive, resulting in the formation of weak and unreli-
able connections. The temperature is then rapidly reduced
to a point below the solidus temperature of the solder to
allow the solder within the connections to freeze solid.
Process zone P4 is the cool down after solder freeze. The cool
down rate, R5, from the liquidus point of the solder to
25°C (77°F) should not exceed 6°C per second maximum.
This limitation is necessary to allow the PC board and
component pins to change dimensions evenly, putting
minimal stresses on the component.
It is recommended to perform reflow soldering no more
than twice.