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3
MX25L25735E
P/N: PM1586 REV. 1.0, JUL. 01, 2010
(24) Read Security Register (RDSCUR) .......................................................................................................... 29
Security Register Denition .............................................................................................................................. 30
(25) Write Security Register (WRSCUR) .......................................................................................................... 30
(26) Write Protection Selection (WPSEL) ......................................................................................................... 31
BP and SRWD if WPSEL=0 ............................................................................................................................. 31
The individual block lock mode is effective after setting WPSEL=1 ................................................................. 32
WPSEL Flow .................................................................................................................................................... 33
(27) Single Block Lock/Unlock Protection (SBLK/SBULK) ............................................................................... 34
Block Lock Flow ............................................................................................................................................... 34
Block Unlock Flow ............................................................................................................................................ 35
(28) Read Block Lock Status (RDBLOCK) ....................................................................................................... 36
(29) Gang Block Lock/Unlock (GBLK/GBULK)................................................................................................. 36
(30) Clear SR Fail Flags (CLSR) ...................................................................................................................... 36
(31) Enable SO to Output RY/BY# (ESRY) ...................................................................................................... 36
(32) Disable SO to Output RY/BY# (DSRY) ..................................................................................................... 36
POWER-ON STATE ................................................................................................................................................... 37
ELECTRICAL SPECIFICATIONS .............................................................................................................................. 38
ABSOLUTE MAXIMUM RATINGS ................................................................................................................... 38
Figure 3. Maximum Negative Overshoot Waveform ........................................................................................ 38
CAPACITANCE TA = 25°C, f = 1.0 MHz ........................................................................................................... 38
Figure 4. Maximum Positive Overshoot Waveform .......................................................................................... 38
Figure 5. OUTPUT LOADING ......................................................................................................................... 39
Table 7. DC CHARACTERISTICS (Temperature = -40°C to 85°C for Industrial grade, VCC = 2.7V ~ 3.6V) . 40
Table 8. AC CHARACTERISTICS (Temperature = -40°C to 85°C for Industrial grade, VCC = 2.7V ~ 3.6V) 41
Timing Analysis ........................................................................................................................................................ 43
Figure 6. Serial Input Timing ............................................................................................................................ 43
Figure 7. Output Timing .................................................................................................................................... 43
Figure 8. Hold Timing ....................................................................................................................................... 44
Figure 9. WP# Setup Timing and Hold Timing during WRSR when SRWD=1 ................................................. 44
Figure 10. Write Enable (WREN) Sequence (Command 06) ........................................................................... 45
Figure 11. Write Disable (WRDI) Sequence (Command 04) ............................................................................ 45
Figure 12. Read Identication (RDID) Sequence (Command 9F) .................................................................... 45
Figure 13. Read Status Register (RDSR) Sequence (Command 05) .............................................................. 46
Figure 14. Write Status Register (WRSR) Sequence (Command 01) ............................................................. 46
Figure 15. Read Data Bytes (READ) Sequence (Command 03) .................................................................... 47
Figure 16. Read at Higher Speed (FAST_READ) Sequence (Command 0B) ................................................ 47
Figure 17. 2 x I/O Read Mode Sequence (Command BB) ............................................................................... 48
Figure 18. Dual Read Mode Sequence (Command 3B)................................................................................... 48
Figure 19. 4 x I/O Read Mode Sequence (Command EB) ............................................................................... 49
Figure 20. Quad Read Mode Sequence (Command 6B) ................................................................................. 49
Figure 21. 4 x I/O Read Enhance Performance Mode Sequence (Command EB) .......................................... 50
Figure 22. Sector Erase (SE) Sequence (Command 20) ................................................................................ 50
Figure 23. Block Erase (BE/EB32K) Sequence (Command D8/52) ................................................................ 51
Figure 24. Chip Erase (CE) Sequence (Command 60 or C7) ......................................................................... 51
Figure 25. Page Program (PP) Sequence (Command 02).............................................................................. 51
Figure 26. 4 x I/O Page Program (4PP) Sequence (Command 38) ................................................................ 52