HIGH HOLDING CURRENT 100 A 10/1000 OVERVOLTAGE PROTECTORS
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4350H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
Copyright © 1999 Texas Instruments Incorporated
1
PRODUCTION DATA information is current as of
publication date. Products conform to specifications
per the terms of Texas Instruments standard warranty.
Production processing does not necessary include
testing of all parameters.
NOVEMBER 1997 - REVISED JULY 1999
Designed and manufactured by Power
Innovations, Bedford, UK. under private
label for Texas Instruments.
8 kV 10/700, 200 A 5/310 ITU-T K20/21 rating
HighHoldingCurrent.........225mAmin.
Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
Rated for International Surge Wave Shapes
LowDifferentialCapacitance...39pFmax.
DEVICE
VDRM
MINIMUM
V
V(BO)
MAXIMUM
V
‘4165 135 165
‘4180 145 180
‘4200 155 200
‘4265 200 265
‘4300 230 300
‘4350 275 350
WAVE SHAPE STANDARD ITSP
A
2/10 µs GR-1089-CORE 500
8/20 µs IEC 61000-4-5 300
10/160 µs FCC Part 68 250
10/700 µs ITU-T K20/21 200
10/560 µs FCC Part 68 160
10/1000 µs GR-1089-CORE 100
description
These devices are designed to limit overvoltages on the telephone line. Overvoltages are normally caused by
a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line. A
single device provides 2-point protection and is typically used for the protection of 2-wire telecommunication
equipment (e.g. between the Ring and Tip wires for telephones and modems). Combinations of devices can
be used for multi-point protection (e.g. 3-point protection between Ring, Tip and Ground).
The protector consists of a symmetrical voltage-triggered bidirectional thyristor. Overvoltages are initially
clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to
crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the
overvoltage to be safely diverted through the device. The high crowbar holding current prevents d.c. latchup
as the diverted current subsides.
This TISP4xxxH4BJ range consists of six voltage variants to meet various maximum system voltage levels
(135 V to 275 V). They are guaranteed to voltage limit and withstand the listed international lightning surges
in both polarities. These high (H) current protection devices are in a plastic package SMBJ (JEDEC DO-
214AA with J-bend leads) and supplied in embossed carrier reel pack. For alternative voltage and holding
current values, consult the factory. For lower rated impulse currents in the SMB package, the 50 A 10/1000
TISP4xxxM3BJ series is available.
device symbol
T
RSD4XAA
Terminals T and R correspond to the
alternative line designators of A and B
12
T(A)R(B)
SMBJ PACKAGE
(TOP VIEW)
MDXXBG
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4350H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
2
NOVEMBER 1997 - REVISED JULY 1999
absolute maximum ratings, TA= 25°C (unless otherwise noted)
RATING SYMBOL VALUE UNIT
Repetitive peak off-state voltage, (see Note 1)
‘4165
‘4180
‘4200
‘4265
‘4300
‘4350
VDRM
±135
±145
±155
±200
±230
±275
V
Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4)
ITSP A
2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape) 500
8/20 µs (IEC 61000-4-5, 1.2/50 µs voltage, 8/20 current combination wave generator) 300
10/160 µs (FCC Part 68, 10/160 µs voltage wave shape) 250
5/200 µs (VDE 0433, 10/700 µs voltage wave shape) 220
0.2/310 µs (I3124, 0.5/700 µs voltage wave shape) 200
5/310 µs (ITU-T K20/21, 10/700 µs voltage wave shape) 200
5/310 µs (FTZ R12, 10/700 µs voltage wave shape) 200
10/560 µs (FCC Part 68, 10/560 µs voltage wave shape) 160
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape) 100
Non-repetitive peak on-state current (see Notes 2, 3 and 5)
ITSM
55
60
2.1 A
20 ms (50 Hz) full sine wave
16.7 ms (60 Hz) full sine wave
1000 s 50 Hz/60 Hz a.c.
Initial rate of rise of on-state current, Exponential current ramp, Maximum ramp value < 200 A diT/dt 400 As
Junction temperature TJ-40to+150 °C
Storage temperature range Tstg -65to+150 °C
NOTES: 1. See Applications Information and 10 for voltage values at lower temperatures.
2. Initially the TISP4xxxH4BJ must be in thermal equilibrium with TJ=25°C.
3. The surge may be repeated after the TISP4xxxH4BJ returns to its initial conditions.
4. See Applications Information and 11 for current ratings at other temperatures.
5. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See 8 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient temperatures
above2C
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4350H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
3
NOVEMBER 1997 - REVISED JULY 1999
electrical characteristics for the T and R terminals, TA= 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IDRM Repetitive peak off-
state current VDV
DRM TA=25°C
TA=85°C ±5
±10 µA
V(BO) Breakover voltage dv/dt = ±750 V/ms, RSOURCE =300
‘4165
‘4180
‘4200
‘4265
‘4300
‘4350
±165
±180
±200
±265
±300
±350
V
V(BO) Impulse breakover
voltage
dv/dt ±1000 V/µs, Linear voltage ramp,
Maximum ramp value = ±500 V
di/dt = ±20 A/µs, Linear current ramp,
Maximum ramp value = ±10 A
‘4165
‘4180
‘4200
‘4265
‘4300
‘4350
±174
±189
±210
±276
±311
±363
V
I(BO) Breakover current dv/dt = ±750 V/ms, RSOURCE =300±0.15 ±0.8 A
VTOn-state voltage IT5A,t
W=10s ±3 V
IHHolding current IT= ±5 A, di/dt = +/-30 mA/ms ±0.225 ±0.8 A
dv/dt Critical rate of rise of
off-state voltage Linear voltage ramp, Maximum ramp value < 0.85VDRM ±5 kV/µs
IDOff-state current VD50V T
A= 85°C ±10 µA
Coff Off-state capacitance
f=100kHz, V
d=1Vrms,V
D=0,
f=100kHz, V
d=1Vrms,V
D=-1V
f=100kHz, V
d=1Vrms,V
D=-2V
f=100kHz, V
d=1Vrms,V
D=-50V
f=100kHz, V
d=1Vrms,V
D= -100 V
‘4165 thru 4200
‘4265 thru 4350
‘4165 thru 4200
‘4265 thru 4350
‘4165 thru 4200
‘4265 thru 4350
‘4165 thru 4200
‘4265 thru 4350
‘4165 thru 4200
‘4265 thru 4350
80
70
71
60
65
55
30
24
28
22
90
84
79
67
74
62
35
28
33
26
pF
thermal characteristics
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RθJA Junction to free air thermal resistance
EIA/JESD51-3 PCB, IT=I
TSM(1000),
TA=2C,(seeNote6) 113 °C/W
265 mm x 210 mm populated line card,
4-layer PCB, IT=I
TSM(1000),T
A=2C 50
NOTE 6: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4350H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
4
NOVEMBER 1997 - REVISED JULY 1999
PARAMETER MEASUREMENT INFORMATION
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR T AND R TERMINALS
ALL MEASUREMENTS ARE REFERENCED TO THE R TERMINAL
-v VDRM
IDRM
VD
IH
IT
VT
ITSM
ITSP
V(BO)
I(BO)
ID
Quadrant I
Switching
Characteristic
+v
+i
V(BO)
I(BO)
VD
ID
IH
IT
VT
ITSM
ITSP
-i
Quadrant III
Switching
Characteristic PMXXAAB
VDRM
IDRM
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4350H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
5
NOVEMBER 1997 - REVISED JULY 1999
TYPICAL CHARACTERISTICS
Figure 2. Figure 3.
Figure 4. Figure 5.
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
TJ- Junction Temperature - °C
-25 0 25 50 75 100 125 150
|I
D
| - Off-State Current - µA
0·001
0·01
1
1
10
100 TCHAG
VD50V
NORMALISED BREAKOVER VOLTAGE
vs
JUNCTION TEMPERATURE
TJ- Junction Temperature - °C
-25 0 25 50 75 100 125 150
Normalised Breakover Voltage
0.95
1.00
1.05
1.10 TC4HAF
ON-STATE CURRENT
vs
ON-STATE VOLTAGE
VT- On-State Voltage - V
0.7 1.5 2 3 4 5 7110
I
T
- On-State Current - A
1.5
2
3
4
5
7
15
20
30
40
50
70
150
200
1
10
100
TA=2C
tW=10s
TC4HAHA
'4265
THRU
'4350
'4165
THRU
'4200
NORMALISED HOLDING CURRENT
vs
JUNCTION TEMPERATURE
TJ- Junction Temperature - °C
-25 0 25 50 75 100 125 150
Normalised Holding Current
0.4
0.5
0.6
0.7
0.8
0.9
1.5
2.0
1.0
TC4HAK
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4350H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
6
NOVEMBER 1997 - REVISED JULY 1999
TYPICAL CHARACTERISTICS
Figure 6. Figure 7.
NORMALISED CAPACITANCE
vs
OFF-STATE VOLTAGE
VD- Off-state Voltage - V
0.5 1 2 3 5 10 20 30 50 100150
Capacitance Normalised to V
D
=0
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
TJ=25°C
Vd=1Vrms
TC4HAIA
'4165 THRU '4200
'4265 THRU '4350
DIFFERENTIAL OFF-STATE CAPACITANCE
vs
RATED REPETITIVE PEAK OFF-STATE VOLTAGE
VDRM - Repetitive Peak Off-State Voltage - V
130 150 170 200 230 270 300
C - Differential Off-State Capacitance - pF
31
32
33
34
36
30
35
C=C
off(-2 V) -C
off(-50 V)
TCHAJA
'4165
'4180
'4200
'4300
'4350
'4265
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4350H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
7
NOVEMBER 1997 - REVISED JULY 1999
RATING AND THERMAL INFORMATION
Figure 8. Figure 9.
Figure 10. Figure 11.
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
CURRENT DURATION
t - Current Duration - s
0·1 1 10 100 1000
I
TSM(t)
- Non-Repetitive Peak On-State Current - A
1.5
2
3
4
5
6
7
8
9
15
20
30
10
TI4HAC
VGEN = 600 Vrms, 50/60 Hz
RGEN =1.4*V
GEN/ITSM(t)
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA=2C
THERMAL IMPEDANCE
vs
POWER DURATION
t-PowerDuration-s
0·1 1 10 100 1000
Z
θ
θ
θ
θJA(t)
- Transient Thermal Impedance - °C/W
1.5
2
3
4
5
7
15
20
30
40
50
70
150
1
10
100
TI4HAE
ITSM(t) APPLIED FOR TIME t
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA=2C
VDRM DERATING FACTOR
vs
MINIMUM AMBIENT TEMPERATURE
TAMIN - Minimum Ambient Temperature - °C
-35 -25 -15 -5 5 15 25-40 -30 -20 -10 0 10 20
Derating Factor
0.93
0.94
0.95
0.96
0.97
0.98
0.99
1.00 TI4HAFA
'4265 THRU '4350
'4165 THRU '4200
IMPULSE RATING
vs
AMBIENT TEMPERATURE
TA- Ambient Temperature - °C
-40-30-20-100 1020304050607080
Impulse Current - A
90
100
120
150
200
250
300
400
500
600
700
IEC 1.2/50, 8/20
ITU-T 10/700
FCC 10/560
BELLCORE 2/10
BELLCORE 10/1000
FCC 10/160
TC4HAA
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4350H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
8
NOVEMBER 1997 - REVISED JULY 1999
APPLICATIONS INFORMATION
deployment
These devices are two terminal overvoltage protectors. They may be used either singly to limit the voltage
between two conductors ( 12) or in multiples to limit the voltage at several points in a circuit ( 13).
In 12, protector Th1 limits the maximum voltage between the two conductors to ±V(BO). This configuration is
normally used to protect circuits without a ground reference, such as modems. In 13, protectors Th2 and Th3
limit the maximum voltage between each conductor and ground to the ±V(BO) of the individual protector.
Protector Th1 limits the maximum voltage between the two conductors to its ±V(BO) value. If the equipment
being protected has all its vulnerable components connected between the conductors and ground, then
protector Th1 is not required.
impulse testing
To verify the withstand capability and safety of the equipment, standards require that the equipment is tested
with various impulse wave forms. The table below shows some common values.
If the impulse generator current exceeds the protectors current rating then a series resistance can be used to
reduce the current to the protectors rated value and so prevent possible failure. The required value of series
resistance for a given waveform is given by the following calculations. First, the minimum total circuit
impedance is found by dividing the impulse generators peak voltage by the protectors rated current. The
impulse generators fictive impedance (generators peak voltage divided by peak short circuit current) is then
subtracted from the minimum total circuit impedance to give the required value of series resistance. In some
cases the equipment will require verification over a temperature range. By using the rated waveform values
from 11, the appropriate series resistor value can be calculated for ambient temperatures in the range of -
40 °C to 85 °C.
Figure 12. TWO POINT PROTECTION Figure 13. MULTI-POINT PROTECTION
STANDARD PEAK VOLTAGE
SETTING
V
VOLTAGE
WAVE FORM
µs
PEAK CURRENT
VALUE
A
CURRENT
WAVE FORM
µs
TISP4xxxH4
25 °C RATING
A
SERIES
RESISTANCE
GR-1089-CORE 2500 2/10 500 2/10 500 0
1000 10/1000 100 10/1000 100
FCC Part 68
(March 1998)
1500 10/160 200 10/160 250 0
800 10/560 100 10/560 160 0
1500 9/720 37.5 5/320 200 0
1000 9/720 25 5/320 200 0
I3124 1500 0.5/700 37.5 0.2/310 200 0
ITU-T K20/K21 1500
4000 10/700 37.5
100 5/310 200 0
FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K21 10/700 impulse generator
Th1
Th3
Th2
Th1
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4350H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
9
NOVEMBER 1997 - REVISED JULY 1999
a.c. power testing
The protector can withstand currents applied for times not exceeding those shown in 8. Currents that exceed
these times must be terminated or reduced to avoid protector failure. Fuses, PTC (Positive Temperature
Coefficient) resistors and fusible resistors are overcurrent protection devices which can be used to reduce the
current flow. Protective fuses may range from a few hundred milliamperes to one ampere. In some cases it
may be necessary to add some extra series resistance to prevent the fuse opening during impulse testing.
The current versus time characteristic of the overcurrent protector must be below the line shown in 8. In
some cases there may be a further time limit imposed by the test standard (e.g. UL 1459 wiring simulator
failure).
capacitance
The protector characteristic off-state capacitance values are given for d.c. bias voltage, VD, values of 0, -1 V,
-2 V and -50 V. Where possible values are also given for -100 V. Values for other voltages may be calculated
by multiplying the VD= 0 capacitance value by the factor given in 6. Up to 10 MHz the capacitance is
essentially independent of frequency. Above 10 MHz the effective capacitance is strongly dependent on
connection inductance. In many applications, such as 15 and 17, the typical conductor bias voltages will be
about -2 V and -50 V. 7 shows the differential (line unbalance) capacitance caused by biasing one protector
at -2 V and the other at -50 V.
normal system voltage levels
The protector should not clip or limit the voltages that occur in normal system operation. For unusual
conditions, such as ringing without the line connected, some degree of clipping is permissible. Under this
condition about 10 V of clipping is normally possible without activating the ring trip circuit.
10 allows the calculation of the protector VDRM value at temperatures below 25 °C. The calculated value
should not be less than the maximum normal system voltages. The TISP4265H4BJ, with a VDRM of 200 V,
can be used for the protection of ring generators producing 100 V rms of ring on a battery voltage of
-58 V (Th2 and Th3 in 17). The peak ring voltage will be 58 + 1.414*100 = 199.4 V. However, this is the open
circuit voltage and the connection of the line and its equipment will reduce the peak voltage. In the extreme
case of an unconnected line, clipping the peak voltage to 190 V should not activate the ring trip. This level of
clipping would occur at the temperature when the VDRM has reduced to 190/200 = 0.95 of its 25 °C value. 10
shows that this condition will occur at an ambient temperature of -22 °C. In this example, the TISP4265H4BJ
will allow normal equipment operation provided that the minimum expected ambient temperature does not fall
below -22 °C.
JESD51 thermal measurement method
To standardise thermal measurements, the EIA (Electronic Industries Alliance) has created the JESD51
standard. Part 2 of the standard (JESD51-2, 1995) describes the test environment. This is a 0.0283 m3(1 ft3)
cube which contains the test PCB (Printed Circuit Board) horizontally mounted at the centre. Part 3 of the
standard (JESD51-3, 1996) defines two test PCBs for surface mount components; one for packages smaller
than 27 mm on a side and the other for packages up to 48 mm. The SMBJ measurements used the smaller
76.2 mm x 114.3 mm (3.0 x 4.5 “) PCB. The JESD51-3 PCBs are designed to have low effective thermal
conductivity (high thermal resistance) and represent a worse case condition. The PCBs used in the majority
of applications will achieve lower values of thermal resistance and so can dissipate higher power levels than
indicated by the JESD51 values.
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4350H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
10
NOVEMBER 1997 - REVISED JULY 1999
typical circuits
Figure 14. MODEM INTER-WIRE PROTECTION Figure 15. PROTECTION MODULE
Figure 16. ISDN PROTECTION
Figure 17. LINE CARD RING/TEST PROTECTION
FUSE
TISP4350H4
AI6XBPA
RING DETECTOR
HOOK SWITCH
D.C. SINK
SIGNAL
MODEM
RING
TIP
R1a
R1b
RING
WIRE
TIP
WIRE
Th3
Th2
Th1
PROTECTED
EQUIPMENT
E.G. LINE CARD
AI6XBK
R1a
R1b
Th3
Th2
Th1
AI6XBL
SIGNAL
D.C.
TEST
RELAY RING
RELAY SLIC
RELAY
TEST
EQUIP-
MENT RING
GENERATOR
S1a
S1b
R1a
R1b
RING
WIRE
TIP
WIRE
Th3
Th2
Th1
Th4
Th5
SLIC
SLIC
PROTECTION
RING/TEST
PROTECTION
OVER-
CURRENT
PROTECTION
S2a
S2b
S3a
S3b
VBAT
C1
220 nF
AI6XBJ
TISP6xxxx,
TISPPBLx,
½TISP6NTP2
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4350H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
11
NOVEMBER 1997 - REVISED JULY 1999
MECHANICAL DATA
SMBJ (DO-214AA)
plastic surface mount diode package
This surface mount package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
SMB
ALL LINEAR DIMENSIONS IN MILLIMETERS
MDXXBHA
5,59
5,21
2,40
2,00
2,10
1,90
1,52
0,76
4,57
4,06
3,94
3,30 2
Index
Mark
(if needed)
2,32
1,96
0,20
0,10
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4350H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
12
NOVEMBER 1997 - REVISED JULY 1999
MECHANICAL DATA
recommended printed wiring footprint.
device symbolization code
Devices will be coded as below. As the device parameters are symmetrical, terminal 1 is not identified.
carrier information
Devices are shipped in one of the carriers below. Unless a specific method of shipment is specified by the
customer, devices will be shipped in the most practical carrier. For production quantities the carrier will be
embossed tape reel pack. Evaluation quantities may be shipped in bulk pack or embossed tape.
DEVICE SYMOBLIZATION
CODE
TISP4165H4BJ 4165H4
TISP4180H4BJ 4180H4
TISP4200H4BJ 4200H4
TISP4265H4BJ 4265H4
TISP4300H4BJ 4300H4
TISP4350H4BJ 4350H4
CARRIER ORDER #
Embossed Tape Reel Pack TISP4xxxH4BJR
Bulk Pack TISP4xxxH4BJ
SMB Pad Size
ALL LINEAR DIMENSIONS IN MILLIMETERS
2.40
2.16
2.54
MDXXBI
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4350H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
13
NOVEMBER 1997 - REVISED JULY 1999
MECHANICAL DATA
tape dimensions
SMB Package Single-Sprocket Tape
ALL LINEAR DIMENSIONS IN MILLIMETERS
Direction of Feed
0,40 MAX.
4,5 MAX.
0MIN.
12,30
11,70
1,65
1,55
4,10
3,90
2,05
1,95
ø1,5MIN.
7,90
8,10
Embossment
Carrier Tape
5,55
5,45
1,85
1,65
Cover
Tape
8,20
MAX.
NOTES: A. The clearance between the component and the cavity must be within 0,05 mm MIN. to 0,65 mm MAX. so that the
component cannot rotate more than 20° within the determined cavity.
B. Taped devices are supplied on a reel of the following dimensions:-
Reel diameter: 330 ±3,0 mm
Reel hub diameter 75 mm MIN.
Reel axial hole: 13,0 ±0,5 mm
C. 3000 devices are on a reel.
MDXXBJ
20°
Typical component
cavity centre line
Maximium component
rotation
Typical component
centre line
Index
Mark
(if needed)
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4350H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
14
NOVEMBER 1997 - REVISED JULY 1999
IMPORTANT NOTICE
Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or serv-
ice without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders,
that the information being relied on is current.
TI warrants performanceof its semiconductor products and related software to the specifications applicable at the time of sale in
accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems neces-
sary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those man-
dated by government requirements.
Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or
environmental damage (“Critical Applications”).
TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE
FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS.
Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such
applications requires the written approval of an appropriate TIofficer. Questions concerning potential risk applications should be
directed to TI through a local SC sales office.
In order to minimize risks associated with the customer's applications, adequate design and operating safeguards should be
provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents
or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any
patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination,
machine, or process in which such semiconductor products or services might be or are used.
Copyright © 1999, Texas Instruments Incorporated