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Document Number: 71767
S10-2245-Rev. E, 04-Oct-10
Vishay Siliconix
SUD19N20-90
Notes:
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width 300 µs, duty cycle 2 %.
c. Independent of operating temperature.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
Parameter Symbol Test Conditions Min.
Typ.a Max. Unit
Static
Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 µA 200 V
Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250 µA 24
Gate-Body Leakage IGSS VDS = 0 V, VGS = ± 20 V ± 100 nA
Zero Gate Voltage Drain Current IDSS
VDS = 200 V, VGS = 0 V 1
µA
VDS = 200 V, VGS = 0 V, TJ = 125 °C 50
VDS = 200 V, VGS = 0 V, TJ = 175 °C 250
On-State Drain CurrentbID(on) V
DS =5 V, VGS = 10 V 40 A
Drain-Source On-State ResistancebRDS(on)
VGS = 10 V, ID = 5 A 0.075 0.090
VGS = 10 V, ID = 5 A, TJ = 125 °C 0.190
VGS = 10 V, ID = 5 A, TJ = 175 °C 0.260
VGS = 6 V, ID = 5 A 0.082 0.105
Forward Transconductancebgfs VDS = 15 V, ID = 19 A 35 S
Dynamica
Input Capacitance Ciss
VGS = 0 V, VDS = 25 V, F = 1 MHz
1800
pFOutput Capacitance Coss 180
Reverse Transfer Capacitance Crss 80
Total Gate ChargecQg
VDS = 100 V, VGS = 10 V, ID = 19 A
34 51
nC
Gate-Source ChargecQgs 8
Gate-Drain ChargecQgd 12
Gate Resistance Rg0.5 2.9
Tur n - On D el ay T ime ctd(on)
VDD = 100 V, RL = 5.2
ID 19 A, VGEN = 10 V, Rg = 2.5
15 25
ns
Rise Timectr50 75
Turn-Off Delay Timectd(off) 30 45
Fall Timectf60 90
Source-Drain Diode Ratings and Characteristics (TC = 25 °C)
Pulsed Current ISM 50 A
Diode Forward VoltagebVSD IF = 19 A, VGS = 0 V 0.9 1.5 V
Source-Drain Reverse Recovery Time trr IF = 19 A, dI/dt = 100 A/µs 180 250 ns