Document Number: 91067 www.vishay.com
S11-0506-Rev. B, 21-Mar-11 1
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Power MOSFET
IRF840LC, SiHF840LC
Vishay Siliconix
FEATURES
Ultra Low Gate Charge
Reduced Gate Drive Requirement
Enhanced 30 V VGS Rating
Reduced Ciss, Coss, Crss
Extremely High Frequency Operation
Repetitive Avalanche Rated
Compliant to RoHS Directive 2002/95/EC
DESCRIPTION
This new series of low charge Power MOSFETs achieve
signiticantly lower gate charge over conventional MOSFETs.
Utilizing the new LCDMOS technology, the device
improvements are achieved without added product cost,
allowing for reduced gate drive requirements and total
system savings. In addition, reduced switching losses and
improved efficiency are achievable in a variety of high
frequency applications. Frequencies of a few MHz at high
current are possible using the new low charge MOSFETs.
These device improvements combined with the proven
ruggedness and reliability that are characteristic of Power
MOSFETs offer the designer a new standard in power
transistors for switching applications.
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 50 V, starting TJ = 25 °C, L = 14 mH, Rg = 25 Ω, IAS = 8.0 A (see fig. 12).
c. ISD 8.0 A, dI/dt 100 A/μs, VDD VDS, TJ 150 °C.
d. 1.6 mm from case.
PRODUCT SUMMARY
VDS (V) 500
RDS(on) (Ω)V
GS = 10 V 0.85
Qg (Max.) (nC) 39
Qgs (nC) 10
Qgd (nC) 19
Configuration Single
N-Channel MOSFET
G
D
S
TO-220AB
GD
S
Available
RoHS*
COMPLIANT
ORDERING INFORMATION
Package TO-220AB
Lead (Pb)-free IRF840LCPbF
SiHF840LC-E3
SnPb IRF840LC
SiHF840LC
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage VDS 500 V
Gate-Source Voltage VGS ± 30
Continuous Drain Current VGS at 10 V TC = 25 °C ID
8.0
A
TC = 100 °C 5.1
Pulsed Drain CurrentaIDM 28
Linear Derating Factor 1.0 W/°C
Single Pulse Avalanche EnergybEAS 510 mJ
Repetitive Avalanche CurrentaIAR 8.0 A
Repetitive Avalanche EnergyaEAR 13 mJ
Maximum Power Dissipation TC = 25 °C PD125 W
Peak Diode Recovery dV/dtcdV/dt 3.5 V/ns
Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 150 °C
Soldering Recommendations (Peak Temperature) for 10 s 300d
Mounting Torque 6-32 or M3 screw 10 lbf · in
1.1 N · m
* Pb containing terminations are not RoHS compliant, exemptions may apply
www.vishay.com Document Number: 91067
2S11-0506-Rev. B, 21-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF840LC, SiHF840LC
Vishay Siliconix
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width 300 μs; duty cycle 2 %.
THERMAL RESISTANCE
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient RthJA -62
°C/WCase-to-Sink, Flat, Greased Surface RthCS 0.50 -
Maximum Junction-to-Case (Drain) RthJC -1.0
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 μA 500 - - V
VDS Temperature Coefficient ΔVDS/TJ Reference to 25 °C, ID = 1 mA -0.63-
V/°C
Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V
Gate-Source Leakage IGSS V
GS = ± 20 V - - ± 100 nA
Zero Gate Voltage Drain Current IDSS
VDS = 500 V, VGS = 0 V - - 25 μA
VDS = 400V, VGS = 0 V, TJ = 125 °C - - 250
Drain-Source On-State Resistance RDS(on) V
GS = 10 V ID = 4.8 Ab- - 0.85 Ω
Forward Transconductance gfs VDS = 50 V, ID = 4.8 Ab4.0 - - S
Dynamic
Input Capacitance Ciss VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
-1100-
pFOutput Capacitance Coss -170-
Reverse Transfer Capacitance Crss -18-
Total Gate Charge Qg
VGS = 10 V ID = 8.0 A, VDS = 400 V
see fig. 6 and 13b
--39
nC Gate-Source Charge Qgs --10
Gate-Drain Charge Qgd --19
Turn-On Delay Time td(on)
VDD = 250 V, ID = 8.0 A,
Rg = 9.1 Ω, RD= 30 Ω
see fig. 10b
-12-
ns
Rise Time tr -25-
Turn-Off Delay Time td(off) -27-
Fall Time tf -19-
Internal Drain Inductance LD Between lead,
6 mm (0.25") from
package and center of
die contact
-4.5-
nH
Internal Source Inductance LS-7.5-
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current ISMOSFET symbol
showing the
integral reverse
p - n junction diode
--8.0
A
Pulsed Diode Forward CurrentaISM --28
Body Diode Voltage VSD TJ = 25 °C, IS = 8.0 A, VGS = 0 Vb--2.0V
Body Diode Reverse Recovery Time trr TJ = 25 °C, IF = 8.0 A,
dI/dt = 100 A/μsb
- 490 740 ns
Body Diode Reverse Recovery Charge Qrr -3.04.5μC
Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
D
S
G
S
D
G
Document Number: 91067 www.vishay.com
S11-0506-Rev. B, 21-Mar-11 3
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF840LC, SiHF840LC
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
91067_01
Bottom
To p
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
4.5 V
20 µs Pulse Width
TC = 25 °C
4.5 V
VDS, Drain-to-Source Voltage (V)
ID, Drain Current (A)
100101
101
100
10-1
10-1
101
100
10-1
100101
VDS, Drain-to-Source Voltage (V)
ID, Drain Current (A)
Bottom
To p
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
4.5 V
20 µs Pulse Width
TC = 150 °C
91067_02
4.5 V
10-1
20 µs Pulse Width
VDS = 50 V
101
100
I
D
, Drain Current (A)
V
GS,
Gate-to-Source Voltage (V)
5678910
4
25 °C
150 °C
91067_03
I
D
= 8.0 A
V
GS
= 10 V
3.0
0.0
0.5
1.0
1.5
2.0
2.5
TJ, Junction Temperature (°C)
RDS(on), Drain-to-Source On Resistance
(Normalized)
91067_04
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160
www.vishay.com Document Number: 91067
4S11-0506-Rev. B, 21-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF840LC, SiHF840LC
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
2400
2000
1600
1200
0
400
800
100101
Capacitance (pF)
VDS, Drain-to-Source Voltage (V)
Ciss
Crss
Coss
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
91067_05
QG, Total Gate Charge (nC)
VGS, Gate-to-Source Voltage (V)
20
16
12
8
0
4
08 40322416
V
DS
= 100 V
V
DS
= 250 V
For test circuit
see figure 13
V
DS
= 400 V
91067_06
I
D
= 8.0 A
48
101
100
V
SD
, Source-to-Drain Voltage (V)
I
SD
, Reverse Drain Current (A)
0.6 1.41.21.00.8
25 °C
150 °C
V
GS
= 0 V
91067_07
1.6
10 µs
100 µs
1 ms
10 ms
Operation in this area limited
by RDS(on)
V
DS
, Drain-to-Source Voltage (V)
I
D
, Drain Current (A)
TC = 25 °C
TJ = 150 °C
Single Pulse
102
103
2
5
0.1
2
5
1
2
5
10
2
5
25
110
25
10225
103
91067_08
Document Number: 91067 www.vishay.com
S11-0506-Rev. B, 21-Mar-11 5
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF840LC, SiHF840LC
Vishay Siliconix
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10a - Switching Time Test Circuit
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Pulse width 1 µs
Duty factor 0.1 %
RD
VGS
RG
D.U.T.
10 V
+
-
VDS
VDD
VDS
90 %
10 %
VGS
td(on) trtd(off) tf
10
1
0.1
10-2
10-5 10-4 10-3 10-2 0.1 1 10
PDM
t1
t2
t1, Rectangular Pulse Duration (s)
Thermal Response (ZthJC)
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
Single Pulse
(Thermal Response)
0.2
0.05
0.02
0.01
91067_11
0.1
D = 0.5
www.vishay.com Document Number: 91067
6S11-0506-Rev. B, 21-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF840LC, SiHF840LC
Vishay Siliconix
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit
R
G
I
AS
0.01 Ω
t
p
D.U.T.
L
V
DS
+
-V
DD
10 V
Vary tp to obtain
required IAS
IAS
VDS
VDD
VDS
tp
1200
0
200
400
600
800
1000
25 150
125
10075
50
Starting TJ, Junction Temperature (°C)
EAS, Single Pulse Energy (mJ)
Bottom
To p
ID
3.6 A
5.1 A
8.0 A
VDD = 50 V
91067_12c
QGS QGD
QG
V
G
Charge
10 V
D.U.T.
3 mA
VGS
VDS
IGID
0.3 µF
0.2 µF
50 kΩ
12 V
Current regulator
Current sampling resistors
Same type as D.U.T.
+
-
Document Number: 91067 www.vishay.com
S11-0506-Rev. B, 21-Mar-11 7
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF840LC, SiHF840LC
Vishay Siliconix
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91067.
P.W. Period
dI/dt
Diode recovery
dV/dt
Ripple 5 %
Body diode forward drop
Re-applied
voltage
Reverse
recovery
current
Body diode forward
current
VGS = 10 Va
ISD
Driver gate drive
D.U.T. lSD waveform
D.U.T. VDS waveform
Inductor current
D = P.W.
Period
+
-
+
+
+
-
-
-
Peak Diode Recovery dV/dt Test Circuit
VDD
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
D.U.T. Circuit layout considerations
Low stray inductance
Ground plane
Low leakage inductance
current transformer
Rg
Note
a. VGS = 5 V for logic level devices
VDD
Package Information
www.vishay.com Vishay Siliconix
Revison: 08-Oct-12 1Document Number: 71195
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TO-220AB
Notes
* M = 1.32 mm to 1.62 mm (dimension including protrusion)
Heatsink hole for HVM
Xi’an and Mingxin actual photo
M*
3
2
1
L
L(1)
D
H(1)
Q
Ø P
A
F
J(1)
b(1)
e(1)
e
E
b
C
MILLIMETERS INCHES
DIM. MIN. MAX. MIN. MAX.
A 4.25 4.65 0.167 0.183
b 0.69 1.01 0.027 0.040
b(1) 1.20 1.73 0.047 0.068
c 0.36 0.61 0.014 0.024
D 14.85 15.49 0.585 0.610
E 10.04 10.51 0.395 0.414
e 2.41 2.67 0.095 0.105
e(1) 4.88 5.28 0.192 0.208
F 1.14 1.40 0.045 0.055
H(1) 6.09 6.48 0.240 0.255
J(1) 2.41 2.92 0.095 0.115
L 13.35 14.02 0.526 0.552
L(1) 3.32 3.82 0.131 0.150
Ø P 3.54 3.94 0.139 0.155
Q 2.60 3.00 0.102 0.118
ECN: X12-0208-Rev. N, 08-Oct-12
DWG: 5471
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Revision: 12-Mar-12 1Document Number: 91000
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