16-Bit Stereo
DIGITAL-TO-ANALOG CONVERTER
with Interface
FEATURES
●INTEGRATED USB INTERFACE:
Full-Speed Transceiver Supports 12Mbps
Data Transfer
Fully Compliant with the USB 1.0 Specifi-
cation
Adaptive Mode for Isochronous Transfer
Self-Powered Device
●ACCEPTS 16-BIT STEREO AND MONO USB
AUDIO DATA STREAMS
●ANALOG PERFORMANCE (VCC = 5V):
Dynamic Range: 100dB (typ at 16-bit)
SNR: 105dB (typ)
THD+N: 0.002% (typ at 16-bit)
Full-Scale Output: 3.1VPP
●8X OVERSAMPLING DIGITAL FILTER:
Passband: 0.454fS
Stopband: 0.546fS
Passband Ripple: ±0.002dB
Stopband Attenuation: –82dB
●SAMPLING RATE (FS): 32kHz, 44.1kHz, 48kHz
●ON-CHIP CLOCK GENERATOR
WITH SINGLE 12MHz CLOCK SOURCE
●MULTI-FUNCTIONS:
Digital Attenuator:
0dB to –64dB, 1dB/step
Soft Mute
Zero Flag
Suspend Flag
Playback Flag
●DUAL POWER SUPPLIES:
+5V for Analog Portion
+3.3V for Digital Portion
●PACKAGE: SSOP-28
DESCRIPTION
The PCM2702 is a single chip digital-to-analog converter
offering two D/A output channels and an integrated USB 1.0
compliant interface controller. The newly developed SpAct™
(Sampling Period Adaptive Controlled Tracking) system re-
covers a stable, low-jitter clock for internal PLL and DAC
operation from the USB interface audio data.
The PCM2702 is based upon Texas Instruments Enhanced
Multi-level Delta-Sigma Modulator, an 8x oversampling digi-
tal interpolation filter, and an analog output low-pass filter.
The PCM2702 can accept a 48kHz, 44.1kHz and 32kHz
sampling rates, using either 16-bit stereo or monaural audio
data. Digital attenuation and soft-mute features are included,
and are controlled via USB audio class request.
Patents Pending.
SpAct™ is a trademark of Texas Instruments.
PCM2702
PCM2702
SBAS142A – MAY 2000 – REVISED NOVEMBER 2007
www.ti.com
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 2000-2007, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
APPLICATIONS
●STAND-ALONE USB AUDIO SPEAKERS
●CRT/LCD INTEGRATED USB AUDIO SPEAKERS
●USB AUDIO AMPLIFIERS
●OTHER USB AUDIO APPLICATIONS
PCM2702
2SBAS142A
www.ti.com
Supply Voltage(2) .............................................................................................................. +6.5V
Supply Voltage(3) .............................................................................................................. +4.0V
Supply Voltage Differences(4) .................................................................................. ±0.1V
Supply Voltage Differences(5) .................................................................................. ±0.1V
Ground Voltage Differences(6) ................................................................................. ±0.1V
Digital Input Voltage(7) ................................................................. –0.3V to VDD + 0.3V
Digital Input Voltage(8) ................................................................................ –0.3V to 6.5V
Analog Input Voltage ................................................ –0.3V to VCC + 0.3V
Input Current (any pins except supplies) ....................................... ±10mA
Operating Temperature .................................................. –25°C to +85°C
Storage Temperature ..................................................... –55°C to +125°C
Junction Temperature.................................................................... +150°C
Lead Temperature (soldering, 5s)................................................. +260°C
Package Temperature (IR reflow, peak, 10s)............................... +235°C
NOTES: (1) Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
(2) VCC, VCCL, VCCR, VDDP. (3) VDD, VDDC. (4) Among VCC, VCCL, VCCR, VCCP.
(5) Among VDD, VDDC. (6) Among AGND, AGNDL, AGNDR, AGNDP, DGND,
DGNDC, and DGNDU. (7) XTI, D+, D–, PLYBCK, SSPND, ZERO, XTO.
(8) VBUS, TEST#, TEST2, TEST1, TEST0.
ABSOLUTE MAXIMUM RATINGS(1)
PIN NAME TYPE DESCRIPTIONS
1 XTI IN Crystal Oscillator Input.(1)
2V
DDC — Digital Power Supply for Clock Generator,
+3.3V.
3 DGNDC — Digital Ground for Clock Generator.
4V
DD — Digital Power Supply, +3.3V.
5 DGND — Digital Ground.
6 D+ IN/OUT USB Differential Input/Output Plus.
7 D– IN/OUT USB Differential Input/Output Minus.
8V
BUS IN USB Bus Power (this pin NEVER consumes
USB bus power).(2)
9 DGNDU — Digital Ground for USB Transceiver.
10 PLYBCK OUT Playback flag, active LOW (LOW: playback,
HIGH: idle).
11 SSPND OUT Suspend flag, active LOW (LOW: suspend,
HIGH: operational).
12 ZERO OUT Zero flag (LOW: Normal, HIGH: ZERO.)
13 TEST3 IN Test pin 3. Connect to digital ground.(2)
14 TEST2 IN Test pin 2. Connect to digital ground.(2)
15 TEST1 IN Test pin 1. Connect to digital ground.(2)
16 TEST0 IN Test pin 0. Connect to digital ground.(2)
17 VCCR — Analog Supply for R-channel, +5V.
18 AGNDR — Analog Ground for R-channel.
19 VOUTR OUT Analog Output for R-channel.
20 AGND — Analog Ground.
21 VCOM — DC Common-Mode Voltage for DAC.
22 VCC — Analog Supply, +5V.
23 VOUTL OUT Analog Output for L-channel.
24 AGNDL — Analog Ground for L-channel.
25 VCCL — Analog Supply for L-channel, +5V.
26 AGNDP — Analog Ground for PLL.
27 VCCP — Analog Supply for PLL, +5V.
28 XTO OUT Crystal Oscillator Output.
NOTES: (1) 3.3 V tolerant. (2) Schmitt trigger input with internal pull-down,
5V tolerant.
XTI
VDDC
DGNDC
VDD
DGND
D+
D–
VBUS
DGNDU
PLYBCK
SSPND
ZERO
TEST3
TEST2
XTO
VCCP
AGNDP
VCCL
AGNDL
VOUTL
VCC
VCOM
AGND
VOUTR
AGNDR
VCCR
TEST0
TEST1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PCM2702
Top View SSOP
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper han-
dling and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PACKAGE/ORDERING INFORMATION(1)
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.
SPECIFIED
PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT PACKAGE-LEAD DESIGNATOR RANGE MARKING NUMBER MEDIA
PCM2702E SSOP-28 DB 0°C to +70°C PCM2702E PCM2702E Rails
"" " ""PCM2702E/2K Tape and Reel
PCM2702 3
SBAS142A www.ti.com
ELECTRICAL CHARACTERISTICS
At TA = +25°C, VCC = VCCL = VCCR = VCCP = 5.0V, VDD = VDDC = 3.3V, fS = 44.1MHz, signal frequency = 1kHz and 16-bit data, unless otherwise specified.
PCM2702E
PARAMETER CONDITIONS MIN TYP MAX UNITS
RESOLUTION 16 Bits
HOST INTERFACE Supports USB revision 1.0, Full Speed
DIGITAL FORMAT
Audio Data Format USB ISOCHRONOUS OUT
Audio Data Bit Length 16
Audio Data Channel 1, 2
Sampling Frequency (fS)32, 44.1, 48
DIGITAL INPUT/OUTPUT
Input Logic Level VIH(1) 2.0 VDC
VIL(1) 0.8 VDC
VIH(2) 0.7 VDD VDC
VIL(2) 0.7 VDD VDC
Input Logic Current IIH(1) VIN = VDD +65 +100 µA
IIL(1) VIN = 0V ±10 µA
IIH(2) VIN = VDD ±10 µA
IIL(2) VIN = 0V ±10 µA
Output Logic Level VOH(3) IOH = –1mA 2.8 VDC
VOL(3) IOL = +1mA 0.5 VDC
DYNAMIC PERFORMANCE(4)
THD+N at VOUT = 0dB 0.002 0.005 %
THD+N at VOUT = –60dB 1.2 %
Dynamic Range EIAJ, A-Weighted 96 100 dB
SIgnal-to-Noise Ratio EIAJ, A-Weighted 100 105 dB
Channel Seperation 98 103 dB
DC ACCURACY
Gain Error ±1.0 ±3.0 % of FSR
Gain Mismatch, Channel-to-Channel ±1.0 ±3.0 % of FSR
Bipolar Zero Error VOUT = 0.5 VCC at BPZ ±30 ±60 mV
ANALOG OUTPUT
Output Voltage Full-Scale(–0dB) 62% of VCC VPP
Center Voltage 50% of VCC VDC
Load Impedance AC-Load 5 kΩ
DIGITAL FILTER PERFORMANCE
Passband ±0.002dB 0.454fS
Passband –3dB 0.490fS
Stopband 0.546fS
Passband Ripple ±0.002 dB
Stopband Attenuation Stopband = 0.546fS–75 dB
Stopband Attenuation Stopband = 0.567fS–82 dB
Delay Time 34/fS11 s
ANALOG FILTER PERFORMANCE
Frequency Response at 20kHz ≠0.02 dB
POWER SUPPLY REQUIREMENTS
Voltage Range VDD, VDDC +3.0 +3.3 +3.6 VDC
VCC, VCCL, VCCR, VCCP +4.5 +5.0 +5.5 VDC
Supply Current IDD VDD = VDDC = 3.3V 22 30 mA
ICC VCC = VCCL = VCCR = VCCP = 5.0V 18 25 mA
Power Dissipation
VDD = VDDC = 3.3V, and VCC = VCCL = VCCR = VCCP = 5.0V
165 225 mW
TEMPERATURE RANGE
Operation Temperature 070°C
Storage Temperature –55 +125 °C
Thermal Resistance,
θ
JA SSOP-28 100 °C/W
NOTES: (1) Pins 8, 13, 14, 15, 16: VBUS, TEST3 TEST2 TEST1, TEST0.
(2) Pin1: XTI.
(3) Pins 10, 11, 12, 28: PLYBCK, SSPND, ZERO, XTO.
(4) The dynamic performance is based upon ideal host signal quality, and may vary according to the system. Dynamic performance specifications are
tested using a Shibasoku #725 THD Meter with 400Hz HPF, 30kHz LPF, Average Mode, and 20kHz Bandwidth limiting. The load connected to the
analog output is 5kΩ, or larger, via AC coupling.
PCM2702
4SBAS142A
www.ti.com
BLOCK DIAGRAM
DAC
DAC
SpAct™Audio
Clock
Generator
8x
Oversampling
Digital Filter
Multi-
Level
Delta-
Sigma
Modulator
USB
I/F
Low-Pass
Filter
Low-Pass
Filter
Power Supply
Crystal
OSC
FIFO
mclk System Clock
wrclk
USB
Packet
Data Audio
Data VOUTL
VCOM
VOUTR
rdclk
USB
Clock
Generator
PLYBCK
VDDPDGNDPXTI XTO VCC AGND VDD DGND
D+
D–
VBUS
VDDC
DGNDU
DGNDC
SSPND
ZERO
VCCL
AGNDL
VCCR
AGNDR
PCM2702 5
SBAS142A www.ti.com
TYPICAL CHARACTERISTICS
All specifications at TA = +25°C, VCC = VCCL = VCCR = VCCP = 5.0V, VDD = VDDC = 3.3V, fS = 44.1MHz, signal frequency = 1kHz and 16-bit data, unless
otherwise specified.
FREQUENCY RESPONSE
Frequency (x f
S
)
(dB)
1 1.5 2 2.5 3 3.5 40.50
0
–20
–40
–60
–80
–100
–120
–140
–160
PASSBAND RIPPLE
Frequency (x f
S
)
(dB)
0.2 0.3 0.4 0.50.10
0.003
0.002
0.001
0
–0.001
–0.002
–0.003
ANALOG FILTER PERFORMANCE (100MHz-10Hz)
Frequency (Hz)
Response (dB)
10k 100k 1M 10M1k100
10
0
–10
–20
–30
–40
–50
–60
ANALOG FILTER PERFORMANCE (100MHz-1MHz)
Frequency (Hz)
Response (dB)
10k 100k 1M1k100
1
0
–1
–2
–3
–4
–5
–6
DIGITAL FILTER PERFORMANCE
ANALOG FILTER PERFORMANCE
PCM2702
6SBAS142A
www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
All specifications at TA = +25°C, VCC = VCCL = VCCR = VCCP = 5.0V, VDD = VDDC = 3.3V, fS = 44.1MHz, signal frequency = 1kHz and 16-bit data, unless
otherwise specified.
THD+N (0dB) vs T
A
T
A
(°C)
THD+N (0dB) (%)
50403020 7060 80100–10
0.003
0.002
0.001
DYNAMIC RANGE vs TA
TA (°C)
Dynamic Range (dB)
50403020 7060 80100–10
106
104
102
100
98
96
SOUND-TO-NOISE RATIO vs TA
TA (°C)
SNR (dB)
50403020 7060 80100–10
110
108
106
104
102
100
CHANNEL SEPARATION vs TA
TA (°C)
Channel Separation (dB)
50403020 7060 80100–10
108
106
104
102
100
98
THD+N (0dB) vs V
CC
V
CC
(V)
THD+N (0dB) (%)
5.04.75 5.55.25 5.754.54.25
0.003
0.002
0.001
DYNAMIC RANGE vs VCC
VCC (V)
Dynamic Range (dB)
5.04.75 5.55.25 5.754.54.25
106
104
102
100
98
96
ANALOG DYNAMIC PERFORMANCE
PCM2702 7
SBAS142A www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
All specifications at TA = +25°C, VCC = VCCL = VCCR = VCCP = 5.0V, VDD = VDDC = 3.3V, fS = 44.1MHz, signal frequency = 1kHz and 16-bit data, unless
otherwise specified.
SOUND-TO-NOISE RATIO vs V
CC
V
CC
(V)
SNR (dB)
5.04.75 5.55.25 5.754.54.25
110
108
106
104
102
100
CHANNEL SEPARATION vs VCC
VCC (V)
Channel Separation (dB)
5.04.75 5.55.25 5.754.54.25
108
106
104
102
100
98
PCM2702
8SBAS142A
www.ti.com
THEORY OF OPERATION
USB INTERFACE
The description of the USB interface complies with Univer-
sal Serial Bus specification Rev. 1.0.
Control and audio data are both transferred to the PCM2702
via D+ (pin 6) and D– (pin 7). All data to/from the PCM2702
are transferred at full-speed. VBUS (pin 8) and DGNDU (pin
9) are also connected to the USB bus. VBUS (pin 8) never
consumes USB bus power, it is used only for detecting the
connection of the USB bus. The following information is
provided in the device descriptor.
The Input Terminal is defined as “USB stream” (terminal
type 0x0101). The Input Terminal can accept 2-channel
audio streams comprised of left and right channel data. The
Output Terminal is defined as a “speaker” (terminal type
0x0301). The Feature Unit supports the following sound
control features.
• Volume Control
• Mute Control
The built-in digital volume controller can be manipulated by
an audio class specific request from 0.0dB to –64.0dB in
steps of 1.0dB. Each channel can be set independently. The
master volume control is also supported. The built-in digital
mute controller can be manipulated by an audio class spe-
cific request. A master mute-control request is acceptable. A
request to an individual channel will be stalled and ignored.
Interface #1 has three alternative settings. Alternative setting
#0 is the Zero Bandwidth setting. Alternative setting #1 is
the 16-Bit Stereo setting, and is an operational setting.
Alternative setting #2 is the 16-Bit Monaural setting, and is
also an operational setting. The PCM2702 has the following
two endpoints.
• Control Endpoint (EP #0)
• Isochronous Audio Data Stream Endpoint (EP #2)
The Control Endpoint is a default endpoint and is used to
control all functions of the PCM2702 by the standard USB
request and the USB audio class specific request. The
Isochronous Audio Data Stream Endpoint is an audio sink
endpoint, which receives the PCM audio data, and accepts
the adaptive transfer mode.
USB Revision 1.0
Device Class 0x00 (device defined interface level)
Device Subclass 0x00 (not specified)
Device Protocol 0x00 (not specified)
Max Packet Size for Endpoint 0 8 byte
Vendor ID 0x08BB
Device ID 0x2702
Release 1.0
TABLE I. Device Definition.
DEVICE CONFIGURATION
Figure 1 illustrates USB audio function topology. The
PCM2702 has two interfaces. Each interface is constructed
by some alternative setting. Interface #0 has one alternative
setting. Alternative setting #0 describes the standard audio
control interface. The audio control interface is constructed
by a terminal. The PCM2702 has the following three termi-
nals.
• Input Terminal (IT)
• Output Terminal (OT)
• Feature Unit (FU)
Endpoint #0
PCM2702
Default
Endpoint
Endpoint #2
Audio Streaming Interface
(IF #1)
IT
TID1 OT
TID2
Standard Audio Control Interface (IF #0)
FU
UID3
Analog Out
NOTE: IT = Input Terminal (Terminal ID #1); OT = Output Terminal (Terminal ID #2); FU = Feature Unit (Unit ID #3).
FI
PCM2702 9
SBAS142A www.ti.com
FIGURE 2. 12MHz Crystal Resonator Connection.
CLOCK AND RESET
The PCM2702 requires a 12MHz (±500ppm) clock for USB
and audio functions, which may be generated by an on-chip
crystal oscillator with external 12MHz crystal resonator, or
supplied by an external clock applied at XTI (pin1).
The 12MHz crystal resonator must be connected to XTI (pin
1) and XTO (pin 28), along with a 1MΩ resistor and two
small capacitors (value is dependent upon the specified load
capacitance of the crystal resonator). If an external clock is
used, the clock must be supplied at XTI, and XTO must be
left open. The clock signal applied at XTI must be +3.3V
logic level, as this input is not +5V tolerant. Figures 2 and
3 illustrate the circuit connections required for crystal and
external clock options.
The PCM2702 includes an internal power-on reset circuit,
which automatically initializes digital logic when VDD ex-
ceeds 2.0V typical (range: 1.6V to 2.4V). Initialization
requires approximately 350µs for completion. The VDD
supply must rise to 2.0V within 10ms for proper power-on
sequence operation.
INTERFACE SEQUENCE
Power-on, Attach, and Playback Sequence
The PCM2702 is ready for setup when the reset sequence
has finished and the USB bus is connected. After connec-
tion is established, the PCM2702 is ready to accept USB
audio data. While waiting for audio data (idle state), the
analog outputs are set to bipolar zero (BPZ) and the zero
flag, ZERO (pin 12), is set to HIGH.
When receiving the audio data, the PCM2702 stores the first
audio packet, which contains 1ms of audio data, into an
internal storage buffer. The PCM2702 starts playing the
audio data upon detection of the Start of Frame (SOF)
packet.
See Figures 4 and 5 for the normal operation sequence.
FIGURE 3. External 12MHz Clock Input Connection.
1
28
XTAL
12MHz 1MΩ
XTI
XTO
1
28
12MHz External Clock
Must Be Left Open
XTI
XTO
PCM2702
10 SBAS142A
www.ti.com
Ready for Setup Ready for Playback
Attach (connect to USB bus)
Device Setup 1ms
23ms
(1024/fS)
1ms
10ms
SOFSOF SOF SOF
2nd Audio Data1st Audio Data1st SOF
VDD
0V
VBUS
D+/D–
PLYBCK
SSPND
ZERO
VOUTL
VOUTR
2.0V (1.6 to 2.4V)
350µs
Internal
Reset
Ready for Setup Ready for Playback
Device Setup 1ms
23ms
(1024/fS)
1ms
SOFSOF SOF SOF
2nd Audio Data1st Audio Data1st SOF
V
DD
0V
V
BUS
D+/D–
PLYBCK
SSPND
ZERO
V
OUT
L
V
OUT
R
2.0V (1.6 to 2.4V)
350µs
Internal
Reset
Attach (connect to USB bus)
10ms
FIGURE 4. Connecting the PCM2702 to the USB Bus After Power-On.
FIGURE 5. Connecting the PCM2702 to the USB Bus Prior to Power-On.
PCM2702 11
SBAS142A www.ti.com
Play, Stop, and Detach sequence
When host finishes or aborts audio playback, the PCM2702
will stop playing after the last transmitted audio data has
been received. Figure 6 shows the operation sequence for
play, stop, and detach.
PLYBCK, SSPND, AND ZERO FLAG
PLYBCK, SSPND, and Zero flag in Figures 4, 5, and 6 are
defined as follows.
PLYBCK—while PCM audio input data is playing back,
PLYBCK (pin 10) is switched LOW.
SSPND—upon detection of a suspend state on the USB port,
SSPND (pin 11) is switched LOW.
ZERO—if the PCM audio input data is continuously zero
for 1024 sampling periods (1/fS), ZERO (pin12) is switched
to HIGH.
Detach
1ms 4ms
23ms
(1024/f
S
)
SOF SOF SOF SOF SOF SOF
Audio Data Last Audio DataAudio Data
V
BUS
D+/D–
PLYBCK
SSPND
ZERO
V
OUT
L
V
OUT
R
FIGURE 6. Play, Stop, and Detach.
TEST PINS
The PCM2702 has four test pins—TEST0 (pin 16), TEST1
(pin 15), TEST2 (pin 14), and TEST3 (pin 13)—which are
used solely for testing at the factory. These pins must be
connected to a digital ground for proper operation.
OPERATING ENVIRONMENT INFORMATION
For information about the PC operating environment for the
PCM2702, see Application Report SLAA374, Updated
Operating Environments for PCM270x, PCM290x Applica-
tions, available for download at www.ti.com.
PCM2702
12 SBAS142A
www.ti.com
XTI
V
DD
C
DGNDC
V
DD
DGND
D+
D–
V
BUS
DGNDU
PLYBCK
SSPND
ZERO
TEST3
TEST2
XTO
V
CC
P
AGNDP
V
CC
L
AGNDL
V
OUT
L
V
CC
V
COM
AGND
V
OUT
R
AGNDR
V
CC
R
TEST0
TEST1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PCM2702
R
2
R
3
R
4
X
1
12MHz C
2
C
1
C
3
+3.3V +5V
C
4
C
6
C
8
C
7
C
5
USB Series
“B” Connector
POST
LPF L-Channel
POST
LPF R-Channel
+
NOTE: C
1
, C
2
: 10pF to 33pF (depending on Crystal Resonator); C
3
,C
4
: 0.1µF 1-100µF; C
5
to C
8
: 0.1µF Ceramic each and two
1µF to 100µF for 5V and 3.3V; C
9
: 10µF; R
1
: 1.5kΩ; R
2
, R
3
: 22Ω; R
4
: 1MΩ; X
1
: Crystal Resonator (fundamental mode, parallel resonant).
C
9
FIGURE 7. Typical Connection Diagram.
DATE REVISION PAGE SECTION DESCRIPTION
——Updated front page format.
11 Operating Environment Added section and reference to SLAA374.
Revision History
11/07 A
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
PCM2702E NRND SSOP DB 28 47 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCM2702E/2K NRND SSOP DB 28 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCM2702E/2KG4 NRND SSOP DB 28 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCM2702EG4 NRND SSOP DB 28 47 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 3-Jul-2009
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
PCM2702E/2K SSOP DB 28 2000 330.0 17.4 8.5 10.8 2.4 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 13-Jun-2008
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
PCM2702E/2K SSOP DB 28 2000 336.6 336.6 28.6
PACKAGE MATERIALS INFORMATION
www.ti.com 13-Jun-2008
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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