STA7360 20 W bridge/stereo audio amplifier with clipping detector Features Very few external components No boucherot cells No bootstrap capacitors High output power No switch-on/off noise Very low standby current Fixed gain (20 db stereo) Programmable turn-on delay Clipping detector Standby function Protections - Output AC-DC short-circuit to ground and to supply voltage - Highly inductive loads - Loudspeaker protection - Overrating chip temperature - ESD protection The STA7360 is a class-AB audio power amplifier in the Multiwatt(R) package.Thanks to the fully complementary PNP/NPN output configuration, the high-power performance of the STA7360 is obtained without bootstrap capacitors. r P e t e l o s b O t c u d o r A delayed turn-on mute circuit eliminates audible on/off noise, and a short-circuit protection system prevents spurious intervention with highly inductive loads. The device provides a circuit for the detection of clipping in the output stages. The output, an open collector, is able to drive systems with automatic volume control. Table 1. P e t e l o s b O u d o Description ) (s Figure 1. ) s ( ct MULTIWATT11V Device summary Order code Package Packing STA7360 Multiwatt11V Tube Application circuit 20K +VS 100nF C6 220F C5 C4 1F STAND-BY 22F C3 9 11 SVR 7 8 OUT2 RL 0.22F C2 IN2(+) 5 10 0.22F C1 IN IN1(+) 1 4 2 CLIP DET December 2011 3 6 S-GND P-GND Doc ID 9814 Rev 4 OUT1 OUT BRIDGE D00AU1213 1/28 www.st.com 1 Contents STA7360 Contents 1 2 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 Block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 Test and application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 ) s ( ct u d o r P e 3 Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4 Block description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 t e l o s b O 4.1 Polarization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2 SVR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.3 Delayed turn-on (muting) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.4 Stereo/bridge switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.5 Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.6 Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.7 Output stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.8 t e l o Amplifier block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.1 Short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.2 Polarity inversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.3 DC voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.4 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.5 Loudspeaker protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 ) (s t c u d o r P e 5 s b O 6 2/28 Built-in protection systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.1 Reducing turn-on/off pop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.2 Turn-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Doc ID 9814 Rev 4 STA7360 Contents 6.3 Turn-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.4 Balanced input in bridge configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Doc ID 9814 Rev 4 3/28 List of tables STA7360 List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Recommended values of the external components (stereo test and application circuit) . . 10 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 4/28 Doc ID 9814 Rev 4 STA7360 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Block diagram - stereo configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Block diagram - bridge configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Stereo test and application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Board and layout of the stereo test and application circuit (1:1 scale) . . . . . . . . . . . . . . . . 10 Bridge test and application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Board and layout of the bridge test and application circuit (1:1 scale) . . . . . . . . . . . . . . . . 11 Output power vs. supply voltage (stereo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output power vs. supply voltage (stereo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output power vs. supply voltage (stereo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output power vs. supply voltage (stereo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Drain current vs. supply voltage (stereo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Distortion vs. output power (stereo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Distortion vs. output power (stereo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Distortion vs. output power (stereo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Distortion vs. output power (bridge) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 SVR vs. frequency & C3 (stereo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 SVR vs. frequency & C3 (bridge) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Crosstalk vs. frequency (stereo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Power dissipation & efficiency vs. output power (stereo) . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Power dissipation & efficiency vs. output power (stereo) . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Power dissipation & efficiency vs. output power (stereo) . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Mute function diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Turn-on delay circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Dual-channel distortion detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 ICV - PNP gain vs. IC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 ICV - PNP VCE (sat) vs. IC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 ICV - PNP cutoff frequency vs. IC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 New output stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Classical output stage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Amplifier block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Circuitry for short-circuit detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Maximum allowable power dissipation vs. ambient temperature . . . . . . . . . . . . . . . . . . . . 22 Restart circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Turn-on output waveforms compared to the values of Csvr . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Balanced input in bridge configuration, example 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Balanced input in bridge configuration, example 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Multiwatt11V package mechanical data and dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . 26 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e s b O t e l o Doc ID 9814 Rev 4 5/28 Device overview STA7360 1 Device overview 1.1 Block diagrams Figure 2. Block diagram - stereo configuration INPUT 1 20K 1F ST-BY VCC + ) s ( ct OUT1 - SVR L CLIPPING DETECTOR CLIP DETECT u d o OUT BRIDGE r P e + GND Figure 3. ) (s t c u 20K l o s t e l o s b O PWGND D00AU1215 INPUT 2 Block diagram - bridge configuration od ete OUT2 Pr INPUT 1 1F ST-BY VCC + OUT1 - SVR CLIPPING DETECTOR b O CLIP DETECT OUT BRIDGE - OUT2 + GND PWGND INPUT 2 6/28 Doc ID 9814 Rev 4 D00AU1216 R STA7360 1.2 Device overview Pin connections Figure 4. Pin connections (top view) 11 STAND-BY 10 OUT1 9 +VS 8 OUT2 7 SVR 6 P-GND 5 IN2(+) 4 OUT BRIDGE 3 S-GND 2 CLIP DET ) s ( ct u d o 1 IN1(+) r P e TAB CONNECTED TO PIN 6 D98AU938A t e l o ) (s s b O t c u d o r P e t e l o s b O Doc ID 9814 Rev 4 7/28 Electrical specifications STA7360 2 Electrical specifications 2.1 Absolute maximum ratings Table 2. Absolute maximum ratings Symbol 2.2 Parameter Unit VS Operating supply voltage 22 V IO Output peak current (non rep. for t = 100 s) 5 A IO Output peak current (rep. freq. > 10 Hz) 4 A Ptot Power dissipation at Tcase = 85 C 36 Tstg, TJ Storage and junction temperature -40 to 150 W C r P e t e l o Thermal data Symbol Parameter Rth j-case ) s ( ct u d o Thermal data Table 3. s b O Thermal resistance junction-case (max) ) (s t c u d o r P e t e l o s b O 8/28 Value Doc ID 9814 Rev 4 Value Unit 1.8 C/W STA7360 Electrical specifications 2.3 Electrical characteristics Refer to the test circuits, Tamb = 25 C, VS = 14.4 V, f = 1 kHz, unless otherwise specified. Table 4. Electrical characteristics Symbol Parameter VS Supply voltage range Id Total quiescent drain current ASB Standby attenuation ISB Standby current Vst_on Standby on threshold Vst_off Standby off threshold ICO Test condition Min. 8 stereo configuration 65 60 Clip detector prog. current pin 2 pull-up to 5 V d = 1% with 10 k d=5% Output power (each channel) THD = 10% RL = 2 RL = 3.2 RL = 4 , 12 V RL = 4 d Distortion PO = 0.1 to 2.5 W; RL = 4 PO = 0.1 to 4 W; RL = 3.2 SVR Supply voltage rejection Rg = 10 k f = 100 Hz CT Crosstalk RI Input resistance GV Voltage gain GV Voltage gain match EIN e t e l s ( t c u d o Pr O ) C3 = 22 F C3 = 100 F f = 1 kHz f = 10 kHz 7 Input noise voltage o s b V 120 mA dB 100 A 1 V ) s ( ct A A 11 8 4.5 6.5 0.05 0.05 W W W W 0.5 0.5 45 Rg = 50 Rg = 10 k Rg = % % 62 dB dB 55 dB dB 50 k 45 19 22 Hz to 22 kHz 18 u d o r P e bs Unit V 70 130 t e l o Max. 80 3.5 Stereo PO Typ. 20 2.5 3 3.5 21 dB 1 dB 5 7 V V V 250 mV Bridge O VOS Output offset voltage PO Output power THD = 10% RL = 4 , 12 V RL = 4 , 14.4 V Distortion PO = 0.1 to 7 W; RL = 4 Supply voltage rejection Rg = 10 k f = 100 Hz d SVR 16 C3 = 22 F C3 = 100 F 15 20 0.05 45 W W 0.5 % 62 dB dB RI Input resistance 50 k GV Voltage gain 26 dB EIN Input noise voltage 3.5 4 V V 22 Hz to 22 kHz Rg = 50 Rg = 10 k Doc ID 9814 Rev 4 9/28 Electrical specifications STA7360 2.4 Test and application circuits Figure 5. Stereo test and application circuit 20K +VS 220F C5 C4 1F 100nF C6 STAND-BY 100F C3 9 11 SVR 7 8 4 0.22F C2 IN2(+) 5 IN1(+) 1 10 2 3 CLIP DET Figure 6. 1000F C7 RL OUT BRIDGE ) s ( ct 1000F C8 0.22F C1 IN OUT2 6 S-GND OUT1 RL u d o P-GND D00AU1214 r P e Board and layout of the stereo test and application circuit (1:1 scale) t e l o ) (s s b O t c u d o r P e t e l o Table 5. s b O Recommended values of the external components (stereo test and application circuit) Comp. Recommended value C1 0.22 F C2 Larger than the recommended value Smaller than the recommended value Input decoupling (CH1) - - 0.22 F Input decoupling (CH2) - - C3 100 F Supply voltage rejection filtering capacitor C4 1 F 10/28 Purpose Longer turn-on delay Standby ON/OFF Delayed turn-off with standby delay switch Doc ID 9814 Rev 4 -Worse supply voltage rejection -Shorter turn-on delay -Danger of noise (pop) Danger of noise (pop) STA7360 Table 5. Electrical specifications Recommended values of the external components (stereo test and application circuit) Comp. Recommended value C5 220 F (min) Supply bypass Danger of oscillation C6 100 nF (min) Supply bypass Danger of oscillation C7 2200 F -Decrease of low-frequency cutoff -Increase of low-frequency cutoff Output decoupling (CH2) -Longer turn-on delay -Shorter turn-on delay C8 2200 F -Decrease of low-frequency cutoff -Increase of low-frequency cutoff Output decoupling (CH1) -Longer turn-on delay -Shorter turn-on delay Figure 7. Larger than the recommended value Purpose Smaller than the recommended value u d o 20K +VS 100nF C6 220F C5 C4 1F r P e STAND-BY 22F C3 9 11 8 so 0.22F C2 IN2(+) 5 0.22F C1 IN let 7 SVR IN1(+) 1 2 )- s ( t c CLIP DET Figure 8. ) s ( ct Bridge test and application circuit 3 b O S-GND 10 4 6 OUT2 RL OUT1 OUT BRIDGE P-GND D00AU1213 u d o Board and layout of the bridge test and application circuit (1:1 scale) r P e t e l o s b O Doc ID 9814 Rev 4 11/28 Typical operating characteristics STA7360 3 Typical operating characteristics Figure 9. Output power vs. supply voltage (stereo) Figure 10. Output power vs. supply voltage (stereo) ) s ( ct u d o Figure 11. Output power vs. supply voltage (stereo) ) (s r P e s b O t c u d o r P e t e l o s b O 12/28 t e l o Figure 12. Output power vs. supply voltage (stereo) Doc ID 9814 Rev 4 STA7360 Typical operating characteristics Figure 13. Drain current vs. supply voltage (stereo) Figure 14. Distortion vs. output power (stereo) ) s ( ct u d o r P e Figure 15. Distortion vs. output power (stereo) Figure 16. Distortion vs. output power (stereo) t e l o ) (s s b O t c u d o r P e t e l o s b O Doc ID 9814 Rev 4 13/28 Typical operating characteristics STA7360 Figure 17. Distortion vs. output power (bridge) Figure 18. SVR vs. frequency & C3 (stereo) ) s ( ct u d o r P e Figure 19. SVR vs. frequency & C3 (bridge) Figure 20. Crosstalk vs. frequency (stereo) t e l o ) (s s b O t c u d o r P e t e l o s b O 14/28 Doc ID 9814 Rev 4 STA7360 Typical operating characteristics Figure 21. Power dissipation & efficiency vs. output power (stereo) Figure 22. Power dissipation & efficiency vs. output power (stereo) ) s ( ct u d o r P e Figure 23. Power dissipation & efficiency vs. output power (stereo) ) (s t e l o s b O t c u d o r P e t e l o s b O Doc ID 9814 Rev 4 15/28 Block description STA7360 4 Block description 4.1 Polarization The device is organized with the gain resistors directly connected to the signal ground pin i.e. without gain capacitors (Figure 2). The non-inverting inputs of the amplifiers are connected to the SVR pin by means of resistor dividers, equal to the feedback networks. This allows the outputs to track the SVR pin which is sufficiently slow to avoid audible turn-on and turn-off transients. 4.2 ) s ( ct SVR The voltage ripple on the outputs is equal to the one on the SVR pin: with appropriate selection of CSVR, more than 60 dB of ripple rejection can be obtained. 4.3 u d o r P e Delayed turn-on (muting) t e l o The CSVR sets a signal turn-on delay too. A circuit is included which mutes the device until the voltage on the SVR pin reaches ~2.5 V typ. (Figure 25). The mute function is obtained by duplicating the input differential pair (Figure 24); it can be switched to the signal source or to an internal mute input. This feature is necessary to prevent transients at the inputs reaching the loudspeaker(s) immediately after power-on). ) (s s b O Figure 25 represents the detailed turn-on transient with reference to the stereo configuration. At power-on the output decoupling capacitors are charged through an internal path but the device itself remains switched off (phase 1 of the represented diagram). t c u When the outputs reach the voltage level of about 1 V (this means that there are no shortcircuits) the device switches on, the SVR capacitor starts charging itself and the output tracks exactly the SVR pin. During this phase the device is muted until the SVR reaches the "Play" threshold (~2.5 V typ.), after which the music signal starts being played. d o r t Stereo/bridge switching e l o 4.4 s b O 4.5 P e There is also no need for external components for changing from stereo to bridge configuration (Figure 2, 3). A simple short-circuit between two pins allows phase reversal at one output, yet maintaining the quiescent output voltage. Standby The device is also equipped with a standby function, so that a low current, and hence a low cost switch, can be used for turn-on/off. 16/28 Doc ID 9814 Rev 4 STA7360 4.6 Block description Stability The device is provided with an internal compensation which allows reaching low values of closed loop gain. In this way better performances of the S/N ratio and SVR can be obtained. Figure 24. Mute function diagram ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Doc ID 9814 Rev 4 17/28 Block description STA7360 Figure 25. Turn-on delay circuit ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o Figure 26. Dual-channel distortion detector s b O IN1 OUT1 CLIP DET DISTORTION DETECTOR IN2 OUT2 D98AU959 18/28 Doc ID 9814 Rev 4 STA7360 4.7 Block description Output stage Poor current capability and low cutoff frequency are well-known limits of the standard lateral PNP. Composite PNP-NPN power output stages have been widely used, regardless of their high saturation drop. This drop can be overcome only at the expense of external components, namely, the bootstrap capacitors. The availability of 4 A isolated collector PNP (ICV PNP) adds versatility to the design. The performance of this component, in terms of gain, VCEsat and cutoff frequency, is shown in Figure 27, 28, and 29 respectively. It is realized in a new bipolar technology, characterized by top-bottom isolation techniques, allowing the implementation of low leakage diodes, too. It guarantees BVCEO > 20 V and BVCBO > 50 V both for NPN and PNP transistors. Basically, the connection shown in Figure 30 has been chosen. First of all because its voltage swing is rail-to-rail, limited only by the VCEsat of the output transistors, which are in the range of 0.3 W each. Then, the gain VOUT/VIN is greater than unity, approximately 1+R2/R1. (VCC/2 is fixed by an auxiliary amplifier common to both channel). It is possible, controlling the amount of this local feedback, to force the loop gain (A * b) to less than unity at frequencies for which the phase shift is 180. This means that the output buffer is intrinsically stable and not prone to oscillation. ) s ( ct u d o r P e Figure 27. ICV - PNP gain vs. IC Figure 28. ICV - PNP VCE (sat) vs. IC t e l o ) (s s b O t c u d o r P e t e l o Figure 29. ICV - PNP cutoff frequency vs. IC s b O Doc ID 9814 Rev 4 19/28 Block description STA7360 Figure 30. New output stage ) s ( ct In contrast, with the circuit of Figure 31, the solution adopted to reduce the gain at high frequencies is the use of an external RC network. 4.8 u d o r P e Amplifier block diagram t e l o The block diagram of each voltage amplifier is shown in Figure 32. Regardless of production spread, the current in each final stage is kept low, with enough margin on the minimum, below which crossover distortion would appear. Figure 31. Classical output stage ) (s s b O t c u d o r P e t e l o s b O 20/28 Figure 32. Amplifier block diagram Doc ID 9814 Rev 4 STA7360 Built-in protection systems 5 Built-in protection systems 5.1 Short-circuit protection The maximum current the device can deliver can be calculated by considering the voltage that may be present at the terminals of a car radio amplifier and the minimum load impedance. Apart from consideration concerning the area of the power transistors, it is not difficult to achieve peak currents of this magnitude (5 A peak).However, it becomes more complicated if AC and DC short-circuit protection is also required. In particular, with a protection circuit which limits the output current following the SOA curve of the output transistors, it is possible that in some conditions (highly reactive loads, for example) the protection circuit may intervene during normal operation. For this reason each amplifier has been equipped with a protection circuit that intervenes when the output current exceeds 4 A. ) s ( ct u d o Figure 33 shows the protection circuit for an NPN power transistor (a symmetrical circuit applies to PNP). The VBE of the power is monitored and gives out a signal, available through a cascode. r P e This cascode is used to avoid the intervention of the short-circuit protection when the saturation is below a given limit. t e l o The signal sets a flip-flop which forces the amplifier outputs into a high impedance state. s b O In case of DC short-circuit when the short-circuit is removed, the flip-flop is reset and restarts the circuit (Figure 35). In case of AC short-circuit or load shorted in bridge configuration, the device is continuously switched in ON/OFF conditions and the current is limited. ) (s t c u Figure 33. Circuitry for short-circuit detection d o r P e t e l o s b O 5.2 Polarity inversion High current (up to 10 A) can be handled by the device with no damage for a longer period than the blow-out time of a quick 2 A fuse (normally connected in series with the supply). This features is added to avoid destruction, if during fitting to the car, a mistake on the connection of the supply is made. Doc ID 9814 Rev 4 21/28 Built-in protection systems 5.3 STA7360 DC voltage The maximum operating DC voltage for the STA7360 is 18 V. 5.4 Thermal shutdown The presence of a thermal limiting circuit offers the following advantages: 1. an overload on the output (even if it is permanent), or an excessive ambient temperature can be easily withstood. 2. the heatsink can have a smaller factor of safety compared with that of a conventional circuit. There is no device damage in the case of excessive junction temperature: all that happens is that Po (and therefore Ptot) and Id are reduced. ) s ( ct The maximum allowable power dissipation depends upon the size of the external heatsink (i.e. its thermal resistance). Figure 34 shows the dissipable power as a function of ambient temperature for different thermal resistance. u d o r P e Figure 34. Maximum allowable power dissipation vs. ambient temperature t e l o ) (s s b O t c u d o r 5.5 P e s b O t e Loudspeaker protection l o The STA7360 guarantees safe operations even for the loudspeaker in case of accidental short-circuit. Whenever a single OUT to GND, OUT to VS short-circuit occurs, both the outputs are switched OFF, thus limiting dangerous DC current flowing through the loudspeaker. Figure 35. Restart circuit 22/28 Doc ID 9814 Rev 4 STA7360 6 Application hints Application hints This section explains briefly how to get the best from the STA7360 and presents some application circuits with suggestions for the value of the components. These values can change depending on the characteristics that the designer of the car radio wants to obtain, or other parts of the car radio that are connected to the audio block. To optimize the performance of the audio part it is useful (or indispensable) to analyze also the parts outside this block that can have an interconnection with the amplifier. This method can provide components and system cost savings. 6.1 ) s ( ct Reducing turn-on/off pop The STA7360 has been designed in a way that the turn-on (off) transients are controlled through the charge (discharge) of the Csvr capacitor. u d o r P e As a result of it, the turn-on (off) transient spectrum contents is limited only to the subsonic range. The following section gives some brief notes to get the best from this design feature (it will refer mainly to the stereo application which appears to be in most cases the more critical from the pop viewpoint. The bridge connection in fact, due to the common-mode waveform at the outputs, does not give a pop effect). t e l o 6.2 Turn-on ) (s s b O Figure 36 shows the output waveform (before and after the "A" weighting filter) compared to the value of Csvr. t c u Better pop-on performance is obtained with higher Csvr values (the recommended range is from 22 F to 220 F). d o r The turn-on delay (during which the amplifier is in mute condition) is essentially a function of Cout, Csvr: P e let O o s b T1 120 * Cout T2 1200 * Csvr The turn-on delay is given by: T1+T2 STEREO T2 BRIDGE The best performance is obtained by driving the st-by pin with a ramp having a slope slower than 2 V/ms. Doc ID 9814 Rev 4 23/28 Application hints STA7360 Figure 36. Turn-on output waveforms compared to the values of Csvr a) Csvr = 22 F ) s ( ct u d o b) Csvr = 47 F r P e t e l o ) (s s b O t c u d o r P e t e l o c) Csvr = 100 F s b O 24/28 Doc ID 9814 Rev 4 STA7360 6.3 Application hints Turn-off A turn-off pop can occur if the st-by pin goes low with a short time constant. This pop is due to the fast switch-off of the internal current generator of the amplifier. If the voltage present across the load becomes rapidly zero (due to the fast switchoff) a small pop occurs, depending also on Cout, Rload. The parameters that set the switchoff time constant of the st-by pin are: 6.4 the st-by capacitor (C4) the SVR capacitor (Csvr) resistors connected from the st-by pin to the logical input (Rext) ) s ( ct Balanced input in bridge configuration u d o A helpful characteristic of the STA7360 is that, in bridge configuration, a signal present on both the input capacitors is amplified by the same amount and it is present in phase at the outputs, so this signal does not produce effects on the load. The typical value of CMRR is 46 dB. r P e t e l o Looking at Figure 37, we can see that a noise signal from the ground of the power amplifier to the ground of the hypothetical preamplifier is amplified of a factor equal to the gain of the amplifier (2 * Gv). s b O Using a configuration of Figure 38 the same ground noise is present at the output multiplied by the factor 2 * Gv/200. ) (s This means less distortion, less noise (e.g. motor cassette noise) and/or a simplification of the layout of PC board. t c u The only limitation of this balanced input is the maximum amplitude of common-mode signals (few tens of millivolt) to avoid a loss of output power due to the common-mode signal on the output, but in a large number of cases this signal is within this range. d o r P e Figure 37. Balanced input in bridge configuration, example 1 t e l o s b O Figure 38. Balanced input in bridge configuration, example 2 Doc ID 9814 Rev 4 25/28 Package information 7 STA7360 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. Figure 39. Multiwatt11V package mechanical data and dimensions. DIM. mm MIN. TYP. MIN. TYP. OUTLINE AND MECHANICAL DATA MAX. A 5 B 2.65 0.104 C 1.6 0.063 D 0.197 1 ) s ( ct 0.039 E 0.49 0.55 0.019 F 0.88 0.95 0.035 G 1.45 1.7 1.95 0.057 0.067 0.077 G1 16.75 17 17.25 0.659 0.669 0.679 H1 19.6 u d o 0.022 0.037 r P e 0.772 H2 e t e ol inch MAX. 20.2 21.9 22.2 22.5 0.862 0.874 0.886 L1 21.7 22.1 22.5 0.854 0.87 0.886 L2 17.4 18.1 0.685 L3 17.25 17.5 17.75 0.679 0.689 L4 10.3 10.7 10.9 0.406 0.421 s b O 0.713 )- 0.699 0.429 L7 2.65 2.9 0.104 M 4.25 4.55 4.85 0.167 0.179 M1 4.73 5.08 5.43 0.186 0.200 S 1.9 2.6 0.075 0.102 S1 1.9 2.6 0.075 0.102 Dia1 3.65 3.85 0.144 0.152 t(s c u d t e l o 0.795 L 0.114 0.191 0.214 Multiwatt11 (Vertical) o r P s b O 0016035 H 26/28 Doc ID 9814 Rev 4 STA7360 8 Revision history Revision history Table 6. Document revision history Date Revision Changes Sep-2003 1 Initial release. Nov-2005 2 Add Vst_on and Vst_off in electrical characteristics. Jan-2006 3 Modified Vst_on max value in Table 4. 12-Dec-2011 4 Added Table 1: Device summary Updated ECOPACK(R) text in Section 7: Package information Revised document presentation, layout; minor textual updates ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Doc ID 9814 Rev 4 27/28 STA7360 ) s ( ct Please Read Carefully: u d o Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. r P e All ST products are sold pursuant to ST's terms and conditions of sale. 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(c) 2011 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 28/28 Doc ID 9814 Rev 4