High Performance, Low Power, Rail-to-Rail
Precision Instrumentation Amplifier
Data Sheet
AD8422
FEATURES
Low power: 330 µA maximum quiescent current
Rail-to-rail output
Low noise and distortion
8 nV/√Hz maximum input voltage noise at 1 kHz
0.15 µV p-p RTI noise (G = 100)
0.5 ppm nonlinearity with 2 kΩ load (G = 1)
Excellent ac specifications
80 dB minimum CMRR at 10 kHz (G = 1)
2.2 MHz bandwidth (G = 1)
High precision dc performance (AD8422BRZ)
150 dB minimum CMRR (G = 1000)
0.04% maximum gain error (G = 1000)
0.3 µV/°C maximum input offset drift
0.5 nA maximum input bias current
Wide supply range
4.6 V to 36 V single supply
±2.3 V to ±18 V dual supply
Input overvoltage protection: 40 V from opposite supply
Gain range: 1 to 1000
APPLICATIONS
Medical instrumentation
Industrial process controls
Strain gages
Transducer interfaces
Precision data acquisition systems
Channel-isolated systems
Portable instrumentation
CONNECTION DIAGRAM
TOP VIEW
(No t t o Scal e)
11197-001
–IN
1
R
G2
R
G3
+IN
4
+V
S
8
V
OUT
7
REF
6
–V
S
5
AD8422
Figure 1. 8-Lead MSOP (RM), 8-Lead SOIC (R)
–140
–130
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
10 100 1k 5k
AMPLITUDE ( dBc)
FRE Q UE NCY ( Hz )
R
L
=2kΩ
V
OUT
= ±10V
G = 1000
G = 100
G = 10
G = 1
11197-102
Figure 2. Total Harmonic Distortion vs. Frequency
GENERAL DESCRIPTION
The AD8422 is a high precision, low power, low noise, rail-to-rail
instrumentation amplifier that delivers the best performance
per unit microampere in the industry. The AD8422 processes
signals with ultralow distortion performance that is load
independent over its full output range.
The AD8422 is the third generation development of the industry-
standard AD620. The AD8422 employs new process technologies
and design techniques to achieve higher dynamic range and
lower errors than its predecessors, while consuming less than
one-third of the power. The AD8422 uses the high performance
pinout introduced by the AD8221.
Ver y low bias current makes the AD8422 error-free with high
source impedance, allowing multiple sensors to be multiplexed
to the inputs. Low voltage noise and low current noise make the
AD8422 an ideal choice for measuring a Wheatstone bridge.
The wide input range and rail-to-rail output of the AD8422
bring all of the benefits of a high performance in-amp to single-
supply applications. Whether using high or low supply voltages,
the power savings make the AD8422 an excellent choice for
high channel count or power sensitive applications on a very
tight error budget.
The AD8422 uses robust input protection that ensures reliability
without sacrificing noise performance. The AD8422 has high
ESD immunity, and the inputs are protected from continuous
voltages up to 40 V from the opposite supply rail.
A single resistor sets the gain from 1 to 1000. The reference pin
can be used to apply a precise offset to the output voltage.
The AD8422 is specified from −40°C to +85°C and has typical
performance curves to 125°C. It is available in 8-lead MSOP
and 8-lead SOIC packages.
Rev. A Document Feedback
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Technical Support www.analog.com
AD8422 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Connection Diagram ....................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
SOIC Package ................................................................................ 3
MSOP Package .............................................................................. 5
Absolute Maximum Ratings ............................................................ 8
Thermal Resistance ...................................................................... 8
ESD Caution .................................................................................. 8
Pin Configuration and Function Descriptions ............................. 9
Typical Performance Characteristics ........................................... 10
Theory of Operation ...................................................................... 19
Architecture ................................................................................ 19
Gain Selection ............................................................................. 19
Reference Terminal .................................................................... 20
Input Voltage Range ................................................................... 20
Layout .......................................................................................... 20
Input Bias Current Return Path ............................................... 21
Input Voltages Beyond the Supply Rails .................................. 21
Radio Frequency Interference (RFI) ........................................ 22
Applications Information .............................................................. 23
Precision Bridge Conditioning ................................................. 23
Process Control Analog Input .................................................. 23
Outline Dimensions ....................................................................... 24
Ordering Guide .......................................................................... 24
REVISION HISTORY
1/15—Rev. 0 to Rev. A
Changes to Features Section............................................................ 1
Changes to SOIC Package Section and Table 1 ............................ 4
Changes to MSOP Package Section and Table 2 .......................... 5
Changes to Supply Voltage Parameter and
ESD Parameter, Table 3 .................................................................... 8
Deleted Figure 12 and Figure 15, Renumbered Sequentially ... 11
Changes to Figure 10 to Figure 15 ................................................ 11
Changes to Figure 16, Figure 18, and Figure 19 ......................... 12
Changes to Figure 23 and Figure 24 ............................................. 13
Changes to Figure 31, Figure 32, and Figure 33 ......................... 14
Changes to Figure 64 ...................................................................... 23
5/13—Revision 0: Initial Version
Rev. A | Page 2 of 24
Data Sheet AD8422
Rev. A | Page 3 of 24
SPECIFICATIONS
SOIC PACKAGE
VS = ±15 V, VREF = 0 V, V+IN = 0 V, V−IN = 0 V, TA = 25°C, G = 1, RL = 2 kΩ, unless otherwise noted.
Table 1.
Parameter
Test Conditions/
Comments
AD8422ARZ AD8422BRZ
Unit Min Typ Max Min Typ Max
COMMON-MODE REJECTION RATIO
CMRR DC to 60 Hz with 1 kΩ
Source Imbalance
VCM = −10 V to +10 V
G = 1 86 94 dB
G = 10 106 114 dB
G = 100 126 134 dB
G = 1000 146 150 dB
Over Temperature, G=1 T = −40°C to +85°C 83 89 dB
CMRR at 10 kHz VCM = −10 V to +10 V
G = 1 80 80 dB
G = 10 90 95 dB
G = 100 100 100 dB
G = 1000 100 100 dB
NOISE1
Voltage Noise, 1 kHz
Input Voltage Noise, eNI V
IN+, VIN−, VREF = 0 V 8 8 nV/√Hz
Output Voltage Noise, eNO 80 80 nV/√Hz
Peak to Peak, RTI f = 0.1 Hz to 10 Hz
G = 1 2 2 μV p-p
G = 10 0.5 0.5 μV p-p
G = 100 to 1000 0.15 0.15 μV p-p
Current Noise f = 1 kHz 90 90 110 fA/√Hz
f = 0.1 Hz to 10 Hz 8 8 pA p-p
VOLTAGE OFFSET2
Input Offset, VOSI V
S = ±2.3 V to ±15 V 60 25 μV
Over Temperature T = −40°C to +85°C 70 40 μV
Average Temperature
Coefficient
0.4 0.3 μV/°C
Output Offset, VOSO V
S = ±2.3 V to ±15 V 300 150 μV
Over Temperature T = −40°C to +85°C 500 300 μV
Average Temperature
Coefficient
5 2 μV/°C
Offset RTI vs. Supply (PSR) VS = ±2.3 V to ±18 V
G = 1 90 110 100 120 dB
G = 10 110 130 120 140 dB
G = 100 124 150 140 160 dB
G = 1000 130 150 140 160 dB
INPUT CURRENT
Input Bias Current VS = ±2.3 V to ±15 V 0.5 1 0.2 0.5 nA
Over Temperature T = −40°C to +85°C 2 1 nA
Average Temperature
Coefficient
4 4 pA/°C
Input Offset Current VS = ±2.3 V to ±15 V 0.2 0.3 0.1 0.15 nA
Over Temperature T = −40°C to +85°C 0.8 0.3 nA
Average Temperature
Coefficient
1 1 pA/°C
AD8422 Data Sheet
Parameter
Test Conditions/
Comments
AD8422ARZ AD8422BRZ
Unit Min Typ Max Min Typ Max
REFERENCE INPUT
RIN 20 20 kΩ
IIN VIN+, VIN−, VREF = 0 V 35 50 35 50 µA
Voltage Range –VS +VS –VS +VS V
Gain to Output 1 1 V/V
DYNAMIC RESPONSE
Small Signal −3 dB Bandwidth
G = 1 2200 2200 kHz
G = 10 850 850 kHz
G = 100 120 120 kHz
G = 1000 12 12 kHz
Settling Time 0.01% 10 V step
G = 1 13 13 µs
G = 10 13 13 µs
G = 100 12 12 µs
G = 1000 80 80 µs
Settling Time 0.001% 10 V step
G = 1 15 15 µs
G = 10
15
15
µs
G = 100 15 15 µs
G = 1000 160 160 µs
Slew Rate G = 1 to 100 0.8 0.8 V/µs
GAIN3 G = 1 + (19.8 kΩ/RG)
Gain Range 1 1000 1 1000 V/V
Gain Error VOUT ± 10 V
G = 1 0.03 0.01 %
G = 10 0.2 0.04 %
G = 100
0.2
%
G = 1000 0.2 0.04 %
Gain Nonlinearity VOUT = −10 V to +10 V
G = 1 RL = 2 kΩ 0.5 5 0.5 5 ppm
G = 10 2 5 2 5 ppm
G = 100 4 10 4 10 ppm
G = 1000 10 20 10 20 ppm
Gain vs. Temperature
G = 1 5 1 ppm/°C
G > 1 −80 –80 ppm/°C
INPUT
Input Impedance
Differential 200||2 200||2 GΩ||pF
Common Mode 200||2 200||2 GΩ||pF
Input Operating Voltage Range4 VS = ±2.3 V to ±18 V −VS + 1.2 +VS − 1.2 –VS + 1.2 +VS − 1.2 V
Over Temperature T = −40°C to +85°C −VS + 1.2 +VS − 1.3 –VS + 1.2 +VS − 1.3 V
OUTPUT
Output Swing, RL = 10 kΩ VS = ±15 V −VS + 0.2 +VS − 0.2 −VS + 0.2 +VS − 0.2 V
Over Temperature T = −40°C to +85°C −VS + 0.25 +VS − 0.25 −VS + 0.25 +VS − 0.25 V
Output Swing, RL = 10 kΩ VS = ±2.3 V −VS + 0.12 +VS − 0.12 −VS + 0.12 +VS − 0.12 V
Over Temperature T = −40°C to +85°C −VS + 0.13 +VS − 0.13 −VS + 0.13 +VS − 0.13 V
Output Swing, RL = 2 kΩ VS = ±15 V −VS + 0.25 +VS − 0.25 −VS + 0.25 +VS − 0.25 V
Over Temperature5 T = −40°C to +85°C −VS + 0.3 +VS – 1.4 −VS + 0.3 +VS – 1.4 V
Output Swing, RL = 2 kΩ VS = ±2.3 V −VS + 0.16 +VS − 0.16 −VS + 0.16 +VS − 0.16 V
Over Temperature T = −40°C to +85°C −VS + 0.2 +VS − 0.2 −VS + 0.2 +VS − 0.2 V
Short-Circuit Current 20 20 mA
Rev. A | Page 4 of 24
Data Sheet AD8422
Parameter
Test Conditions/
Comments
AD8422ARZ AD8422BRZ
Unit Min Typ Max Min Typ Max
POWER SUPPLY
Operating Range Dual-supply operation ±2.3 ±18 ±2.3 ±18 V
Single-supply
operation
4.6 36 4.6 36 V
Quiescent Current 300 330 300 330 µA
Over Temperature T = −40°C to +85°C 400 400 µA
TEMPERATURE RANGE
Specified Performance –40 +85 –40 +85 °C
Operating Range6 –40 +125 –40 +125 °C
1 Total RTI noise = √eNI2 + (eNO/G)2
2 Total RTI VOS = (VOSI) + (VOSO/G).
3 Gain does not include the effects of the external resistor, RG.
4 One input grounded. G = 1.
5 Output current limited at cold temperatures. See Figure 33.
6 See Typical Performance Characteristics for expected operation between 85°C and 125°C.
MSOP PACKAGE
VS = ±15 V, VREF = 0 V, V+IN = 0 V, V −IN = 0 V, TA = 25°C, G = 1, RL = 2 kΩ, unless otherwise noted.
Table 2.
Parameter
Test Conditions/
Comments
AD8422ARMZ
AD8422BRMZ
Unit Min Typ Max Min Typ Max
COMMON-MODE REJECTION RATIO
CMRR DC to 60 Hz with 1 kΩ
Source Imbalance
VCM = −10 V to +10 V
G = 1 86 90 dB
G = 10 106 110 dB
G = 100 126 130 dB
G = 1000 146 150 dB
Over Temperature, G = 1 T = −40°C to +85°C 83 86
CMRR at 10 kHz VCM = −10 V to +10 V
G = 1 80 80 dB
G = 10 90 95 dB
G = 100 100 100 dB
G = 1000 100 100 dB
NOISE1
Voltage Noise, 1 kHz
Input Voltage Noise, eNI VIN+, VIN−, VREF = 0 V 8 8 nV/√Hz
Output Voltage Noise, eNO 80 80 nV/√Hz
Peak to Peak, RTI f = 0.1 Hz to 10 Hz
G = 1 2 2 µV p-p
G = 10 0.5 0.5 µV p-p
G = 100 to 1000 0.15 0.15 µV p-p
Current Noise f = 1 kHz 90 90 110 fA/√Hz
f = 0.1 Hz to 10 Hz
8
8
pA p-p
VOLTAGE OFFSET2
Input Offset, VOSI VS = ±2.3 V to ±15 V 70 50 µV
Over Temperature T = −40°C to +85°C 110 75 µV
Average Temperature
Coefficient
0.6 0.4 µV/°C
Output Offset, VOSO VS = ±2.3 V to ±15 V 300 150 µV
Over Temperature T = −40°C to +85°C 500 300 µV
Average Temperature
Coefficient
5 2 µV/°C
Rev. A | Page 5 of 24
AD8422 Data Sheet
Parameter
Test Conditions/
Comments
AD8422ARMZ AD8422BRMZ
Unit Min Typ Max Min Typ Max
Offset RTI vs. Supply (PSR) VS = ±2.3 V to ±18 V
G = 1 90 110 100 120 dB
G = 10 110 130 120 140 dB
G = 100 124 150 140 160 dB
G = 1000 130 150 140 160 dB
INPUT CURRENT
Input Bias Current VS = ±2.3 V to ±15 V 0.5 1 0.2 0.5 nA
Over Temperature T = −40°C to +85°C 2 1 nA
Average Temperature
Coefficient
4 4 pA/°C
Input Offset Current VS = ±2.3 V to ±15 V 0.2 0.3 0.1 0.15 nA
Over Temperature T = −40°C to +85°C 0.8 0.3 nA
Average Temperature
Coefficient
1 1 pA/°C
REFERENCE INPUT
RIN 20 20 kΩ
IIN VIN+, VIN−, VREF = 0 V 35 50 35 50 µA
Voltage Range −VS +VS −VS +VS V
Gain to Output 1 1 V/V
DYNAMIC RESPONSE
Small Signal −3 dB Bandwidth
G = 1 2200 2200 kHz
G = 10 850 850 kHz
G = 100
120
120
kHz
G = 1000 12 12 kHz
Settling Time 0.01% 10 V step
G = 1 13 13 µs
G = 10 13 13 µs
G = 100 12 12 µs
G = 1000 80 80 µs
Settling Time 0.001% 10 V step
G = 1 15 15 µs
G = 10 15 15 µs
G = 100 15 15 µs
G = 1000 160 160 µs
Slew Rate G = 1 to 100 0.8 0.8 V/µs
GAIN3 G = 1 + (19.8 kΩ/RG)
Gain Range 1 1000 1 1000 V/V
Gain Error VOUT ± 10 V
G = 1 0.03 0.01 %
G = 10 0.2 0.04 %
G = 100 0.2 0.04 %
G = 1000 0.2 0.04 %
Gain Nonlinearity VOUT = −10 V to +10 V
G = 1 RL = 2 kΩ 0.5 5 0.5 5 ppm
G = 10 2 5 2 5 ppm
G = 100 4 10 4 10 ppm
G = 1000 10 20 10 20 ppm
Gain vs. Temperature
G = 1 5 1 ppm/°C
G > 1 −80 −80 ppm/°C
Rev. A | Page 6 of 24
Data Sheet AD8422
Parameter
Test Conditions/
Comments
AD8422ARMZ AD8422BRMZ
Unit Min Typ Max Min Typ Max
INPUT
Input Impedance
Differential 200||2 200||2 GΩ||pF
Common Mode 200||2 200||2 GΩ||pF
Input Operating Voltage Range4 VS = ±2.3 V to ±18 V −VS + 1.2 +VS − 1.2 −VS + 1.2 +VS − 1.2 V
Over Temperature T = −40°C to +85°C −VS + 1.2 +VS − 1.3 −VS + 1.2 +VS − 1.3 V
OUTPUT
Output Swing, RL = 10 kΩ VS = ±15 V −VS + 0.2 +VS − 0.2 −VS + 0.2 +VS − 0.2 V
Over Temperature T = −40°C to +85°C −VS + 0.25 +VS − 0.25 −VS + 0.25 +VS − 0.25 V
Output Swing, RL = 10 kΩ VS = ±2.3 V −VS + 0.12 +VS − 0.12 −VS + 0.12 +VS − 0.12 V
Over Temperature T = −40°C to +85°C −VS + 0.13 +VS − 0.13 −VS + 0.13 +VS − 0.13 V
Output Swing, RL = 2 kΩ VS = ±15 V −VS + 0.25 +VS − 0.25 −VS + 0.25 +VS − 0.25 V
Over Temperature5 T = −40°C to +85°C −VS + 0.3 +VS – 1.4 −VS + 0.3 +VS – 1.4 V
Output Swing, RL = 2 kΩ VS = ±2.3 V −VS + 0.16 +VS − 0.16 −VS + 0.16 +VS − 0.16 V
Over Temperature T = −40°C to +85°C −VS + 0.2 +VS − 0.2 −VS + 0.2 +VS − 0.2 V
Short-Circuit Current 20 20 mA
POWER SUPPLY
Operating Range Dual-supply operation ±2.3 ±18 ±2.3 ±18 V
Single-supply operation 4.6 36 4.6 36 V
Quiescent Current 300 330 300 330 µA
Over Temperature T = −40°C to +85°C 400 400 µA
TEMPERATURE RANGE
Specified Performance –40 +85 –40 +85 °C
Operating Range6 –40 +125 –40 +125 °C
1 Total RTI Noise = √eNI2 + (eNO/G)2
2 Total RTI VOS = (VOSI) + (VOSO/G).
3 Gain does not include the effects of the external resistor, RG.
4 One input grounded. G = 1.
5 Output current limited at cold temperatures. See Figure 33.
6 See Typical Performance Characteristics for expected operation between 85°C and 125°C.
Rev. A | Page 7 of 24
AD8422 Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage ±2.3 V to ±18 V
Output Short-Circuit Current Duration Indefinite
Maximum Voltage at −IN or +IN1 −VS + 40 V
Minimum Voltage at −IN or +IN +VS − 40 V
Maximum Voltage at REF ±VS ± 0.3 V
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Maximum Junction Temperature
150°C
ESD
Human Body Model 2.5 kV
Charge Device Model 1.25 kV
Machine Model 100 V
1 For voltages beyond these limits, use input protection resistors. See the
Theory of Operation section for more information.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θJA is specified for a device in free air using a 4-layer JEDEC
printed circuit board (PCB).
Table 4.
Package θJA Unit
8-Lead SOIC 100 °C/W
8-Lead MSOP 162 °C/W
ESD CAUTION
Rev. A | Page 8 of 24
Data Sheet AD8422
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
TOP VIEW
(No t t o Scal e)
11197-002
–IN
1
R
G2
R
G3
+IN
4
+V
S
8
V
OUT
7
REF
6
–V
S
5
AD8422
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1 −IN Negative Input Terminal.
2, 3
R
G
Gain Setting Terminals. Place resistor across the R
G
pins to set the gain. G = 1 + (19.8 kΩ/R
G
).
4 +IN Positive Input Terminal.
5 −VS Negative Power Supply Terminal.
6 REF Reference Voltage Terminal. Drive this terminal with a low impedance voltage source to level shift the output.
7 VOUT Output Terminal.
8 +VS Positive Power Supply Terminal.
Rev. A | Page 9 of 24
AD8422 Data Sheet
Rev. A | Page 10 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
T = 25°C, VS = ±15, VREF = 0 V, RL = 10 kΩ, unless otherwise noted.
–90 –60 –30 030 60 90
0
50
100
150
200
250
300
350
400
INPUT OFFSET VOLTAGE (µV)
HITS
11197-003
Figure 4. Typical Distribution of Input Offset Voltage
–900 –600 –300 0300 600 900
0
200
400
600
800
POSITIVE INPUT BIAS CURRENT (pA)
HITS
11197-004
Figure 5. Typical Distribution of Input Bias Current
–9 –6 –3 0369
0
100
200
300
400
500
PSRR G = 1 (µV/V)
HITS
11197-005
Figure 6. Typical Distribution of PSRR (G = 1)
–300 –200 –100 0100 200 300
0
50
100
150
200
250
300
350
400
OUTPUT OFFSET VOLTAGE (µV)
HITS
11197-006
Figure 7. Typical Distribution of Output Offset Voltage
–300 –200 –100 0100 200 300
0
100
200
300
400
INPUT OFFSET CURRENT (pA)
HITS
11197-007
Figure 8. Typical Distribution of Input Offset Current
–40 –20 020 40
0
100
200
300
400
500
CMRR G = 1 (µV/V)
HITS
11197-008
Figure 9. Typical Distribution of CMRR (G = 1)
Data Sheet AD8422
–20
–15
–10
–5
0
5
10
15
20
–20 –15 –10 –5 0 5 10 15 20
INPUT COMMON-MODE VOLTAGE (V)
OUTPUT VOLTAGE (V)
G = 1
11197-009
V
S
= ±15V
V
S
= ±12V
V
S
= ±5V
Figure 10. Input Common-Mode Voltage vs. Output Voltage (G = 1),
VS = ±15 V, VS = ±12 V, VS = ±5 V
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
–0.5 00.5 1
.0
1.5 2
.0
2.5 3
.0
3.5 4
.0
4.5 5
.0
5.5
INPUT COMMON-MODE VOLTAGE (V)
OUTPUT VOLTAGE (V)
V
REF
= 0V V
REF
=2.5V
G = 1
11197-010
Figure 11. Input Common-Mode Voltage vs. Output Voltage (G = 1),
Single-Supply, VS = 5 V
–20
–15
–10
–5
0
5
10
15
20
–20 –15 –10 –5 0 5 10 15 20
INPUT COMMON-MODE VOLTAGE (V)
OUTPUT VOLTAGE (V)
11197-012
V
S
= ±15V
V
S
= ±12V
V
S
= ±5V
G = 100
Figure 12. Input Common-Mode Voltage vs. Output Voltage (G = 100),
VS = ±15 V, VS = ±12 V, VS = ±5 V
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
–0.5 00.5 1
.0
1.5 2
.0
2.5 3
.0
3.5 4
.0
4.5 5
.0
5.5
INPUT COMMON-MODE VOLTAGE (V)
OUTPUT VOLTAGE (V)
V
REF
=2.5V
G = 100
11197-013
V
REF
=0V
Figure 13. Input Common-Mode Voltage vs. Output Voltage (G = 100),
Single-Supply, VS = 5 V
–20
–16
–12
–8
–4
0
4
8
12
16
20
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
–35 –30 –25 –20 –15 –10 –5 0510 15 20 25 30 35 40
INPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
INPUT VOLTAGE (V)
VS= 5V
G= 1
VREF=2.5V
VIN– =2.5VVOUT
IIN
11197-015
Figure 14. Input Overvoltage Performance; G = 1, VS = 5 V
–20
20
–15
–10
–5
0
5
10
15
–20
20
–15
–10
–5
0
5
10
15
–20–25 –15 –10 –5 0 5 10 15 20 25
INPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
INPUT VOLTAGE (V)
V
S
=±15V
G = 1
V
REF
=0V
V
IN–
=0V
V
OUT
I
IN
11197-016
Figure 15. Input Overvoltage Performance; G = 1, VS = ±15 V
Rev. A | Page 11 of 24
AD8422 Data Sheet
–20
–16
–12
–8
–4
0
4
8
12
16
20
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
–35 –30 –25 –20 –15 –10 –5 0 5 10 15 20 25 30 35 40
INPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
INPUT VOLTAGE (V)
V
S
= 5V
G = 100
V
REF
= 2.5V
V
IN–
= 2.5V V
OUT
I
IN
11197-017
Figure 16. Input Overvoltage Performance; G = 100, VS = 5 V
–20
20
–15
–10
–5
0
5
10
15
–20
20
–15
–10
–5
0
5
10
15
–20
–25 –15 –10 –5 0 5 10 15 20 25
INPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
INPUT VOLTAGE (V)
V
S
=±15V
G = 100
V
REF
=0V
V
IN–
=0V
V
OUT
I
IN
11197-018
Figure 17. Input Overvoltage Performance; G = 100, VS = ±15 V
–0.25
–0.20
–0.15
–0.10
–0.05
0
0.05
0.10
0.15
0.20
0.25
–15 –10 –5 0 5 10 15
INPUT BI AS CURRE NT (n A)
COMMON-MODE VOLTAGE (V)
11197-019
V
S
= ±15V
Figure 18. Input Bias Current vs. Common-Mode Voltage, VS = ±15 V
–0.20
–0.15
–0.10
–0.05
0
0.05
0.10
0.15
0.20
INPUT BI AS CURRE NT (n A)
COMMON-MODE VOLTAGE (V)
11197-020
V
S
=5V
1.0 1.5 2.0 2.5 3.0 3.5 4.0
Figure 19. Input Bias Current vs. Common-Mode Voltage, VS = 5 V
0
20
40
60
80
100
120
140
160
180
0.1 110 100 1k 10k 100k
POSITI VE PSRR (dB)
FREQUENCY (Hz)
GAIN = 1
GAIN = 10
GAIN = 100
GAIN = 1000
11197-021
Figure 20. Positive PSRR vs. Frequency
0
20
40
60
80
100
120
140
160
180
0.1 110 100 1k 10k 100k
NEGAT I VE PSRR (dB)
FREQUENCY (Hz)
GAIN = 1
GAIN = 10
GAIN = 100
GAIN = 1000
11197-022
Figure 21. Negative PSRR vs. Frequency
Rev. A | Page 12 of 24
Data Sheet AD8422
–20
–10
0
10
20
30
40
50
60
70
10 100 1k 10k 100k 1M 10M
GAI N (dB)
FREQUENCY (Hz)
GAIN = 1
GAIN = 10
GAIN = 100
GAIN =1000
11197-023
Figure 22. Gain vs. Frequency
40
60
80
100
120
140
160
180
CMRR (dB)
FREQUENCY (Hz)
GAIN= 1
GAIN = 10
GAIN=100
GAIN =1000
11197-024
0.1 110 100 1k 10k 100k
Figure 23. CMRR vs. Frequency
40
60
80
100
120
140
160
180
CMRR (dB)
FREQUENCY (Hz)
GAIN = 1
GAIN = 10
GAIN = 100
GAIN = 1000
11197-025
0.1 110 100 1k 10k 100k
Figure 24. CMRR vs. Frequency, 1 kΩ Source Imbalance
–0.5
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0.4
0.5
010 20 30 40 50 60 70 80 90 100
CHANGE IN INPUT OFFSET VOLTAGE (µV)
TIME (s)
11197-026
Figure 25. Change in Input Offset Voltage (VOSI) vs. Warm-Up Time
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0.4
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
2.0
–
40
–
25
–
10 520 35 50 65 80 95 110 125
INPUT O FF SE T CURRENT (n A)
INPUT BI AS CURRE NT (n A)
TEMPERATURE ( °C)
V
S
= ±15V
NORMALIZED AT 25°C
11197-027
Figure 26. Input Bias Current and Input Offset Current vs. Temperature
–100
–80
–60
–40
–20
0
20
40
60
80
100
–40 –25 –10 520 35 50 65 80 95 110 125
GAI N E RROR (µV/ V )
TEMPERATURE ( °C)
REPRESENTATIVE SAMPLES
NORMALIZED AT25°C
11197-028
Figure 27. Gain vs. Temperature (G = 1)
Rev. A | Page 13 of 24
AD8422 Data Sheet
–50
–40
–30
–20
–10
0
10
20
30
40
50
–40 –25 –10 520 35 50 65 80 95 110 125
CMRR (µV/V)
TEMPERATURE ( °C)
11197-029
REPRESENTATIVE SAMPLE
NORMALIZED AT 25°C
Figure 28. CMRR vs. Temperature (G = 1), Normalized at 25°C
0
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
–40 –25 –10 520 35 50 65 80 95 110 125
SUPPLY CURRENT ( mA)
TEMPERATURE ( °C)
11197-030
Figure 29. Supply Current vs. Temperature (G = 1)
–30
–20
–10
0
10
20
30
40
50
60
70
–40 –25 –10 520 35 50 65 80 95 110 125
SHORT-CIRCUIT CURRE NT (mA)
TEMPERATURE ( °C)
I
SHORT
+
I
SHORT
–
11197-031
Figure 30. Short-Circuit Current vs. Temperature (G = 1)
0246810 12 14 16 18
INPUT VOLTAGE (V)
REFERRED TO SUPPLY VOLTAGES
SUPPLY VOLTAGE (±VS)
+V
S
–0.5
–1.0
–1.5
–V
S
+0.5
+1.0
+1.5
–40°C
+25°C
+85°C
+105°C
+125°C
11197-034
Figure 31. Input Voltage Limit vs. Supply Voltage
02 4 6 8 10 12 14 16 18
OUTPUT VOLTAGE SWING (V)
REFERRED TO SUPPLY VOLTAGES
SUPPLY VOLTAGE (±V
S
)
+125°C
+85°C
+25°C
–40°C
+V
S
–0.1
–0.2
–0.3
–V
S
+0.1
+0.2
+0.3
11197-035
R
L
= 10kΩ
Figure 32. Output Voltage Swing vs. Supply Voltage, RL = 10 kΩ
02 4 6 8 10 12 14 16 18
OUTPUT VOLTAGE SWING (V)
REFERRED TO SUPPLY VOLTAGES
SUPPLY VOLTAGE (±V
S
)
+V
S
–0.2
–0.4
–0.8
–0.6
–V
S
+0.4
+0.2
+0.6
+0.8
11197-036
+125°C
+85°C
+25°C
–40°C
R
L
= 2kΩ
Figure 33. Output Voltage Swing vs. Supply Voltage, RL = 2 kΩ
Rev. A | Page 14 of 24
Data Sheet AD8422
–15
–10
–5
0
5
10
15
100 1k 10k 100k
OUTPUT VOLTAGE SWING (V)
LOAD RESISTANCE (Ω)
11197-037
–40°C
+25°C
+85°C
+105°C
+125°C
Figure 34. Output Voltage Swing vs. Load Resistance
OUTPUT VOLTAGE SWING (V)
REFERRED TO SUPPLY VOLTAGES
OUTPUT CURRE NT (A)
–0.2
+0.2
–0.4
+0.4
–0.6
+0.6
–0.8
+0.8
100µ 1m 10m
+V
S
–V
S
–40°C
+25°C
+85°C
+105°C
+125°C
11197-038
Figure 35. Output Voltage Swing vs. Output Current
–5
–4
–3
–2
–1
0
1
2
3
4
5
–10 –8 –6 –4 –2 0246 8 10
GAIN NONLINEARITY (ppm)
OUTPUT VOLTAGE (V)
R
L
= 2kΩ
R
L
= 10kΩ
V
S
= ±15V
G = 1
11197-039
Figure 36. Gain Nonlinearity (G = 1)
–10
–8
–6
–4
–2
0
2
4
6
8
10
–10 –8 –6 –4 –2 0 2 46 8 10
GAIN NONLINEARITY (ppm)
OUTPUT VOLTAGE (V)
R
L
= 2kΩ
R
L
= 10kΩ
V
S
= ±15V
G = 10
11197-040
Figure 37. Gain Nonlinearity (G = 10)
–20
–16
–12
–8
–4
0
4
8
12
16
20
–10 –8 –6 –4 –2 0246810
NONLINEARITY (ppm)
OUTPUT VOLTAGE (V)
R
L
= 2kΩ
R
L
= 10kΩ
V
S
= ±15V
G = 100
11197-041
Figure 38. Gain Nonlinearity (G = 100)
–50
–40
–30
–20
–10
0
10
20
30
40
50
–10 –8 –6 –4 –2 0246810
NONLINEARITY (ppm)
OUTPUT VOLTAGE (V)
R
L
= 2kΩ
R
L
= 10kΩ
V
S
= ±15V
G = 1000
11197-042
Figure 39. Gain Nonlinearity (G = 1000)
Rev. A | Page 15 of 24
AD8422 Data Sheet
1
10
100
1k
0.1 110 100 1k 10k 100k
VOLTAGE NOISE RTI (nV/√Hz)
FREQUENCY (Hz)
G= 1
G = 10
G = 1000
G = 100
11197-043
Figure 40. Voltage Noise Spectral Density vs. Frequency
11197-044
G = 1000, 100n V /DIV
1s/DIV
G = 1, 1µV/DIV
Figure 41. 0.1 Hz to 10 Hz RTI Voltage Noise (G = 1, G = 1000)
10
100
1k
10k
110 100 1k 10k
CURRENT NOISE (fA/√Hz)
FREQUENCY (Hz)
11197-045
Figure 42. Current Noise Spectral Density vs. Frequency
11197-046
1s/DIV
5pA/DIV
Figure 43. 0.1 Hz to 10 Hz Current Noise
0
5
10
15
20
25
30
100 1k 10k 100k 1M
OUTPUT VOLTAGE (V p-p)
FREQUENCY (Hz)
G = 1
V
S
= +5V
V
S
= ±15V
11197-047
Figure 44. Large Signal Frequency Response
11197-048
13.6μs TO 0.01%
15.2µs TO 0.001%
0.002%/DIV
5V/DIV
10μs/D
IV
Figure 45. Large Signal Pulse Response and Settling Time (G = 1), 10 V Step,
VS = ±15 V, RL = 2 kΩ, CL = 100 pF
Rev. A | Page 16 of 24
Data Sheet AD8422
11197-049
12.8μs TO 0.01%
15.1µsTO0.001%
0.002%/DIV
5V/DIV
10μs/DIV
Figure 46. Large Signal Pulse Response and Settling Time (G = 10), 10 V Step,
VS = ±15 V, RL = 2 kΩ, CL = 100 pF
11197-050
12.0μs TO 0.01%
15.2µsTO 0.001%
0.002%/DIV
5V/DIV
10μs/DIV
Figure 47. Large Signal Pulse Response and Settling Time (G = 100),
10 V Step, VS = ±15 V, RL = 2 kΩ, CL = 100 pF
11197-051
80μs TO 0.01%
160µs TO 0.001%
0.002%/DIV
5V/DIV
100μs/DIV
Figure 48. Large Signal Pulse Response and Settling Time (G = 1000),
10 V Step, VS = ±15 V, RL = 2 kΩ, CL = 100 pF
0
5
10
15
20
25
30
2 4 6 8 10 12 14 16 18 20
SETTLING TIME (µs)
STEP SIZE (V)
SETTLED TO 0.01%
SETTLED TO0.001%
R
L
= 2kΩ
C
L
=100pF
11197-052
Figure 49. Settling Time vs. Step Size (G = 1)
11197-053
50mV/DIV
10µs/DIV
Figure 50. Small Signal Pulse Response (G = 1), RL = 2 kΩ, CL = 100 pF
11197-054
20mV/DIV
10µs/DIV
Figure 51. Small Signal Pulse Response (G = 10), RL = 2 kΩ, CL = 100 pF
Rev. A | Page 17 of 24
AD8422 Data Sheet
11197-055
20mV/DIV
10µs/DIV
Figure 52. Small Signal Pulse Response (G = 100), RL = 2 kΩ, CL = 100 pF
11197-056
20mV/DIV
100µs/DIV
Figure 53. Small Signal Pulse Response (G = 1000), RL = 2 kΩ, CL = 100 pF
11197-057
50mV/DIV 10µs/DIV
NOLOAD
20 pF
50 pF
100 pF
Figure 54. Small Signal Pulse Response with Various Capacitive Loads
(G = 1), RL = No Load
Rev. A | Page 18 of 24
Data Sheet AD8422
THEORY OF OPERATION
A3
A1 A2
Q2Q1
C1 C2
+IN
–IN
+V
S
–V
S
10kΩ
10kΩ
10kΩ
+V
S
–V
S
OUTPUT
REF
NODE 1
NODE 2
I
B
COMPENSATION I
B
COMPENSATION
R
G
V
B
I I
+V
S
+V
S
+V
S
10kΩ
R1
9.9kΩ R2
9.9kΩ
DIFFERENCE
AMPLIFIER STAGE
ESD AND
OVERVOLTAGE
PROTECTION
ESD AND
OVERVOLTAGE
PROTECTION
superβ
NODE 3 NODE 4
superβ
–V
S
–V
S
11197-058
Figure 55. Simplified Schematic
ARCHITECTURE
The AD8422 is based on the classic 3-op-amp instrumentation
amplifier topology. This topology has two stages: a preamplifier
to provide differential amplification followed by a difference
amplifier that removes the common-mode voltage. Figure 55
shows a simplified schematic of the AD8422.
Topologically, Q1, A1, R1 and Q2, A2, R2 can be viewed as
precision current feedback amplifiers that maintain a fixed
current in the emitters of Q1 and Q2. Any change in the input
signal forces the output voltages of A1 and A2 to change accord-
ingly and maintain the Q1 and Q2 current at the correct value.
This causes a precise diode drop from –IN and +IN to Node 3
and Node 4, respectively, so that the differential signal applied
to the inputs is replicated across the RG pins. Any current
through RG must also flow through R1 and R2, creating the
gained differential voltage between Node 1 and Node 2.
The amplified differential signal and the common-mode signal
are applied to a difference amplifier that rejects the common-
mode voltage but preserves the amplified differential voltage.
Laser-trimmed resistors allow for a highly accurate in-amp with a
gain error of less than 0.01% and a CMRR that exceeds 94 dB
(G = 1). The supply current is precisely trimmed to reduce
uncertainties due to part-to-part variations in power dissipation
and noise. The high performance pinout and special attention to
design and layout allow for high CMRR across a wide frequency
and temperature range. Using superbeta input transistors and
bias current compensation, the AD8422 offers extremely high
input impedance and low bias current, as well as very low voltage
noise while using only 300 µA supply current. The overvoltage
protection scheme allows the input to go 40 V from the opposite
rail at all gains without compromising the noise performance.
The transfer function of the AD8422 is
VOUT = G × (VIN+ − VIN−) + VREF
where:
G
R
GkΩ19.8
1+=
GAIN SELECTION
Placing a resistor across the RG terminals sets the gain of the
AD8422 that can be calculated by referring to Table 6 or by
using the following gain equation:
1
kΩ19.8
−
=
G
R
G
The AD8422 defaults to G = 1 when no gain resistor is used. Add
the tolerance and gain drift of the RG resistor to the specifications
of the AD8422 to determine the total gain accuracy of the system.
When the gain resistor is not used, gain error and gain drift are
minimal.
Table 6. Gains Achieved Using 1% Resistors
1% Standard Table Value of R
G
(Ω)
Calculated Gain
19.6 k 2.010
4.99 k 4.968
2.21 k 9.959
1.05 k 19.86
402 50.25
200
100.0
100 199.0
39.2 506.1
20 991.0
Rev. A | Page 19 of 24
AD8422 Data Sheet
RG Power Dissipation
The AD8422 duplicates the differential voltage across its inputs
onto the RG resistor. Choose an RG resistor size that is sufficient
to handle the expected power dissipation at ambient temperature.
REFERENCE TERMINAL
The output voltage of the AD8422 is developed with respect to the
potential on the reference terminal. This can be used to apply a
precise offset to the output signal. For example, a voltage source
can be tied to the REF pin to level shift the output, allowing the
AD8422 to drive a unipolar analog-to-digital converter (ADC).
The REF pin is protected with ESD diodes and must not exceed
either +VS or −VS by more than 0.3 V.
For best performance, maintain a source impedance to the REF
terminal that is below 1 Ω. As shown in Figure 55, the reference
terminal, REF, is at one end of a 10 kΩ resistor. Additional
impedance at the REF terminal adds to this 10 kΩ resistor and
results in amplification of the signal connected to the positive input.
The amplification from the additional RREF can be calculated as
2(10 kΩ + RREF)/(20 kΩ + RREF)
Only the positive signal path is amplified; the negative path is
unaffected. This uneven amplification degrades CMRR.
INCORRECT
V
CORRECT
AD8422
OP1177
+
–
VREF
AD8422
REF
11197-059
Figure 56. Driving the Reference Pin (REF)
INPUT VOLTAGE RANGE
The 3-op-amp architecture of the AD8422 applies gain in the
first stage before removing common-mode voltage with the
difference amplifier stage. Internal nodes between the first and
second stages (Node 1 and Node 2 in Figure 55) experience a
combination of a gained signal, a common-mode signal, and a
diode drop. The voltage supplies can limit the combined signal,
even when the individual input and output signals are not limited.
Figure 10 through Figure 13 show this limitation in detail.
LAYOUT
To ensure optimum performance of the AD8422 at the PCB level,
take care in the design of the board layout. To aid in this task,
the pins of the AD8422 are arranged in a logical manner.
TOP VIEW
(No t t o Scal e)
11197-060
–IN
1
R
G2
R
G3
+IN
4
+V
S
8
V
OUT
7
REF
6
–V
S
5
AD8422
Figure 57. Pinout Diagram
Common-Mode Rejection Ratio over Frequency
Poor layout can cause some of the common-mode signals to be
converted to differential signals before reaching the in-amp.
Such conversions occur when one input path has a frequency
response that is different from the other. To maintain high
CMRR over frequency, closely match the input source imped-
ance and capacitance of each path. Place additional source
resistance in the input path (for example, for input protection)
close to the in-amp inputs, which minimizes their interaction
with parasitic capacitance from the PCB traces.
Parasitic capacitance at the gain setting pins (RG) can also affect
CMRR over frequency. If the board design has a component at
the gain setting pins (for example, a switch or jumper), choose a
component such that the parasitic capacitance is as small as
possible.
Power Supplies and Grounding
Use a stable dc voltage to power the instrumentation amplifier.
Noise on the supply pins can adversely affect performance.
Place a 0.1 µF capacitor as close as possible to each supply pin.
Because the length of the bypass capacitor leads is critical at
high frequency, surface-mount capacitors are recommended. A
parasitic inductance in the bypass ground trace works against
the low impedance created by the bypass capacitor. As shown in
Figure 58, a 10 µF capacitor can be used farther away from the
device. For larger value capacitors, intended to be effective at
lower frequencies, the current return path distance is less critical.
In most cases, this capacitor can be shared by other local precision
integrated circuits.
AD8422
+V
S
+IN
–IN
LOAD
R
G
REF
0.1µF 10µF
0.1µF 10µF
–V
S
V
OUT
11197-061
Figure 58. Supply Decoupling, REF, and Output Referred to Local Ground
Rev. A | Page 20 of 24
Data Sheet AD8422
A ground plane layer is helpful to reduce parasitic inductances.
This minimizes voltage drops with changes in current. The area
of the current path is directly proportional to the magnitude of
parasitic inductances and, therefore, the impedance of the path
at high frequencies. Large changes in currents in an inductive
decoupling path or ground return create unwanted effects due
to the coupling of such changes into the amplifier inputs.
Because load currents flow from the supplies, connect the load at
the same physical location as the bypass capacitor grounds.
Reference Pin
The output voltage of the AD8422 is developed with respect to
the potential on the reference terminal. Ensure that REF is tied
to the appropriate local ground.
INPUT BIAS CURRENT RETURN PATH
The input bias current of the AD8422 must have a dc return
path to ground. When using a floating source without a current
return path, such as a thermocouple, create a current return
path, as shown in Figure 59.
THERMOCOUPLE
+V
S
REF
–V
S
AD8422
CAPACITIVELY COUPL E D
+V
S
REF
C
C
–V
S
AD8422
TRANSFORMER
+V
S
REF
–V
S
AD8422
INCORRECT
CAPACITIVELY COUPL E D
+V
S
REF
C
R
R
C
–V
S
AD8422
1
fHIGH-PASS
= 2πRC
THERMOCOUPLE
+V
S
REF
–V
S
10MΩ
AD8422
TRANSFORMER
+V
S
REF
–V
S
AD8422
CORRECT
11197-062
Figure 59. Creating an Input Bias Current Return Path
INPUT VOLTAGES BEYOND THE SUPPLY RAILS
Many instrumentation amplifiers specify excellent CMRR and
input impedance, but in a real system, the performance suffers
because of the external components required for input protection.
The AD8422 has very robust inputs. It typically does not need
additional input protection. Input voltages can be up to 40 V from
the opposite supply rail without damage to the part. For example,
with a +5 V positive supply and a 0 V negative supply, the part can
safely withstand voltages from −35 V to +40 V. Unlike some other
instrumentation amplifiers, the part can handle large differential
input voltages even when the part is in high gain.
MOST APPLICATIONS
+V
S
AD8422
–V
S
I
V
IN+
+
–
V
IN+
+
–
11197-063
Figure 60. Input Overvoltage Protection with no External Components
For input voltages less than 40 V from the opposite rail, no input
protection is required.
Keep the rest of the AD8422 terminals within the supplies. All
terminals of the AD8422 are protected against ESD.
Input Voltages Beyond the Maximum Ratings
For applications where the AD8422 encounters voltages beyond
the limits in the Absolute Maximum Ratings section, external
protection is required. This external protection depends on the
duration of the overvoltage event and the noise performance
required.
For short-lived events, transient protectors such as metal oxide
varistors (MOVs) may be all that is required.
For longer events, use resistors in series with the inputs combined
with diodes. To avoid worsening bias current performance,
low leakage diodes, such as the BAV199 or FJH1100s, are
recommended. The diodes prevent the voltage at the input of
the amplifier from exceeding the maximum ratings, while the
resistors limit the current into the diodes. Because most external
diodes can easily handle 100 mA or more, resistor values do not
have to be large. Therefore, the protection resistance has minimal
impact on noise performance.
Rev. A | Page 21 of 24
AD8422 Data Sheet
+VS
AD8422
–VS
VIN+
+
–
VIN–
+
–
+VS
AD8422
RPROTECT
RPROTECT
–VS
I
VIN+
+
–
VIN–
+
–
+VS
+VS
AD8422
RPROTECT
RPROTECT
–VS
–VS
I
VIN+
+
–
VIN–
+
–
+VS
–VS
+VS
AD8422
RPROTECT
RPROTECT
–VS
I
VIN+
+
–
VIN–
+
–
I
SIMPLE CONTINUOUS PROTECTIONTRANSIENT PROTECTION
LOW NOISE CONTINUOUS
OPTION 2
LOW NOISE CONTINUOUS
OPTION 1
11197-064
Figure 61. Input Protection Options for Input Voltages Beyond Absolute
Maximum Ratings
At the expense of some noise performance, another solution is
to use series resistors. In the overvoltage case, current into the
inputs of the AD8422 is internally limited to a safe value for the
amplifier. Although the AD8422 inputs must still be kept within the
Absolute Maximum Ratings, the I × R drop across the protection
resistor increases the maximum voltage that the system can
withstand to the following values:
For positive input signals,
VMAX_NEW = (40 V + Negative Supply) + IIN × RPROTECT
For negative input signals,
VMIN_NEW = (Positive Supply – 40 V) − IOUT × RPROTECT
Overvoltage performance is shown in Figure 14, Figure 15,
Figure 16, and Figure 17. With gains greater than 100 and
supply voltages less than ±2.5 V, overdrive voltages beyond
the rails may cause the output to invert as far as the REF pin
voltage.
RADIO FREQUENCY INTERFERENCE (RFI)
RF rectification is often a problem when amplifiers are used in
applications that have strong RF signals. The disturbance can
appear as a small dc offset voltage. High frequency signals can
be filtered with a low-pass RC network placed at the input of
the instrumentation amplifier, as shown in Figure 62.
R
R
AD8422
+V
S
+IN
–IN
0.1µF 10µF
10µF
0.1µF
REF
V
OUT
–V
S
R
G
C
D
10nF
C
C
1nF
C
C
1nF
2kΩ
2kΩ
11197-065
Figure 62. RFI Suppression
The filter limits the input signal bandwidth, according to the
following relationship:
)2(π2
1
C
D
DIFF CCR
uencyFilterFreq +
=
C
CM RC
uency
FilterFreq π2
1
=
where CD ≥ 10 CC.
CD affects the difference signal, and CC affects the common-mode
signal. Choose values of R and CC that minimize RFI. A mismatch
between R × CC at the positive input and R × CC at the negative
input degrades the CMRR of the AD8422. By using a value of CD
that is one order of magnitude larger than CC, the effect of the
mismatch is reduced, and performance is improved.
Resistors add noise; therefore, the choice of the resistor and
capacitor values depends on the desired tradeoff between noise,
input impedance at high frequencies, and RF immunity. The
resistors used for the RFI filter can be the same as those used for
input protection.
Rev. A | Page 22 of 24
Data Sheet AD8422
APPLICATIONS INFORMATION
PRECISION BRIDGE CONDITIONING
With its high CMRR, low drift, and rail-to-rail output, the
AD8422 is an excellent choice for conditioning a signal from a
Wheatstone bridge. With appropriate supply voltages, the gain
and reference pin voltage can be adjusted to match the full-scale
bridge output to any desired output range, such as 0 V to 5 V.
Figure 63 shows a circuit to convert a bridge signal into a 4 mA
to 20 mA output using the AD8276 low power, precision difference
amplifier, and the ADA4096-2 low power, rail-to-rail input and
output, overvoltage protected op amp. With high precision bridge
circuits, care must be taken to compensate offsets and temperature
errors. For example, if the voltage at the REF pin is used to
compensate for the bridge offset, ensure that the AD8422 is within
its operating range for the maximum expected offset. If the zero-
adjust potentiometer is excluded, connect the positive op amp
input to the center of the 24.9 kΩ, 10.7 kΩ divider, which is at
1.5 V. If lower supply voltages are used for the AD8276 and the
ADA4096-2, ensure that the desired output voltage of the AD8276
is within its output range, and VL is within the input and output
range of the ADA4096-2. The transistor must have sufficient
breakdown voltage and IC. Low cost transistors, such as the BC847
or 2N5210, are recommended.
PROCESS CONTROL ANALOG INPUT
In process control systems such as programmable logic controllers
(PLC) and distributed control systems (DCS), analog variables
typically occur in just a few standard voltage or current ranges,
including 4 mA to 20 mA and ±10 V. Variables within these input
ranges must often be gained or attenuated and level shifted to
match a specific ADC input range such as 0 V to 5 V. The circuit in
Figure 64 shows one way this can be done with a single AD8422.
Low power, overvoltage protection, and high precision make the
AD8422 a good match for process control applications, and high
input impedance, low bias current, and low current noise allow
significant source resistance with minimum additional errors.
+5V
+5V
+5V
REF REF
SENSE
+24V
+24V +24V
+24V
+IN
10.7kΩ
24.9kΩ
124Ω
1
1
OPTIONAL
ZERO
ADJUST
–IN
+IN
–IN
V
OUT_FS
= ±15mV
I
OUT
= 4mA TO 20mA
V = 0. 5V TO 2.5V
R
L
V
L
R
G
= 301Ω
G = 66.8V/V
R
G
V
OUT
AD8422
ADA4096-2
AD8276
ADA4096-2
11197-066
Figure 63. Bridge Circuit with 4 mA to 20 mA Output
+15V
–15V 2.5V
REF
+IN
42.2kΩ
0V TO 10V, ±10V
TERMINAL
BLOCK
0V TO 5V, ±5V
0V TO 1V, ±1V
4mA TO 20mA,
0mA TO 20m A
±20mA
34kΩ
8.45kΩ
1kΩ
1kΩ
49.9Ω
–IN
R
GAD8422
R
G
= 13.2kΩ
G = 2.5V/V
V
OUT
= 2.5V ± 2.5V
11197-067
Figure 64. Process Control Analog Input
Rev. A | Page 23 of 24
AD8422 Data Sheet
Rev. A | Page 24 of 24
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 65. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
COMPLIANT TO JEDEC STANDARDS MO-187-AA
6°
0°
0.80
0.55
0.40
4
8
1
5
0.65 BSC
0.40
0.25
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 66. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding
AD8422ARZ −40°C to +85°C 8-Lead SOIC_N, Standard Grade R-8
AD8422ARZ-R7 −40°C to +85°C 8-Lead SOIC_N, Standard Grade, 7” Tape and Reel, R-8
AD8422ARZ-RL −40°C to +85°C 8-Lead SOIC_N, Standard Grade, 13” Tape and Reel R-8
AD8422BRZ −40°C to +85°C 8-Lead SOIC_N, High Performance Grade R-8
AD8422BRZ-R7 −40°C to +85°C 8-Lead SOIC_N, High Performance Grade, 7” Tape and Reel R-8
AD8422BRZ-RL −40°C to +85°C 8-Lead SOIC_N, High Performance Grade, 13” Tape and Reel R-8
AD8422ARMZ −40°C to +85°C 8-Lead MSOP, Standard Grade RM-8 Y4U
AD8422ARMZ-R7 −40°C to +85°C 8-Lead MSOP, Standard Grade, 7” Tape and Reel, RM-8 Y4U
AD8422ARMZ-RL −40°C to +85°C 8-Lead MSOP, Standard Grade, 13” Tape and Reel RM-8 Y4U
AD8422BRMZ −40°C to +85°C 8-Lead MSOP, High Performance Grade RM-8 Y4V
AD8422BRMZ-R7 −40°C to +85°C 8-Lead MSOP, High Performance Grade, 7” Tape and Reel RM-8 Y4V
AD8422BRMZ-RL −40°C to +85°C 8-Lead MSOP, High Performance Grade, 13” Tape and Reel RM-8 Y4V
1 Z = RoHS Compliant Part.
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registered trademarks are the property of their respective owners.
D11197-0-1/15(A)