Freescale Semiconductor Product Brief MC9328MXLP/D Rev. 2, 08/2004 MC9328MXL i.MX Integrated Portable System Processor The i.MX family builds on the best-selling DragonBall family of application processors. Continuing this legacy, the DragonBall MX (Media Extensions) series provides a leap in performance with an ARM9TM microprocessor core and highly integrated system functions. i.MX products specifically address the requirements of the personal, portable product market by providing intelligent integrated peripherals, an advanced processor core, and power management capabilities. MC9328MXL is the second generation of i.MX series, equipped with optimized feature sets, to target for the low-cost solution in the portable handheld market. Its internal bus architecture and fast system speed are the same as first DragonBall-MX generation, MC9328MX1. The ARM920TDMI core speed is programmable from 0 to 200 MHz, while system speed is programmable from 0 to 96 MHz. The MC9328MXL provides the following benefits: * Represents the sixth generation of the industry-leading DragonBall family of microprocessors for the personal, portable product market * Features a high level of on-chip integration (c) Freescale Semiconductor, Inc., 2004. All rights reserved. 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Reference Documents . . . . . . . . . . . . . . . . . . . .11 * * * Provides uncompromising performance in a very low-power system design Optimized for multimedia applications Supports a wide variety of applications including the most popular PDA designs, smart phones, and next-generation wireless communicators System Control JTAG/ICE Bootstrap Power Control CGM (DPLLx2) Standard System I/O GPIO MC9328MXL Connectivity MMC / SD Timer 1 & 2 CPU Complex RTC Memory Stick(R) Host Controller SPI 1 & SPI 2 PWM ARM9TDMITM I Cache Watchdog D Cache UART 1 UART 2 AIPI 1 VMMU Interrupt Controller AIPI 2 DMAC (11 Chnl) Bus Control Multimedia Multimedia Accelerator Video Port SSI / I2S Human Interface I 2C USB Device EIM & SDRAMC LCDC Figure 1. MC9328MXL Functional Block Diagram 1 Features To support a wide variety of applications, the MC9328MXL boasts a robust array of features, including the following: * ARM920T Microprocessor Core * AHB to IP Bus Interfaces (AIPIs) * External Interface Module (EIM) * SDRAM Controller (SDRAMC) * DPLL Clock and Power Control Module * Two Universal Asynchronous Receiver/Transmitters (UART 1 and UART 2) * Two Serial Peripheral Interfaces (SPI1 and SPI2) * Two General-Purpose 32-bit Counters/Timers * Watchdog Timer * Real-Time Clock/Sampling Timer (RTC) MC9328MXL Product Brief, Rev. 2 2 Freescale Semiconductor ARM920T Microprocessor Core * * * * * * * * * * * * * * LCD Controller (LCDC) Pulse-Width Modulation (PWM) Module Universal Serial Bus (USB) Device Multimedia Card and Secure Digital (MMC/SD) Host Controller Memory Stick(R) Host Controller (MSHC) Direct Memory Access Controller (DMAC) Synchronous Serial Interface and Inter-IC Sound (SSI 1I2S Module Inter-IC (I2C) Bus Module Video Port General-Purpose I/O (GPIO) Ports Bootstrap Mode Analog Signal Processing (ASP) Module Multimedia Accelerator (MMA) 256-pin and 225-pin MAPBGA Package The following sections detail the features of the MC9328MXL's functional blocks. 1.1 ARM920T Microprocessor Core The MC9328MXL uses the ARM920T microprocessor core which has the following features: * 200 MHz maximum processing speed * 16K instruction cache and 16K data cache * ARM9 high performance 32-bit RISC engine * Thumb(R) 16-bit compressed instruction set for a leading level of code density * EmbeddedICETM JTAG software debug * 100-percent user code binary compatibility with ARM7TDMI(R) processors * ARM9TDMI(R) core, including integrated caches, write buffers, and bus interface units, provides CPU-cache transparency * Advanced Microcontroller Bus Architecture (AMBATM) system-on-chip multi-master bus interface * Flexible CPU and bus clocking relationships including asynchronous, synchronous, and single-clock configurations * Cache locking to support mixed loads of real-time and user applications * Virtual Memory Management Unit (VMMU) 1.2 AHB to IP Bus Interfaces (AIPIs) The MC9328MXL AIPIs provide a communication interface between the high-speed AHB bus and a lower-speed IP bus for slow slave peripherals. MC9328MXL Product Brief, Rev. 2 Freescale Semiconductor 3 External Interface Module (EIM) 1.3 External Interface Module (EIM) The MC9328MXL EIM features: * Up to six chip selects for external devices, each with 16 Mbyte of address space (chip selects for ROM support a maximum of 32 Mbyte of address space) * Programmable protection, port size, and wait states for each chip select * Internal/external boot ROM selection * Selectable bus watchdog counter * Burst support for external AMDTM or Intel(R) flash with 32-bit data path * Interrupt controller to handle a maximum of 63 interrupt sources * Vectored interrupt capability with prioritization for 16 sources * Supports DTACK function in the CS5 1.4 SDRAM Controller (SDRAMC) The MC9328MXL SDRAMC features: * Supports 4 banks of 64-, 128-, or 256-Mbit synchronous DRAMs * Includes 2 independent chip-selects -- Up to 64 Mbyte per chip-select -- Up to four banks simultaneously active per chip-select -- JEDEC standard pinout and operation * Supports Micron SyncFlash(R) SDRAM-interface burst flash memory -- Boot capability from CSD1 * Supports burst reads of word (32-bit) data types * PC100 compliant interface -- 100 MHz system clock achievable with "-8" option PC100 compliant memories -- single and fixed-length (8-word) word access -- Typical access time of 8-1-1-1 at 100 MHz * Software configurable bus width, row and column sizes, and delays for differing system requirements * Built in auto-refresh timer and state machine * Hardware supported self-refresh entry and exit which keeps data valid during system reset and low-power modes * Auto-powerdown (clock suspend) timer 1.5 Clock Generation Module (CGM) and Power Control Module The MC9328MXL CGM and Power Control Module features: * Digital phase-locked loops (PLLs) and clock controller for all internal clocks generation * MCUPLL generates FCLK to the CPU from either a 32 kHz or 32.768 kHz MC9328MXL Product Brief, Rev. 2 4 Freescale Semiconductor Two Universal Asynchronous Receiver/Transmitters (UART 1 and UART 2) * * 1.6 System PLL generates the system clock and the 48 MHz clock for the USB from a 16 MHz or either a 32 kHz or 32.768 kHz Support for three power modes for different power consumption needs: run, doze, and stop Two Universal Asynchronous Receiver/Transmitters (UART 1 and UART 2) The MC9328MXL UARTs feature: * Support for serial data transmit/receive operation: 7 or 8 data bits, 1 or 2 stop bits, and programmable parity (even, odd, or none) * Programmable baud rates up to 1.00 MHz * 32-byte FIFO on Tx and 32 half-word FIFO on Rx that support autobaud * IrDA 1.0 support 1.7 Two Serial Peripheral Interfaces (SPI) The MC9328MXL SPIs feature: * SPI 1 is master/slave configurable, SPI 2 is master only * Up to 16-bit programmable data transfer * 8 x 16 FIFO for both Tx and Rx data 1.8 Two General-Purpose 32-Bit Counters/Timers The MC9328MXL General-Purpose Counters/Timers feature: * Automatic interrupt generation * Programmable timer input/output pins * Input capture capability with programmable trigger edge * Output compare with programmable mode 1.9 Watchdog Timer The MC9328MXL Watchdog Timer features: * Programmable time out of 0.5 s to 64 s * Resolution of 0.5 s 1.10 Real-Time Clock/Sampling Timer (RTC) The MC9328MXL RTC features: * 32.768 kHz or 32 kHz * Full clock features: seconds, minutes, hours, and days * Capable of counting up to 512 days * Minute countdown timer with interrupt MC9328MXL Product Brief, Rev. 2 Freescale Semiconductor 5 LCD Controller (LCDC) * * * * 1.11 Programmable daily alarm with interrupt Sampling timer with interrupt Once-per-second, once-per-minute, once-per-hour, and once-per-day interrupts Interrupt generation for digitizer sampling or keyboard debouncing LCD Controller (LCDC) The MC9328MXL LCDC features: * Software programmable screen size (a maximum of 640 x 512 pixels) to support single (non-split) monochrome, color STN panels, and color TFT panels * Support for 4 bpp (bits per pixel), 8 bpp, and 12 bpp for passive color panels * Support for 4 bpp, 8 bpp, 12 bpp, and 16 bpp for TFT panels -- Up to 256 colors out of a palette of 4096 for 8 bpp -- True 64K color for 16 bpp * In color STN mode, the maximum bit depth is 12 bpp * In BW mode, the maximum bit depth is 4 bpp * Up to 16 grey levels out of 16 palettes * Capable of directly driving popular LCD drivers from manufacturers including Motorola, Sharp, Hitachi, and Toshiba * Support for data bus width for 12- or 16-bit TFT panels * Panel interface of 8-, 4-, and 2-bits, and a 1-bit wide LCD panel data bus for monochrome panels * Direct interface to Sharp(R) 320 x 240 HR-TFT panel * Support for logical operation between color hardware cursor and background * Uses system memory as display memory * LCD contrast control using 8-bit PWM * Support for self-refresh LCD modules * Hardware panning (soft horizontal scrolling) 1.12 Pulse-Width Modulation (PWM) Module The MC9328MXL PWM Module features: * 4 x 16 FIFO to minimize interrupt overhead * 16-bit resolution * Sound and melody generation 1.13 Universal Serial Bus (USB) Device The MC9328MXL USB Device features: * Compliant with Universal Serial Bus Specification, revision 1.1 * Up to six logical endpoints--see Table 1 on page 7 MC9328MXL Product Brief, Rev. 2 6 Freescale Semiconductor Multimedia Card and Secure Digital (MMC/SD) Host Controller * * * Support for isochronous communications pipes -- Frame match interrupt feature notifies the user when a specific USB frame occurs -- For DMA access, the maximum packet size for the isochronous endpoint is restricted by the FIFO size of the endpoint -- For programmed I/O, isochronous data packets range from 0 bytes to 1023 bytes Support for control, bulk, and interrupt pipes -- Packet sizes are limited to 8, 16, 32, or 64 bytes -- Maximum packet size depends on the FIFO size of the endpoint Support (via a register bit) for a remote wake-up feature Full-speed (12 MHz) operation * Operation can be programmed for both bus-powered and self-powered mode * Table 1. Endpoint Configurations Endpoint Direction Physical FIFO Size (Bytes) Endpoint Configuration Maximum Packet Size (Bytes) 0 IN and OUT 32 Control 32 1-5 IN or OUT 32 or 641 Control, interrupt, bulk, or isochronous User configurable: 8, 16, 32, or 64 (depending on FIFO size) 1FIFO1 1.14 and FIFO2 are 64 bytes each; FIFO3, FIFO4, and FIFO5 are 32 bytes each. Multimedia Card and Secure Digital (MMC/SD) Host Controller The MC9328MXL MMC/SD Host Controller features: * Compatible with the MultiMediaCard System Specification (SPI mode excluded), version 3.1 * Compatible to 1/4 bit with the SD Memory Card Specification (SPI mode excluded), version 1.0 and SD I/O Specification (SPI mode excluded), version 1.0 with 1 or 4 channel(s) * Up to ten MMC cards and one SD are supported by standard (maximum data rate with a maximum of ten cards) * Support for hot swappable operation * Support for data rates from 20 Mbps to 80 Mbps 1.15 Memory Stick(R) Host Controller (MSHC) The MC9328MXL MSHC features: * Integrated 8-byte (4-word) FIFO buffer for transmit and receive * Integrated CRC circuit * Support for internal or external serial clock source * Integrated Serial Clock Divider * DMA support; DMA request condition is selectable based on FIFO status MC9328MXL Product Brief, Rev. 2 Freescale Semiconductor 7 Direct Memory Access Controller (DMAC) * * * * * 1.16 Automatic command execution when an interrupt from the Memory Stick is detected (can be toggled on/off) RDY time-out period set by the number of serial clock cycles Interrupt output to the ARM920T core when a time-out occurs Two integrated general-purpose input pins for detecting Memory Stick insertion/extraction 16-bit host bus access (byte access not supported) Direct Memory Access Controller (DMAC) The MC9328MXL DMAC features: * 11 channels to support linear memory, 2D memory, FIFO, and End-of-Burst Enable FIFO for both source and destination * Support for 8-, 16-, or 32-bit FIFO port size and memory port size data transfer * Support for big-endian and little-endian * Configurable DMA burst length for each channel up to 16 words, 32 half-words, or 64 bytes * Bus utilization control for a channel that is not triggered by DMA requests * Bulk data transfer complete or transfer error interrupts provided to interrupt handler (and then to the core) * DMA burst time-out error terminates the DMA cycle when the burst cannot be completed within a programmed timing period * Acknowledge signal provided to peripheral after DMA burst is complete 1.17 Synchronous Serial Interface and Inter-IC Sound (SSI/I2S) Module The MC9328MXL SSI/I2S Module features: * Supports generic SSI interface for external audio chip or interprocessor communication * Supports Philips standard Inter-IC Sound (I2S) bus for external digital audio chip interface 1.18 Inter-IC (I2C) Bus Module The MC9328MXL I2C Bus Module features: * Support for Philips I2C-bus standard for external digital control * Support for 3.3 V tolerant devices * Multiple-master operation * Software-programmable for 1 of 64 different serial clock frequencies * Software-selectable acknowledge bit * Interrupt-driven, byte-by-byte data transfer * Arbitration-lost interrupt with automatic mode switching from master to slave * Calling address identification interrupt MC9328MXL Product Brief, Rev. 2 8 Freescale Semiconductor Video Port * * * * 1.19 Start and stop signal generation and detection Repeated START signal generation Acknowledge bit generation and detection Bus-busy detection Video Port The MC9328MXL video port supports external CMOS sensor video data input. 1.20 General-Purpose I/O (GPIO) Ports The MC9328MXL GPIO ports feature: * Interrupt capability * 97 total I/O pins multiplexed with most dedicated functions for pin efficiency 1.21 Bootstrap Mode The MC9328MXL Bootstrap Mode features: * Allows user to initialize system and download program or data to system memory through UART * Accepts execution command to run program stored in system memory * Supports memory/register read/write operation of selectable data size of byte, half-word, or word * Provides a 32-byte instruction buffer for ARM920T core vector table storage, instruction storage and execution 1.22 Multimedia Accelerator (MMA) The MC9328MXL Multimedia Accelerator features: * MAC for FIR and FFT operation--MP3 applications save 10% to 15% CPU MIPS * DCT/iDCT hardware accelerator--MPEG4 decode applications save approximately 10% CPU MIPS 1.23 Power Management Features The MC9328MXL provides the following power management features: * Programmable clock synthesizer using either a 32 kHz or 32.768 kHz crystal for full frequency control * Low-power stop capabilities * Modules that can be individually shut down * Lowest power mode control MC9328MXL Product Brief, Rev. 2 Freescale Semiconductor 9 Operating Voltage Range 1.24 Operating Voltage Range The MC9328MXL operating voltages are as follows: * I/O voltage--1.70 V to 2.0 V or 2.7 V to 3.3 V * Internal logic voltage--150 MHz: 1.70 V to 1.9 V; 200 MHz: 1.8 to 2.0V 1.25 Packaging The MC9328MXL features two packages: * 256-pin MAPBGA package with 14 mm x 14 mm x 1.3 mm, 0.8 mm ball pitch * 225-pin PBGA package with 13 mm x 13 mm, 0.8 mm ball pitch 1.26 Revision History This revision is to update the document into the new Freescale look. 2 Reference Documents MC9328MXL Data Sheet (order number MC9328MXL/D) MC9328MXL Reference Manual (order number MC9328MXLRM/D) The documents may be found at the Freescale Semiconductor Inc. World Wide Web site at http://www.freescale.com/imx. These documents may be downloaded directly from the World Wide Web site, or printed versions may be ordered. The World Wide Web site also may have useful application notes. MC9328MXL Product Brief, Rev. 2 10 Freescale Semiconductor NOTES MC9328MXL Product Brief, Rev. 2 Freescale Semiconductor 11 How to Reach Us: Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information USA/Europe/Locations Not Listed: Freescale Semiconductor Literature Distribution Center in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products P.O. Box 5405 herein. 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ARM9, ARM920T, and ARM9TDMI are the trademarks of ARM Limited. (c) Freescale Semiconductor, Inc. 2004. All rights reserved. MC9328MXLP/D Rev. 2